Commit a3b63979 authored by Micky Ching's avatar Micky Ching Committed by Lee Jones

mfd: rtsx: Add func to split u32 into register

Add helper function to write u32 to registers, if we want to put u32
value to 4 continuous register, this can help us reduce tedious work.
Signed-off-by: default avatarMicky Ching <micky_ching@realsil.com.cn>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent 292aabb1
...@@ -558,6 +558,7 @@ ...@@ -558,6 +558,7 @@
#define SD_SAMPLE_POINT_CTL 0xFDA7 #define SD_SAMPLE_POINT_CTL 0xFDA7
#define SD_PUSH_POINT_CTL 0xFDA8 #define SD_PUSH_POINT_CTL 0xFDA8
#define SD_CMD0 0xFDA9 #define SD_CMD0 0xFDA9
#define SD_CMD_START 0x40
#define SD_CMD1 0xFDAA #define SD_CMD1 0xFDAA
#define SD_CMD2 0xFDAB #define SD_CMD2 0xFDAB
#define SD_CMD3 0xFDAC #define SD_CMD3 0xFDAC
...@@ -995,4 +996,12 @@ static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr, ...@@ -995,4 +996,12 @@ static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr,
return pci_write_config_byte(pcr->pci, addr, (val & mask) | append); return pci_write_config_byte(pcr->pci, addr, (val & mask) | append);
} }
static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
{
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
}
#endif #endif
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