Commit a3ee0a24 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

pinctrl: renesas: r8a7778: Use common R-Car bias handling

Currently, the rcar_pinmux_[gs]et_bias() helpers handle only SoCs that
have separate LSI Pin Pull-Enable (PUEN) and Pull-Up/Down Control (PUD)
registers, like R-Car Gen3 and RZ/G2.  Update the function to handle
SoCs that have only LSI Pin Pull-Up Control Register (PUPR), like R-Car
Gen1/Gen2 and RZ/G1.

Reduce code duplication by converting the R-Car M1A pin control driver
to use the common handler.

Note that this changes behavior in case the (invalid!) option
"bias-pull-down" is used in an R-Car M1A DTS: before, it was ignored
silently; after this change, it is considered the same as
"bias-pull-up".
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201028151637.1734130-8-geert+renesas@glider.be
parent 2d341cc3
...@@ -3116,42 +3116,9 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { ...@@ -3116,42 +3116,9 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
{ /* sentinel */ }, { /* sentinel */ },
}; };
static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
unsigned int pin)
{
const struct pinmux_bias_reg *reg;
unsigned int bit;
reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
if (!reg)
return PIN_CONFIG_BIAS_DISABLE;
if (sh_pfc_read(pfc, reg->puen) & BIT(bit))
return PIN_CONFIG_BIAS_PULL_UP;
else
return PIN_CONFIG_BIAS_DISABLE;
}
static void r8a7778_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
unsigned int bias)
{
const struct pinmux_bias_reg *reg;
unsigned int bit;
u32 value;
reg = sh_pfc_pin_to_bias_reg(pfc, pin, &bit);
if (!reg)
return;
value = sh_pfc_read(pfc, reg->puen) & ~BIT(bit);
if (bias == PIN_CONFIG_BIAS_PULL_UP)
value |= BIT(bit);
sh_pfc_write(pfc, reg->puen, value);
}
static const struct sh_pfc_soc_operations r8a7778_pfc_ops = { static const struct sh_pfc_soc_operations r8a7778_pfc_ops = {
.get_bias = r8a7778_pinmux_get_bias, .get_bias = rcar_pinmux_get_bias,
.set_bias = r8a7778_pinmux_set_bias, .set_bias = rcar_pinmux_set_bias,
}; };
const struct sh_pfc_soc_info r8a7778_pinmux_info = { const struct sh_pfc_soc_info r8a7778_pinmux_info = {
......
...@@ -835,7 +835,7 @@ unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin) ...@@ -835,7 +835,7 @@ unsigned int rcar_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit)))
return PIN_CONFIG_BIAS_DISABLE; return PIN_CONFIG_BIAS_DISABLE;
else if (sh_pfc_read(pfc, reg->pud) & BIT(bit)) else if (!reg->pud || (sh_pfc_read(pfc, reg->pud) & BIT(bit)))
return PIN_CONFIG_BIAS_PULL_UP; return PIN_CONFIG_BIAS_PULL_UP;
else else
return PIN_CONFIG_BIAS_PULL_DOWN; return PIN_CONFIG_BIAS_PULL_DOWN;
...@@ -856,10 +856,13 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, ...@@ -856,10 +856,13 @@ void rcar_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
if (bias != PIN_CONFIG_BIAS_DISABLE) if (bias != PIN_CONFIG_BIAS_DISABLE)
enable |= BIT(bit); enable |= BIT(bit);
if (reg->pud) {
updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit); updown = sh_pfc_read(pfc, reg->pud) & ~BIT(bit);
if (bias == PIN_CONFIG_BIAS_PULL_UP) if (bias == PIN_CONFIG_BIAS_PULL_UP)
updown |= BIT(bit); updown |= BIT(bit);
sh_pfc_write(pfc, reg->pud, updown); sh_pfc_write(pfc, reg->pud, updown);
}
sh_pfc_write(pfc, reg->puen, enable); sh_pfc_write(pfc, reg->puen, enable);
} }
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