Commit a3f5ac78 authored by Uwe Kleine-König's avatar Uwe Kleine-König

imx21: define and use MX21_IO_ADDRESS

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Agustín Ferrín Pozuelo <gatoguan-os@yahoo.com>
parent 1f2ddd64
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
#include <asm/clkdev.h> #include <asm/clkdev.h>
#include <asm/div64.h> #include <asm/div64.h>
#define IO_ADDR_CCM(off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off)) #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))
/* Register offsets */ /* Register offsets */
#define CCM_CSCR IO_ADDR_CCM(0x0) #define CCM_CSCR IO_ADDR_CCM(0x0)
...@@ -1235,7 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) ...@@ -1235,7 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_enable(&uart_clk[0]); clk_enable(&uart_clk[0]);
#endif #endif
mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR), mxc_timer_init(&gpt_clk[0], MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),
MX21_INT_GPT1); MX21_INT_GPT1);
return 0; return 0;
} }
...@@ -92,6 +92,11 @@ ...@@ -92,6 +92,11 @@
#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */
#define MX21_IO_ADDRESS(x) ( \
IMX_IO_ADDRESS(x, MX21_AIPI) ?: \
IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \
IMX_IO_ADDRESS(x, MX21_X_MEMC))
/* fixed interrupt numbers */ /* fixed interrupt numbers */
#define MX21_INT_CSPI3 6 #define MX21_INT_CSPI3 6
#define MX21_INT_GPIO 8 #define MX21_INT_GPIO 8
......
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