Commit a66bc664 authored by Jeff Garzik's avatar Jeff Garzik

[netdrvr pcmcia] support SIOC[GS]MII{PHY,REG} ioctls

Updated drivers;  3c574_cs, axnet_cs, pcnet_cs, xirc2ps_cs

Thanks to Komuro for pointing this out.
parent 42114017
...@@ -1227,9 +1227,9 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ...@@ -1227,9 +1227,9 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
data[0], data[1], data[2], data[3]); data[0], data[1], data[2], data[3]);
switch(cmd) { switch(cmd) {
case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */ case SIOCGMIIPHY: /* Get the address of the PHY in use. */
data[0] = phy; data[0] = phy;
case SIOCDEVPRIVATE+1: /* Read the specified MII register. */ case SIOCGMIIREG: /* Read the specified MII register. */
{ {
int saved_window; int saved_window;
unsigned long flags; unsigned long flags;
...@@ -1242,7 +1242,7 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ...@@ -1242,7 +1242,7 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
spin_unlock_irqrestore(&lp->window_lock, flags); spin_unlock_irqrestore(&lp->window_lock, flags);
return 0; return 0;
} }
case SIOCDEVPRIVATE+2: /* Write the specified MII register */ case SIOCSMIIREG: /* Write the specified MII register */
{ {
int saved_window; int saved_window;
unsigned long flags; unsigned long flags;
......
...@@ -827,12 +827,12 @@ static int axnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ...@@ -827,12 +827,12 @@ static int axnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
u16 *data = (u16 *)&rq->ifr_data; u16 *data = (u16 *)&rq->ifr_data;
ioaddr_t mii_addr = dev->base_addr + AXNET_MII_EEP; ioaddr_t mii_addr = dev->base_addr + AXNET_MII_EEP;
switch (cmd) { switch (cmd) {
case SIOCDEVPRIVATE: case SIOCGMIIPHY:
data[0] = info->phy_id; data[0] = info->phy_id;
case SIOCDEVPRIVATE+1: case SIOCGMIIREG: /* Read MII PHY register. */
data[3] = mdio_read(mii_addr, data[0], data[1] & 0x1f); data[3] = mdio_read(mii_addr, data[0], data[1] & 0x1f);
return 0; return 0;
case SIOCDEVPRIVATE+2: case SIOCSMIIREG: /* Write MII PHY register. */
if (!capable(CAP_NET_ADMIN)) if (!capable(CAP_NET_ADMIN))
return -EPERM; return -EPERM;
mdio_write(mii_addr, data[0], data[1] & 0x1f, data[2]); mdio_write(mii_addr, data[0], data[1] & 0x1f, data[2]);
......
...@@ -1224,12 +1224,12 @@ static int ei_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ...@@ -1224,12 +1224,12 @@ static int ei_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
u16 *data = (u16 *)&rq->ifr_data; u16 *data = (u16 *)&rq->ifr_data;
ioaddr_t mii_addr = dev->base_addr + DLINK_GPIO; ioaddr_t mii_addr = dev->base_addr + DLINK_GPIO;
switch (cmd) { switch (cmd) {
case SIOCDEVPRIVATE: case SIOCGMIIPHY:
data[0] = info->phy_id; data[0] = info->phy_id;
case SIOCDEVPRIVATE+1: case SIOCGMIIREG: /* Read MII PHY register. */
data[3] = mdio_read(mii_addr, data[0], data[1] & 0x1f); data[3] = mdio_read(mii_addr, data[0], data[1] & 0x1f);
return 0; return 0;
case SIOCDEVPRIVATE+2: case SIOCSMIIREG: /* Write MII PHY register. */
if (!capable(CAP_NET_ADMIN)) if (!capable(CAP_NET_ADMIN))
return -EPERM; return -EPERM;
mdio_write(mii_addr, data[0], data[1] & 0x1f, data[2]); mdio_write(mii_addr, data[0], data[1] & 0x1f, data[2]);
......
...@@ -1726,13 +1726,13 @@ do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ...@@ -1726,13 +1726,13 @@ do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
return -EOPNOTSUPP; return -EOPNOTSUPP;
switch(cmd) { switch(cmd) {
case SIOCDEVPRIVATE: /* Get the address of the PHY in use. */ case SIOCGMIIPHY: /* Get the address of the PHY in use. */
data[0] = 0; /* we have only this address */ data[0] = 0; /* we have only this address */
/* fall trough */ /* fall trough */
case SIOCDEVPRIVATE+1: /* Read the specified MII register. */ case SIOCGMIIREG: /* Read the specified MII register. */
data[3] = mii_rd(ioaddr, data[0] & 0x1f, data[1] & 0x1f); data[3] = mii_rd(ioaddr, data[0] & 0x1f, data[1] & 0x1f);
break; break;
case SIOCDEVPRIVATE+2: /* Write the specified MII register */ case SIOCSMIIREG: /* Write the specified MII register */
if (!capable(CAP_NET_ADMIN)) if (!capable(CAP_NET_ADMIN))
return -EPERM; return -EPERM;
mii_wr(ioaddr, data[0] & 0x1f, data[1] & 0x1f, data[2], 16); mii_wr(ioaddr, data[0] & 0x1f, data[1] & 0x1f, data[2], 16);
......
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