Commit a71e67b2 authored by Biao Huang's avatar Biao Huang Committed by David S. Miller

stmmac: dwmac-mediatek: Reuse more common features

This patch makes dwmac-mediatek reuse more features
supported by stmmac_platform.c.
Signed-off-by: default avatarBiao Huang <biao.huang@mediatek.com>
Acked-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3186bdad
...@@ -334,23 +334,21 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv) ...@@ -334,23 +334,21 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv)
const struct mediatek_dwmac_variant *variant = plat->variant; const struct mediatek_dwmac_variant *variant = plat->variant;
int ret; int ret;
ret = dma_set_mask_and_coherent(plat->dev, DMA_BIT_MASK(variant->dma_bit_mask)); if (variant->dwmac_set_phy_interface) {
if (ret) {
dev_err(plat->dev, "No suitable DMA available, err = %d\n", ret);
return ret;
}
ret = variant->dwmac_set_phy_interface(plat); ret = variant->dwmac_set_phy_interface(plat);
if (ret) { if (ret) {
dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret); dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret);
return ret; return ret;
} }
}
if (variant->dwmac_set_delay) {
ret = variant->dwmac_set_delay(plat); ret = variant->dwmac_set_delay(plat);
if (ret) { if (ret) {
dev_err(plat->dev, "failed to set delay value, err = %d\n", ret); dev_err(plat->dev, "failed to set delay value, err = %d\n", ret);
return ret; return ret;
} }
}
ret = clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks); ret = clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks);
if (ret) { if (ret) {
...@@ -422,15 +420,15 @@ static int mediatek_dwmac_probe(struct platform_device *pdev) ...@@ -422,15 +420,15 @@ static int mediatek_dwmac_probe(struct platform_device *pdev)
return PTR_ERR(plat_dat); return PTR_ERR(plat_dat);
plat_dat->interface = priv_plat->phy_mode; plat_dat->interface = priv_plat->phy_mode;
plat_dat->has_gmac4 = 1; plat_dat->use_phy_wol = 1;
plat_dat->has_gmac = 0;
plat_dat->pmt = 0;
plat_dat->riwt_off = 1; plat_dat->riwt_off = 1;
plat_dat->maxmtu = ETH_DATA_LEN; plat_dat->maxmtu = ETH_DATA_LEN;
plat_dat->addr64 = priv_plat->variant->dma_bit_mask;
plat_dat->bsp_priv = priv_plat; plat_dat->bsp_priv = priv_plat;
plat_dat->init = mediatek_dwmac_init; plat_dat->init = mediatek_dwmac_init;
plat_dat->exit = mediatek_dwmac_exit; plat_dat->exit = mediatek_dwmac_exit;
plat_dat->clks_config = mediatek_dwmac_clks_config; plat_dat->clks_config = mediatek_dwmac_clks_config;
mediatek_dwmac_init(pdev, priv_plat); mediatek_dwmac_init(pdev, priv_plat);
ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
......
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