ASoC: Intel: bytcr_rt5651: use devm_clk_get_optional() for mclk

The devm_clk_get_optional() helper returns NULL when devm_clk_get()
returns -ENOENT. This makes things slightly cleaner. The added benefit
is mostly cosmetic.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20211007170250.27997-4-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

sound/soc/intel/boards/bytcr_rt5651.c

@@ -188,14 +188,11 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
 	}
 
 	if (SND_SOC_DAPM_EVENT_ON(event)) {
-		if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
 		ret = clk_prepare_enable(priv->mclk);
 		if (ret < 0) {
-				dev_err(card->dev,
-					"could not configure MCLK state");
+			dev_err(card->dev, "could not configure MCLK state");
 			return ret;
 		}
-		}
 		ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
 	} else {
 		/*
@@ -207,7 +204,6 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
 					     48000 * 512,
 					     SND_SOC_CLOCK_IN);
 		if (!ret)
-			if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
 			clk_disable_unprepare(priv->mclk);
 	}
 
@@ -629,15 +625,12 @@ static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
 		return ret;
 	}
 
-	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
 	/*
-		 * The firmware might enable the clock at
-		 * boot (this information may or may not
-		 * be reflected in the enable clock register).
-		 * To change the rate we must disable the clock
-		 * first to cover these cases. Due to common
-		 * clock framework restrictions that do not allow
-		 * to disable a clock that has not been enabled,
+	 * The firmware might enable the clock at boot (this information
+	 * may or may not be reflected in the enable clock register).
+	 * To change the rate we must disable the clock first to cover
+	 * these cases. Due to common clock framework restrictions that
+	 * do not allow to disable a clock that has not been enabled,
 	 * we need to enable the clock first.
 	 */
 	ret = clk_prepare_enable(priv->mclk);
@@ -651,7 +644,6 @@ static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
 
 	if (ret)
 		dev_err(card->dev, "unable to set MCLK rate\n");
-	}
 
 	report = 0;
 	if (BYT_RT5651_JDSRC(byt_rt5651_quirk))
@@ -1064,22 +1056,21 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
 		byt_rt5651_dais[dai_index].cpus->dai_name = "ssp0-port";
 
 	if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
-		priv->mclk = devm_clk_get(dev, "pmc_plt_clk_3");
+		priv->mclk = devm_clk_get_optional(dev, "pmc_plt_clk_3");
 		if (IS_ERR(priv->mclk)) {
 			ret_val = PTR_ERR(priv->mclk);
 			dev_err(dev,
 				"Failed to get MCLK from pmc_plt_clk_3: %d\n",
 				ret_val);
+			goto err;
+		}
 		/*
-			 * Fall back to bit clock usage for -ENOENT (clock not
-			 * available likely due to missing dependencies), bail
-			 * for all other errors, including -EPROBE_DEFER
+		 * Fall back to bit clock usage when clock is not
+		 * available likely due to missing dependencies.
 		 */
-			if (ret_val != -ENOENT)
-				goto err;
+		if (!priv->mclk)
 			byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
 	}
-	}
 
 	snprintf(byt_rt5651_components, sizeof(byt_rt5651_components),
 		 "cfg-spk:%s cfg-mic:%s%s",