Commit a87cd07b authored by Maxime Ripard's avatar Maxime Ripard Committed by Gregory CLEMENT

ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs

The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a
Performance Monitoring Unit.

Enable it so that we can have hardware-assisted perf support.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 0c2d652f
......@@ -73,6 +73,11 @@ cpu@0 {
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts-extended = <&mpic 3>;
};
soc {
#address-cells = <2>;
#size-cells = <1>;
......
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