Commit aae528d9 authored by Russell King's avatar Russell King

Merge branches 'acorn', 'ebsa110' and 'sa11x0' into platforms

......@@ -759,6 +759,7 @@ config ARCH_SA1100
select ARCH_REQUIRE_GPIOLIB
select HAVE_IDE
select NEED_MACH_MEMORY_H
select SPARSE_IRQ
help
Support for StrongARM 11x0 based boards.
......
This diff is collapsed.
......@@ -132,33 +132,9 @@
#define SKPCR_DCLKEN (1<<7)
#define SKPCR_PWMCLKEN (1<<8)
/*
* USB Host controller
*/
/* USB Host controller */
#define SA1111_USB 0x0400
/*
* Offsets from SA1111_USB_BASE
*/
#define SA1111_USB_STATUS 0x0118
#define SA1111_USB_RESET 0x011c
#define SA1111_USB_IRQTEST 0x0120
#define USB_RESET_FORCEIFRESET (1 << 0)
#define USB_RESET_FORCEHCRESET (1 << 1)
#define USB_RESET_CLKGENRESET (1 << 2)
#define USB_RESET_SIMSCALEDOWN (1 << 3)
#define USB_RESET_USBINTTEST (1 << 4)
#define USB_RESET_SLEEPSTBYEN (1 << 5)
#define USB_RESET_PWRSENSELOW (1 << 6)
#define USB_RESET_PWRCTRLLOW (1 << 7)
#define USB_STATUS_IRQHCIRMTWKUP (1 << 7)
#define USB_STATUS_IRQHCIBUFFACC (1 << 8)
#define USB_STATUS_NIRQHCIM (1 << 9)
#define USB_STATUS_NHCIMFCLR (1 << 10)
#define USB_STATUS_USBPWRSENSE (1 << 11)
/*
* Serial Audio Controller
*
......@@ -327,22 +303,6 @@
* PC_SSR GPIO Block C Sleep State
*/
#define _PA_DDR _SA1111( 0x1000 )
#define _PA_DRR _SA1111( 0x1004 )
#define _PA_DWR _SA1111( 0x1004 )
#define _PA_SDR _SA1111( 0x1008 )
#define _PA_SSR _SA1111( 0x100c )
#define _PB_DDR _SA1111( 0x1010 )
#define _PB_DRR _SA1111( 0x1014 )
#define _PB_DWR _SA1111( 0x1014 )
#define _PB_SDR _SA1111( 0x1018 )
#define _PB_SSR _SA1111( 0x101c )
#define _PC_DDR _SA1111( 0x1020 )
#define _PC_DRR _SA1111( 0x1024 )
#define _PC_DWR _SA1111( 0x1024 )
#define _PC_SDR _SA1111( 0x1028 )
#define _PC_SSR _SA1111( 0x102c )
#define SA1111_GPIO 0x1000
#define SA1111_GPIO_PADDR (0x000)
......@@ -425,106 +385,30 @@
#define SA1111_WAKEPOL0 0x0034
#define SA1111_WAKEPOL1 0x0038
/*
* PS/2 Trackpad and Mouse Interfaces
*
* Registers
* PS2CR Control Register
* PS2STAT Status Register
* PS2DATA Transmit/Receive Data register
* PS2CLKDIV Clock Division Register
* PS2PRECNT Clock Precount Register
* PS2TEST1 Test register 1
* PS2TEST2 Test register 2
* PS2TEST3 Test register 3
* PS2TEST4 Test register 4
*/
/* PS/2 Trackpad and Mouse Interfaces */
#define SA1111_KBD 0x0a00
#define SA1111_MSE 0x0c00
/*
* These are offsets from the above bases.
*/
#define SA1111_PS2CR 0x0000
#define SA1111_PS2STAT 0x0004
#define SA1111_PS2DATA 0x0008
#define SA1111_PS2CLKDIV 0x000c
#define SA1111_PS2PRECNT 0x0010
#define PS2CR_ENA 0x08
#define PS2CR_FKD 0x02
#define PS2CR_FKC 0x01
#define PS2STAT_STP 0x0100
#define PS2STAT_TXE 0x0080
#define PS2STAT_TXB 0x0040
#define PS2STAT_RXF 0x0020
#define PS2STAT_RXB 0x0010
#define PS2STAT_ENA 0x0008
#define PS2STAT_RXP 0x0004
#define PS2STAT_KBD 0x0002
#define PS2STAT_KBC 0x0001
/*
* PCMCIA Interface
*
* Registers
* PCSR Status Register
* PCCR Control Register
* PCSSR Sleep State Register
*/
/* PCMCIA Interface */
#define SA1111_PCMCIA 0x1600
/*
* These are offsets from the above base.
*/
#define SA1111_PCCR 0x0000
#define SA1111_PCSSR 0x0004
#define SA1111_PCSR 0x0008
#define PCSR_S0_READY (1<<0)
#define PCSR_S1_READY (1<<1)
#define PCSR_S0_DETECT (1<<2)
#define PCSR_S1_DETECT (1<<3)
#define PCSR_S0_VS1 (1<<4)
#define PCSR_S0_VS2 (1<<5)
#define PCSR_S1_VS1 (1<<6)
#define PCSR_S1_VS2 (1<<7)
#define PCSR_S0_WP (1<<8)
#define PCSR_S1_WP (1<<9)
#define PCSR_S0_BVD1 (1<<10)
#define PCSR_S0_BVD2 (1<<11)
#define PCSR_S1_BVD1 (1<<12)
#define PCSR_S1_BVD2 (1<<13)
#define PCCR_S0_RST (1<<0)
#define PCCR_S1_RST (1<<1)
#define PCCR_S0_FLT (1<<2)
#define PCCR_S1_FLT (1<<3)
#define PCCR_S0_PWAITEN (1<<4)
#define PCCR_S1_PWAITEN (1<<5)
#define PCCR_S0_PSE (1<<6)
#define PCCR_S1_PSE (1<<7)
#define PCSSR_S0_SLEEP (1<<0)
#define PCSSR_S1_SLEEP (1<<1)
extern struct bus_type sa1111_bus_type;
#define SA1111_DEVID_SBI 0
#define SA1111_DEVID_SK 1
#define SA1111_DEVID_USB 2
#define SA1111_DEVID_SAC 3
#define SA1111_DEVID_SSP 4
#define SA1111_DEVID_PS2 5
#define SA1111_DEVID_GPIO 6
#define SA1111_DEVID_INT 7
#define SA1111_DEVID_PCMCIA 8
#define SA1111_DEVID_SBI (1 << 0)
#define SA1111_DEVID_SK (1 << 1)
#define SA1111_DEVID_USB (1 << 2)
#define SA1111_DEVID_SAC (1 << 3)
#define SA1111_DEVID_SSP (1 << 4)
#define SA1111_DEVID_PS2 (3 << 5)
#define SA1111_DEVID_PS2_KBD (1 << 5)
#define SA1111_DEVID_PS2_MSE (1 << 6)
#define SA1111_DEVID_GPIO (1 << 7)
#define SA1111_DEVID_INT (1 << 8)
#define SA1111_DEVID_PCMCIA (1 << 9)
struct sa1111_dev {
struct device dev;
......@@ -548,6 +432,7 @@ struct sa1111_driver {
int (*remove)(struct sa1111_dev *);
int (*suspend)(struct sa1111_dev *, pm_message_t);
int (*resume)(struct sa1111_dev *);
void (*shutdown)(struct sa1111_dev *);
};
#define SA1111_DRV(_d) container_of((_d), struct sa1111_driver, drv)
......@@ -555,9 +440,10 @@ struct sa1111_driver {
#define SA1111_DRIVER_NAME(_sadev) ((_sadev)->dev.driver->name)
/*
* These frob the SKPCR register.
* These frob the SKPCR register, and call platform specific
* enable/disable functions.
*/
void sa1111_enable_device(struct sa1111_dev *);
int sa1111_enable_device(struct sa1111_dev *);
void sa1111_disable_device(struct sa1111_dev *);
unsigned int sa1111_pll_clock(struct sa1111_dev *);
......@@ -580,6 +466,10 @@ void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned i
struct sa1111_platform_data {
int irq_base; /* base for cascaded on-chip IRQs */
unsigned disable_devs;
void *data;
int (*enable)(void *, unsigned);
void (*disable)(void *, unsigned);
};
#endif /* _ASM_ARCH_SA1111 */
......@@ -30,10 +30,7 @@
#include <asm/mach/time.h>
#define IRQ_MASK 0xfe000000 /* read */
#define IRQ_MSET 0xfe000000 /* write */
#define IRQ_STAT 0xff000000 /* read */
#define IRQ_MCLR 0xff000000 /* write */
#include "core.h"
static void ebsa110_mask_irq(struct irq_data *d)
{
......@@ -79,22 +76,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
{ /* IRQ_STAT/IRQ_MCLR */
.virtual = IRQ_STAT,
.pfn = __phys_to_pfn(TRICK4_PHYS),
.length = PGDIR_SIZE,
.length = TRICK4_SIZE,
.type = MT_DEVICE
}, { /* IRQ_MASK/IRQ_MSET */
.virtual = IRQ_MASK,
.pfn = __phys_to_pfn(TRICK3_PHYS),
.length = PGDIR_SIZE,
.length = TRICK3_SIZE,
.type = MT_DEVICE
}, { /* SOFT_BASE */
.virtual = SOFT_BASE,
.pfn = __phys_to_pfn(TRICK1_PHYS),
.length = PGDIR_SIZE,
.length = TRICK1_SIZE,
.type = MT_DEVICE
}, { /* PIT_BASE */
.virtual = PIT_BASE,
.pfn = __phys_to_pfn(TRICK0_PHYS),
.length = PGDIR_SIZE,
.length = TRICK0_SIZE,
.type = MT_DEVICE
},
......
/*
* Copyright (C) 1996-2000 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This file contains the core hardware definitions of the EBSA-110.
*/
#ifndef CORE_H
#define CORE_H
/* Physical addresses/sizes */
#define ISAMEM_PHYS 0xe0000000
#define ISAMEM_SIZE 0x10000000
#define ISAIO_PHYS 0xf0000000
#define ISAIO_SIZE PGDIR_SIZE
#define TRICK0_PHYS 0xf2000000
#define TRICK0_SIZE PGDIR_SIZE
#define TRICK1_PHYS 0xf2400000
#define TRICK1_SIZE PGDIR_SIZE
#define TRICK2_PHYS 0xf2800000
#define TRICK3_PHYS 0xf2c00000
#define TRICK3_SIZE PGDIR_SIZE
#define TRICK4_PHYS 0xf3000000
#define TRICK4_SIZE PGDIR_SIZE
#define TRICK5_PHYS 0xf3400000
#define TRICK6_PHYS 0xf3800000
#define TRICK7_PHYS 0xf3c00000
/* Virtual addresses */
#define PIT_BASE 0xfc000000 /* trick 0 */
#define SOFT_BASE 0xfd000000 /* trick 1 */
#define IRQ_MASK 0xfe000000 /* trick 3 - read */
#define IRQ_MSET 0xfe000000 /* trick 3 - write */
#define IRQ_STAT 0xff000000 /* trick 4 - read */
#define IRQ_MCLR 0xff000000 /* trick 4 - write */
#endif
......@@ -12,48 +12,9 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/*
* The EBSA110 has a weird "ISA IO" region:
*
* Region 0 (addr = 0xf0000000 + io << 2)
* --------------------------------------------------------
* Physical region IO region
* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
* f0000e60 - f0000e64 398 - 399
* f0000de0 - f0000dfc 378 - 37f lp0
* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
*
* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
* --------------------------------------------------------
* Physical region IO region
* f00014f1 a79 pnp write data
* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
* f00004f1 279 pnp address
* f0000440 - f000046c 220 - 236 eth0
* f0000405 203 pnp read data
*/
#define ISAMEM_PHYS 0xe0000000
#define ISAMEM_SIZE 0x10000000
#define ISAIO_PHYS 0xf0000000
#define ISAIO_SIZE PGDIR_SIZE
#define TRICK0_PHYS 0xf2000000
#define TRICK1_PHYS 0xf2400000
#define TRICK2_PHYS 0xf2800000
#define TRICK3_PHYS 0xf2c00000
#define TRICK4_PHYS 0xf3000000
#define TRICK5_PHYS 0xf3400000
#define TRICK6_PHYS 0xf3800000
#define TRICK7_PHYS 0xf3c00000
#define ISAMEM_BASE 0xe0000000
#define ISAIO_BASE 0xf0000000
#define PIT_BASE 0xfc000000
#define SOFT_BASE 0xfd000000
/*
* RAM definitions
*/
......
......@@ -177,6 +177,26 @@ void writesl(void __iomem *addr, const void *data, int len)
}
EXPORT_SYMBOL(writesl);
/*
* The EBSA110 has a weird "ISA IO" region:
*
* Region 0 (addr = 0xf0000000 + io << 2)
* --------------------------------------------------------
* Physical region IO region
* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
* f0000e60 - f0000e64 398 - 399
* f0000de0 - f0000dfc 378 - 37f lp0
* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
*
* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
* --------------------------------------------------------
* Physical region IO region
* f00014f1 a79 pnp write data
* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
* f00004f1 279 pnp address
* f0000440 - f000046c 220 - 236 eth0
* f0000405 203 pnp read data
*/
#define SUPERIO_PORT(p) \
(((p) >> 3) == (0x3f8 >> 3) || \
((p) >> 3) == (0x2f8 >> 3) || \
......
......@@ -20,6 +20,8 @@
#include <asm/system.h>
#include <asm/mach-types.h>
#include "core.h"
static spinlock_t leds_lock;
static void ebsa110_leds_event(led_event_t ledevt)
......
......@@ -223,6 +223,7 @@ static struct resource sa1111_resources[] = {
static struct sa1111_platform_data sa1111_info = {
.irq_base = LUBBOCK_SA1111_IRQ_BASE,
.disable_devs = SA1111_DEVID_SAC,
};
static struct platform_device sa1111_device = {
......
......@@ -3,7 +3,7 @@
#
# Common support
obj-y := clock.o generic.o irq.o dma.o time.o #nmi-oopser.o
obj-y := clock.o generic.o irq.o time.o #nmi-oopser.o
obj-m :=
obj-n :=
obj- :=
......
......@@ -15,14 +15,16 @@
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/serial_core.h>
#include <linux/mfd/ucb1x00.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <video/sa1100fb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable-hwdef.h>
......@@ -36,17 +38,18 @@
#include <asm/mach/serial_sa1100.h>
#include <mach/assabet.h>
#include <mach/mcp.h>
#include <mach/irqs.h>
#include "generic.h"
#define ASSABET_BCR_DB1110 \
(ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
(ASSABET_BCR_SPK_OFF | \
ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
ASSABET_BCR_IRDA_MD0)
#define ASSABET_BCR_DB1111 \
(ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
(ASSABET_BCR_SPK_OFF | \
ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
......@@ -69,31 +72,10 @@ void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
EXPORT_SYMBOL(ASSABET_BCR_frob);
static void assabet_backlight_power(int on)
static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
{
#ifndef ASSABET_PAL_VIDEO
if (on)
ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
else
#endif
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}
/*
* Turn on/off the backlight. When turning the backlight on,
* we wait 500us after turning it on so we don't cause the
* supplies to droop when we enable the LCD controller (and
* cause a hard reset.)
*/
static void assabet_lcd_power(int on)
{
#ifndef ASSABET_PAL_VIDEO
if (on) {
ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
udelay(500);
} else
#endif
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
if (state == UCB_RST_PROBE)
ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
}
......@@ -152,15 +134,8 @@ static struct flash_platform_data assabet_flash_data = {
};
static struct resource assabet_flash_resources[] = {
{
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}, {
.start = SA1100_CS1_PHYS,
.end = SA1100_CS1_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
};
......@@ -199,18 +174,126 @@ static struct irda_platform_data assabet_irda_data = {
.set_speed = assabet_irda_set_speed,
};
static struct ucb1x00_plat_data assabet_ucb1x00_data = {
.reset = assabet_ucb1x00_reset,
.gpio_base = -1,
};
static struct mcp_plat_data assabet_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.codec_pdata = &assabet_ucb1x00_data,
};
static void assabet_lcd_set_visual(u32 visual)
{
u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
if (machine_is_assabet()) {
#if 1 // phase 4 or newer Assabet's
if (is_true_color)
ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
else
ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
#else
// older Assabet's
if (is_true_color)
ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
else
ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
#endif
}
}
#ifndef ASSABET_PAL_VIDEO
static void assabet_lcd_backlight_power(int on)
{
if (on)
ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
else
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}
/*
* Turn on/off the backlight. When turning the backlight on, we wait
* 500us after turning it on so we don't cause the supplies to droop
* when we enable the LCD controller (and cause a hard reset.)
*/
static void assabet_lcd_power(int on)
{
if (on) {
ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
udelay(500);
} else
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}
/*
* The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
* takes an RGB666 signal, but we provide it with an RGB565 signal
* instead (def_rgb_16).
*/
static struct sa1100fb_mach_info lq039q2ds54_info = {
.pixclock = 171521, .bpp = 16,
.xres = 320, .yres = 240,
.hsync_len = 5, .vsync_len = 1,
.left_margin = 61, .upper_margin = 3,
.right_margin = 9, .lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
.backlight_power = assabet_lcd_backlight_power,
.lcd_power = assabet_lcd_power,
.set_visual = assabet_lcd_set_visual,
};
#else
static void assabet_pal_backlight_power(int on)
{
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}
static void assabet_pal_power(int on)
{
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}
static struct sa1100fb_mach_info pal_info = {
.pixclock = 67797, .bpp = 16,
.xres = 640, .yres = 512,
.hsync_len = 64, .vsync_len = 6,
.left_margin = 125, .upper_margin = 70,
.right_margin = 115, .lower_margin = 36,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
.backlight_power = assabet_pal_backlight_power,
.lcd_power = assabet_pal_power,
.set_visual = assabet_lcd_set_visual,
};
#endif
#ifdef CONFIG_ASSABET_NEPONSET
static struct resource neponset_resources[] = {
DEFINE_RES_MEM(0x10000000, 0x08000000),
DEFINE_RES_MEM(0x18000000, 0x04000000),
DEFINE_RES_MEM(0x40000000, SZ_8K),
DEFINE_RES_IRQ(IRQ_GPIO25),
};
#endif
static void __init assabet_init(void)
{
/*
* Ensure that the power supply is in "high power" mode.
*/
GPDR |= GPIO_GPIO16;
GPSR = GPIO_GPIO16;
GPDR |= GPIO_GPIO16;
/*
* Ensure that these pins are set as outputs and are driving
......@@ -218,8 +301,16 @@ static void __init assabet_init(void)
* the WS latch in the CPLD, and we don't float causing
* excessive power drain. --rmk
*/
GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
/*
* Also set GPIO27 as an output; this is used to clock UART3
* via the FPGA and as otherwise has no pullups or pulldowns,
* so stop it floating.
*/
GPCR = GPIO_GPIO27;
GPDR |= GPIO_GPIO27;
/*
* Set up registers for sleep mode.
......@@ -231,8 +322,7 @@ static void __init assabet_init(void)
PPDR |= PPC_TXD3 | PPC_TXD1;
PPSR |= PPC_TXD3 | PPC_TXD1;
sa1100fb_lcd_power = assabet_lcd_power;
sa1100fb_backlight_power = assabet_backlight_power;
sa11x0_ppc_configure_mcp();
if (machine_has_neponset()) {
/*
......@@ -246,9 +336,17 @@ static void __init assabet_init(void)
#ifndef CONFIG_ASSABET_NEPONSET
printk( "Warning: Neponset detected but full support "
"hasn't been configured in the kernel\n" );
#else
platform_device_register_simple("neponset", 0,
neponset_resources, ARRAY_SIZE(neponset_resources));
#endif
}
#ifndef ASSABET_PAL_VIDEO
sa11x0_register_lcd(&lq039q2ds54_info);
#else
sa11x0_register_lcd(&pal_video);
#endif
sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
ARRAY_SIZE(assabet_flash_resources));
sa11x0_register_irda(&assabet_irda_data);
......@@ -412,21 +510,8 @@ static void __init assabet_map_io(void)
*/
Ser1SDCR0 |= SDCR0_SUS;
if (machine_has_neponset()) {
#ifdef CONFIG_ASSABET_NEPONSET
extern void neponset_map_io(void);
/*
* We map Neponset registers even if it isn't present since
* many drivers will try to probe their stuff (and fail).
* This is still more friendly than a kernel paging request
* crash.
*/
neponset_map_io();
#endif
} else {
if (!machine_has_neponset())
sa1100_register_uart_fns(&assabet_port_fns);
}
/*
* When Neponset is attached, the first UART should be
......@@ -449,6 +534,7 @@ MACHINE_START(ASSABET, "Intel-Assabet")
.atag_offset = 0x100,
.fixup = fixup_assabet,
.map_io = assabet_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = assabet_init,
......
......@@ -39,20 +39,27 @@
#include "generic.h"
static struct resource sa1111_resources[] = {
[0] = {
.start = BADGE4_SA1111_BASE,
.end = BADGE4_SA1111_BASE + 0x00001fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = BADGE4_IRQ_GPIO_SA1111,
.end = BADGE4_IRQ_GPIO_SA1111,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
[1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
};
static int badge4_sa1111_enable(void *data, unsigned devid)
{
if (devid == SA1111_DEVID_USB)
badge4_set_5V(BADGE4_5V_USB, 1);
return 0;
}
static void badge4_sa1111_disable(void *data, unsigned devid)
{
if (devid == SA1111_DEVID_USB)
badge4_set_5V(BADGE4_5V_USB, 0);
}
static struct sa1111_platform_data sa1111_info = {
.irq_base = IRQ_BOARD_END,
.disable_devs = SA1111_DEVID_PS2_MSE,
.enable = badge4_sa1111_enable,
.disable = badge4_sa1111_disable,
};
static u64 sa1111_dmamask = 0xffffffffUL;
......@@ -121,11 +128,8 @@ static struct flash_platform_data badge4_flash_data = {
.nr_parts = ARRAY_SIZE(badge4_partitions),
};
static struct resource badge4_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_64M - 1,
.flags = IORESOURCE_MEM,
};
static struct resource badge4_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
static int five_v_on __initdata = 0;
......@@ -269,11 +273,6 @@ static struct map_desc badge4_io_desc[] __initdata = {
.pfn = __phys_to_pfn(0x10000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* SA-1111 */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(0x48000000),
.length = 0x00100000,
.type = MT_DEVICE
}
};
......@@ -304,6 +303,7 @@ static void __init badge4_map_io(void)
MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
.atag_offset = 0x100,
.map_io = badge4_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
#ifdef CONFIG_SA1111
......
......@@ -18,7 +18,6 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/setup.h>
......@@ -30,14 +29,11 @@
#include <mach/cerf.h>
#include <mach/mcp.h>
#include <mach/irqs.h>
#include "generic.h"
static struct resource cerfuart2_resources[] = {
[0] = {
.start = 0x80030000,
.end = 0x8003ffff,
.flags = IORESOURCE_MEM,
},
[0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
};
static struct platform_device cerfuart2_device = {
......@@ -87,11 +83,8 @@ static struct flash_platform_data cerf_flash_data = {
.nr_parts = ARRAY_SIZE(cerf_partitions),
};
static struct resource cerf_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct resource cerf_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
static void __init cerf_init_irq(void)
{
......@@ -128,6 +121,7 @@ static struct mcp_plat_data cerf_mcp_data = {
static void __init cerf_init(void)
{
sa11x0_ppc_configure_mcp();
platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
sa11x0_register_mcp(&cerf_mcp_data);
......@@ -136,6 +130,7 @@ static void __init cerf_init(void)
MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
/* Maintainer: support@intrinsyc.com */
.map_io = cerf_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = cerf_init_irq,
.timer = &sa1100_timer,
.init_machine = cerf_init,
......
......@@ -22,15 +22,17 @@
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/mfd/ucb1x00.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/timer.h>
#include <linux/gpio.h>
#include <linux/pda_power.h>
#include <video/sa1100fb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <mach/collie.h>
......@@ -44,15 +46,12 @@
#include <asm/mach/sharpsl_param.h>
#include <asm/hardware/locomo.h>
#include <mach/mcp.h>
#include <mach/irqs.h>
#include "generic.h"
static struct resource collie_scoop_resources[] = {
[0] = {
.start = 0x40800000,
.end = 0x40800fff,
.flags = IORESOURCE_MEM,
},
[0] = DEFINE_RES_MEM(0x40800000, SZ_4K),
};
static struct scoop_config collie_scoop_setup = {
......@@ -85,10 +84,14 @@ static struct scoop_pcmcia_config collie_pcmcia_config = {
.num_devs = 1,
};
static struct ucb1x00_plat_data collie_ucb1x00_data = {
.gpio_base = COLLIE_TC35143_GPIO_BASE,
};
static struct mcp_plat_data collie_mcp_data = {
.mccr0 = MCCR0_ADM | MCCR0_ExtClk,
.sclk_rate = 9216000,
.gpio_base = COLLIE_TC35143_GPIO_BASE,
.codec_pdata = &collie_ucb1x00_data,
};
/*
......@@ -221,16 +224,8 @@ device_initcall(collie_uart_init);
static struct resource locomo_resources[] = {
[0] = {
.start = 0x40000000,
.end = 0x40001fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_GPIO25,
.end = IRQ_GPIO25,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(0x40000000, SZ_8K),
[1] = DEFINE_RES_IRQ(IRQ_GPIO25),
};
static struct locomo_platform_data locomo_info = {
......@@ -303,11 +298,21 @@ static struct flash_platform_data collie_flash_data = {
};
static struct resource collie_flash_resources[] = {
{
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
};
static struct sa1100fb_mach_info collie_lcd_info = {
.pixclock = 171521, .bpp = 16,
.xres = 320, .yres = 240,
.hsync_len = 5, .vsync_len = 1,
.left_margin = 11, .upper_margin = 2,
.right_margin = 30, .lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
};
static void __init collie_init(void)
......@@ -341,6 +346,10 @@ static void __init collie_init(void)
collie_power_resource[0].start = gpio_to_irq(COLLIE_GPIO_AC_IN);
collie_power_resource[0].end = gpio_to_irq(COLLIE_GPIO_AC_IN);
sa11x0_ppc_configure_mcp();
platform_scoop_config = &collie_pcmcia_config;
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
......@@ -348,6 +357,7 @@ static void __init collie_init(void)
printk(KERN_WARNING "collie: Unable to register LoCoMo device\n");
}
sa11x0_register_lcd(&collie_lcd_info);
sa11x0_register_mtd(&collie_flash_data, collie_flash_resources,
ARRAY_SIZE(collie_flash_resources));
sa11x0_register_mcp(&collie_mcp_data);
......@@ -383,6 +393,7 @@ static void __init collie_map_io(void)
MACHINE_START(COLLIE, "Sharp-Collie")
.map_io = collie_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = collie_init,
......
This diff is collapsed.
......@@ -14,18 +14,23 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/pm.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <video/sa1100fb.h>
#include <asm/div64.h>
#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "generic.h"
unsigned int reset_status;
......@@ -149,16 +154,8 @@ static void sa11x0_register_device(struct platform_device *dev, void *data)
static struct resource sa11x0udc_resources[] = {
[0] = {
.start = __PREG(Ser0UDCCR),
.end = __PREG(Ser0UDCCR) + 0xffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_Ser0UDC,
.end = IRQ_Ser0UDC,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
[1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
};
static u64 sa11x0udc_dma_mask = 0xffffffffUL;
......@@ -175,16 +172,8 @@ static struct platform_device sa11x0udc_device = {
};
static struct resource sa11x0uart1_resources[] = {
[0] = {
.start = __PREG(Ser1UTCR0),
.end = __PREG(Ser1UTCR0) + 0xffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_Ser1UART,
.end = IRQ_Ser1UART,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
[1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
};
static struct platform_device sa11x0uart1_device = {
......@@ -195,16 +184,8 @@ static struct platform_device sa11x0uart1_device = {
};
static struct resource sa11x0uart3_resources[] = {
[0] = {
.start = __PREG(Ser3UTCR0),
.end = __PREG(Ser3UTCR0) + 0xffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_Ser3UART,
.end = IRQ_Ser3UART,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
[1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
};
static struct platform_device sa11x0uart3_device = {
......@@ -215,16 +196,9 @@ static struct platform_device sa11x0uart3_device = {
};
static struct resource sa11x0mcp_resources[] = {
[0] = {
.start = __PREG(Ser4MCCR0),
.end = __PREG(Ser4MCCR0) + 0xffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_Ser4MCP,
.end = IRQ_Ser4MCP,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
[1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
[2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
};
static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
......@@ -240,22 +214,24 @@ static struct platform_device sa11x0mcp_device = {
.resource = sa11x0mcp_resources,
};
void __init sa11x0_ppc_configure_mcp(void)
{
/* Setup the PPC unit for the MCP */
PPDR &= ~PPC_RXD4;
PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
PSDR |= PPC_RXD4;
PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
}
void sa11x0_register_mcp(struct mcp_plat_data *data)
{
sa11x0_register_device(&sa11x0mcp_device, data);
}
static struct resource sa11x0ssp_resources[] = {
[0] = {
.start = 0x80070000,
.end = 0x8007ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_Ser4SSP,
.end = IRQ_Ser4SSP,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
[1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
};
static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
......@@ -272,16 +248,8 @@ static struct platform_device sa11x0ssp_device = {
};
static struct resource sa11x0fb_resources[] = {
[0] = {
.start = 0xb0100000,
.end = 0xb010ffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_LCD,
.end = IRQ_LCD,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
[1] = DEFINE_RES_IRQ(IRQ_LCD),
};
static struct platform_device sa11x0fb_device = {
......@@ -294,6 +262,11 @@ static struct platform_device sa11x0fb_device = {
.resource = sa11x0fb_resources,
};
void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
{
sa11x0_register_device(&sa11x0fb_device, inf);
}
static struct platform_device sa11x0pcmcia_device = {
.name = "sa11x0-pcmcia",
.id = -1,
......@@ -314,23 +287,10 @@ void sa11x0_register_mtd(struct flash_platform_data *flash,
}
static struct resource sa11x0ir_resources[] = {
{
.start = __PREG(Ser2UTCR0),
.end = __PREG(Ser2UTCR0) + 0x24 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = __PREG(Ser2HSCR0),
.end = __PREG(Ser2HSCR0) + 0x1c - 1,
.flags = IORESOURCE_MEM,
}, {
.start = __PREG(Ser2HSCR2),
.end = __PREG(Ser2HSCR2) + 0x04 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_Ser2ICP,
.end = IRQ_Ser2ICP,
.flags = IORESOURCE_IRQ,
}
DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
DEFINE_RES_IRQ(IRQ_Ser2ICP),
};
static struct platform_device sa11x0ir_device = {
......@@ -350,14 +310,37 @@ static struct platform_device sa11x0rtc_device = {
.id = -1,
};
static struct resource sa11x0dma_resources[] = {
DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
DEFINE_RES_IRQ(IRQ_DMA0),
DEFINE_RES_IRQ(IRQ_DMA1),
DEFINE_RES_IRQ(IRQ_DMA2),
DEFINE_RES_IRQ(IRQ_DMA3),
DEFINE_RES_IRQ(IRQ_DMA4),
DEFINE_RES_IRQ(IRQ_DMA5),
};
static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
static struct platform_device sa11x0dma_device = {
.name = "sa11x0-dma",
.id = -1,
.dev = {
.dma_mask = &sa11x0dma_dma_mask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(sa11x0dma_resources),
.resource = sa11x0dma_resources,
};
static struct platform_device *sa11x0_devices[] __initdata = {
&sa11x0udc_device,
&sa11x0uart1_device,
&sa11x0uart3_device,
&sa11x0ssp_device,
&sa11x0pcmcia_device,
&sa11x0fb_device,
&sa11x0rtc_device,
&sa11x0dma_device,
};
static int __init sa1100_init(void)
......@@ -368,12 +351,6 @@ static int __init sa1100_init(void)
arch_initcall(sa1100_init);
void (*sa1100fb_backlight_power)(int on);
void (*sa1100fb_lcd_power)(int on);
EXPORT_SYMBOL(sa1100fb_backlight_power);
EXPORT_SYMBOL(sa1100fb_lcd_power);
/*
* Common I/O mapping:
......@@ -428,7 +405,7 @@ void __init sa1100_map_io(void)
* the MBGNT signal false to ensure the SA1111 doesn't own the
* SDRAM bus.
*/
void __init sa1110_mb_disable(void)
void sa1110_mb_disable(void)
{
unsigned long flags;
......@@ -447,7 +424,7 @@ void __init sa1110_mb_disable(void)
* If the system is going to use the SA-1111 DMA engines, set up
* the memory bus request/grant pins.
*/
void __devinit sa1110_mb_enable(void)
void sa1110_mb_enable(void)
{
unsigned long flags;
......
......@@ -16,9 +16,6 @@ extern void sa11x0_restart(char, const char *);
mi->bank[__nr].start = (__start), \
mi->bank[__nr].size = (__size)
extern void (*sa1100fb_backlight_power)(int on);
extern void (*sa1100fb_lcd_power)(int on);
extern void sa1110_mb_enable(void);
extern void sa1110_mb_disable(void);
......@@ -39,4 +36,8 @@ struct irda_platform_data;
void sa11x0_register_irda(struct irda_platform_data *irda);
struct mcp_plat_data;
void sa11x0_ppc_configure_mcp(void);
void sa11x0_register_mcp(struct mcp_plat_data *data);
struct sa1100fb_mach_info;
void sa11x0_register_lcd(struct sa1100fb_mach_info *inf);
......@@ -14,11 +14,14 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <video/sa1100fb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/irda.h>
#include <mach/h3xxx.h>
#include <mach/irqs.h>
#include "generic.h"
......@@ -36,13 +39,28 @@ static void h3100_lcd_power(int enable)
}
}
static struct sa1100fb_mach_info h3100_lcd_info = {
.pixclock = 406977, .bpp = 4,
.xres = 320, .yres = 240,
.hsync_len = 26, .vsync_len = 41,
.left_margin = 4, .upper_margin = 0,
.right_margin = 4, .lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.cmap_greyscale = 1,
.cmap_inverse = 1,
.lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
.lcd_power = h3100_lcd_power,
};
static void __init h3100_map_io(void)
{
h3xxx_map_io();
sa1100fb_lcd_power = h3100_lcd_power;
/* Older bootldrs put GPIO2-9 in alternate mode on the
assumption that they are used for video */
GAFR &= ~0x000001fb;
......@@ -80,12 +98,15 @@ static void __init h3100_mach_init(void)
{
h3xxx_init_gpio(h3100_default_gpio, ARRAY_SIZE(h3100_default_gpio));
h3xxx_mach_init();
sa11x0_register_lcd(&h3100_lcd_info);
sa11x0_register_irda(&h3100_irda_data);
}
MACHINE_START(H3100, "Compaq iPAQ H3100")
.atag_offset = 0x100,
.map_io = h3100_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = h3100_mach_init,
......
......@@ -14,11 +14,14 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <video/sa1100fb.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/irda.h>
#include <mach/h3xxx.h>
#include <mach/irqs.h>
#include "generic.h"
......@@ -56,11 +59,35 @@ err2: gpio_free(H3XXX_EGPIO_LCD_ON);
err1: return;
}
static const struct sa1100fb_rgb h3600_rgb_16 = {
.red = { .offset = 12, .length = 4, },
.green = { .offset = 7, .length = 4, },
.blue = { .offset = 1, .length = 4, },
.transp = { .offset = 0, .length = 0, },
};
static struct sa1100fb_mach_info h3600_lcd_info = {
.pixclock = 174757, .bpp = 16,
.xres = 320, .yres = 240,
.hsync_len = 3, .vsync_len = 3,
.left_margin = 12, .upper_margin = 10,
.right_margin = 17, .lower_margin = 1,
.cmap_static = 1,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
.rgb[RGB_16] = &h3600_rgb_16,
.lcd_power = h3600_lcd_power,
};
static void __init h3600_map_io(void)
{
h3xxx_map_io();
sa1100fb_lcd_power = h3600_lcd_power;
}
/*
......@@ -121,12 +148,15 @@ static void __init h3600_mach_init(void)
{
h3xxx_init_gpio(h3600_default_gpio, ARRAY_SIZE(h3600_default_gpio));
h3xxx_mach_init();
sa11x0_register_lcd(&h3600_lcd_info);
sa11x0_register_irda(&h3600_irda_data);
}
MACHINE_START(H3600, "Compaq iPAQ H3600")
.atag_offset = 0x100,
.map_io = h3600_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = h3600_mach_init,
......
......@@ -109,11 +109,8 @@ static struct flash_platform_data h3xxx_flash_data = {
.nr_parts = ARRAY_SIZE(h3xxx_partitions),
};
static struct resource h3xxx_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct resource h3xxx_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
/*
......@@ -186,11 +183,7 @@ static struct sa1100_port_fns h3xxx_port_fns __initdata = {
*/
static struct resource egpio_resources[] = {
[0] = {
.start = H3600_EGPIO_PHYS,
.end = H3600_EGPIO_PHYS + 0x4 - 1,
.flags = IORESOURCE_MEM,
},
[0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4),
};
static struct htc_egpio_chip egpio_chips[] = {
......
......@@ -22,12 +22,10 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
......@@ -35,6 +33,9 @@
#include <asm/mach/irq.h>
#include <asm/mach/serial_sa1100.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "generic.h"
/**********************************************************************
......@@ -179,11 +180,8 @@ static struct flash_platform_data hackkit_flash_data = {
.nr_parts = ARRAY_SIZE(hackkit_partitions),
};
static struct resource hackkit_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M,
.flags = IORESOURCE_MEM,
};
static struct resource hackkit_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
static void __init hackkit_init(void)
{
......@@ -197,6 +195,7 @@ static void __init hackkit_init(void)
MACHINE_START(HACKKIT, "HackKit Cpu Board")
.atag_offset = 0x100,
.map_io = hackkit_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = hackkit_init,
......
This diff is collapsed.
/*
* arch/arm/mach-sa1100/include/mach/dma.h
*
* Generic SA1100 DMA support
*
* Copyright (C) 2000 Nicolas Pitre
*
*/
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
#include "hardware.h"
/*
* The SA1100 has six internal DMA channels.
*/
#define SA1100_DMA_CHANNELS 6
/*
* Maximum physical DMA buffer size
*/
#define MAX_DMA_SIZE 0x1fff
#define CUT_DMA_SIZE 0x1000
/*
* All possible SA1100 devices a DMA channel can be attached to.
*/
typedef enum {
DMA_Ser0UDCWr = DDAR_Ser0UDCWr, /* Ser. port 0 UDC Write */
DMA_Ser0UDCRd = DDAR_Ser0UDCRd, /* Ser. port 0 UDC Read */
DMA_Ser1UARTWr = DDAR_Ser1UARTWr, /* Ser. port 1 UART Write */
DMA_Ser1UARTRd = DDAR_Ser1UARTRd, /* Ser. port 1 UART Read */
DMA_Ser1SDLCWr = DDAR_Ser1SDLCWr, /* Ser. port 1 SDLC Write */
DMA_Ser1SDLCRd = DDAR_Ser1SDLCRd, /* Ser. port 1 SDLC Read */
DMA_Ser2UARTWr = DDAR_Ser2UARTWr, /* Ser. port 2 UART Write */
DMA_Ser2UARTRd = DDAR_Ser2UARTRd, /* Ser. port 2 UART Read */
DMA_Ser2HSSPWr = DDAR_Ser2HSSPWr, /* Ser. port 2 HSSP Write */
DMA_Ser2HSSPRd = DDAR_Ser2HSSPRd, /* Ser. port 2 HSSP Read */
DMA_Ser3UARTWr = DDAR_Ser3UARTWr, /* Ser. port 3 UART Write */
DMA_Ser3UARTRd = DDAR_Ser3UARTRd, /* Ser. port 3 UART Read */
DMA_Ser4MCP0Wr = DDAR_Ser4MCP0Wr, /* Ser. port 4 MCP 0 Write (audio) */
DMA_Ser4MCP0Rd = DDAR_Ser4MCP0Rd, /* Ser. port 4 MCP 0 Read (audio) */
DMA_Ser4MCP1Wr = DDAR_Ser4MCP1Wr, /* Ser. port 4 MCP 1 Write */
DMA_Ser4MCP1Rd = DDAR_Ser4MCP1Rd, /* Ser. port 4 MCP 1 Read */
DMA_Ser4SSPWr = DDAR_Ser4SSPWr, /* Ser. port 4 SSP Write (16 bits) */
DMA_Ser4SSPRd = DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */
} dma_device_t;
typedef struct {
volatile u_long DDAR;
volatile u_long SetDCSR;
volatile u_long ClrDCSR;
volatile u_long RdDCSR;
volatile dma_addr_t DBSA;
volatile u_long DBTA;
volatile dma_addr_t DBSB;
volatile u_long DBTB;
} dma_regs_t;
typedef void (*dma_callback_t)(void *data);
/*
* DMA function prototypes
*/
extern int sa1100_request_dma( dma_device_t device, const char *device_id,
dma_callback_t callback, void *data,
dma_regs_t **regs );
extern void sa1100_free_dma( dma_regs_t *regs );
extern int sa1100_start_dma( dma_regs_t *regs, dma_addr_t dma_ptr, u_int size );
extern dma_addr_t sa1100_get_dma_pos(dma_regs_t *regs);
extern void sa1100_reset_dma(dma_regs_t *regs);
/**
* sa1100_stop_dma - stop DMA in progress
* @regs: identifier for the channel to use
*
* This stops DMA without clearing buffer pointers. Unlike
* sa1100_clear_dma() this allows subsequent use of sa1100_resume_dma()
* or sa1100_get_dma_pos().
*
* The @regs identifier is provided by a successful call to
* sa1100_request_dma().
**/
#define sa1100_stop_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN)
/**
* sa1100_resume_dma - resume DMA on a stopped channel
* @regs: identifier for the channel to use
*
* This resumes DMA on a channel previously stopped with
* sa1100_stop_dma().
*
* The @regs identifier is provided by a successful call to
* sa1100_request_dma().
**/
#define sa1100_resume_dma(regs) ((regs)->SetDCSR = DCSR_IE|DCSR_RUN)
/**
* sa1100_clear_dma - clear DMA pointers
* @regs: identifier for the channel to use
*
* This clear any DMA state so the DMA engine is ready to restart
* with new buffers through sa1100_start_dma(). Any buffers in flight
* are discarded.
*
* The @regs identifier is provided by a successful call to
* sa1100_request_dma().
**/
#define sa1100_clear_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN|DCSR_STRTA|DCSR_STRTB)
#endif /* _ASM_ARCH_DMA_H */
......@@ -71,22 +71,19 @@
/*
* Figure out the MAX IRQ number.
*
* If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
* If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
* Otherwise, we have the standard IRQs only.
* Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically
* allocate their IRQs above NR_IRQS.
*
* LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
* to be included in the NR_IRQS calculation.
*/
#ifdef CONFIG_SA1111
#define NR_IRQS (IRQ_BOARD_END + 55)
#elif defined(CONFIG_SHARP_LOCOMO)
#define NR_IRQS (IRQ_BOARD_START + 4)
#ifdef CONFIG_SHARP_LOCOMO
#define NR_IRQS_LOCOMO 4
#else
#define NR_IRQS (IRQ_BOARD_START)
#define NR_IRQS_LOCOMO 0
#endif
/*
* Board specific IRQs. Define them here.
* Do not surround them with ifdefs.
*/
#define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0)
#define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1)
#define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2)
#ifndef NR_IRQS
#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
#endif
#define SA1100_NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
......@@ -16,7 +16,7 @@ struct mcp_plat_data {
u32 mccr0;
u32 mccr1;
unsigned int sclk_rate;
int gpio_base;
void *codec_pdata;
};
#endif
......@@ -15,54 +15,6 @@
/*
* Neponset definitions:
*/
#define NEPONSET_CPLD_BASE (0x10000000)
#define Nep_p2v( x ) ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
#define Nep_v2p( x ) ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
#define _IRR 0x10000024 /* Interrupt Reason Register */
#define _AUD_CTL 0x100000c0 /* Audio controls (RW) */
#define _MDM_CTL_0 0x100000b0 /* Modem control 0 (RW) */
#define _MDM_CTL_1 0x100000b4 /* Modem control 1 (RW) */
#define _NCR_0 0x100000a0 /* Control Register (RW) */
#define _KP_X_OUT 0x10000090 /* Keypad row write (RW) */
#define _KP_Y_IN 0x10000080 /* Keypad column read (RO) */
#define _SWPK 0x10000020 /* Switch pack (RO) */
#define _WHOAMI 0x10000000 /* System ID Register (RO) */
#define _LEDS 0x10000010 /* LEDs [31:0] (WO) */
#define IRR (*((volatile u_char *) Nep_p2v(_IRR)))
#define AUD_CTL (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
#define MDM_CTL_0 (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
#define MDM_CTL_1 (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
#define NCR_0 (*((volatile u_char *) Nep_p2v(_NCR_0)))
#define KP_X_OUT (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
#define KP_Y_IN (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
#define SWPK (*((volatile u_char *) Nep_p2v(_SWPK)))
#define WHOAMI (*((volatile u_char *) Nep_p2v(_WHOAMI)))
#define LEDS (*((volatile Word *) Nep_p2v(_LEDS)))
#define IRR_ETHERNET (1<<0)
#define IRR_USAR (1<<1)
#define IRR_SA1111 (1<<2)
#define AUD_SEL_1341 (1<<0)
#define AUD_MUTE_1341 (1<<1)
#define MDM_CTL0_RTS1 (1 << 0)
#define MDM_CTL0_DTR1 (1 << 1)
#define MDM_CTL0_RTS2 (1 << 2)
#define MDM_CTL0_DTR2 (1 << 3)
#define MDM_CTL1_CTS1 (1 << 0)
#define MDM_CTL1_DSR1 (1 << 1)
#define MDM_CTL1_DCD1 (1 << 2)
#define MDM_CTL1_CTS2 (1 << 3)
#define MDM_CTL1_DSR2 (1 << 4)
#define MDM_CTL1_DCD2 (1 << 5)
#define NCR_GP01_OFF (1<<0)
#define NCR_TP_PWR_EN (1<<1)
#define NCR_MS_PWR_EN (1<<2)
......@@ -71,4 +23,8 @@
#define NCR_A0VPP (1<<5)
#define NCR_A1VPP (1<<6)
void neponset_ncr_frob(unsigned int, unsigned int);
#define neponset_ncr_set(v) neponset_ncr_frob(0, v)
#define neponset_ncr_clear(v) neponset_ncr_frob(v, 0)
#endif
......@@ -21,7 +21,7 @@
#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */
#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */
#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */
#define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */
#define SHANNON_GPIO_DISP_EN 22 /* out */
/* XXX GPIO 23 unaccounted for */
#define SHANNON_GPIO_EJECT_0 GPIO_GPIO (24) /* in */
#define SHANNON_IRQ_GPIO_EJECT_0 IRQ_GPIO24
......
......@@ -17,6 +17,7 @@
#include <linux/syscore_ops.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <asm/mach/irq.h>
#include "generic.h"
......@@ -221,11 +222,8 @@ static struct irq_chip sa1100_normal_chip = {
.irq_set_wake = sa1100_set_wake,
};
static struct resource irq_resource = {
.name = "irqs",
.start = 0x90050000,
.end = 0x9005ffff,
};
static struct resource irq_resource =
DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
static struct sa1100irq_state {
unsigned int saved;
......
......@@ -23,9 +23,7 @@
#include <linux/mtd/partitions.h>
#include <video/s1d13xxxfb.h>
#include <mach/hardware.h>
#include <asm/hardware/sa1111.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
......@@ -34,6 +32,9 @@
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include "generic.h"
/*
......@@ -46,7 +47,7 @@
/* memory space (line 52 of HP's doc) */
#define SA1111REGSTART 0x40000000
#define SA1111REGLEN 0x00001fff
#define SA1111REGLEN 0x00002000
#define EPSONREGSTART 0x48000000
#define EPSONREGLEN 0x00100000
#define EPSONFBSTART 0x48200000
......@@ -174,16 +175,8 @@ static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
};
static struct resource s1d13xxxfb_resources[] = {
[0] = {
.start = EPSONFBSTART,
.end = EPSONFBSTART + EPSONFBLEN,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = EPSONREGSTART,
.end = EPSONREGSTART + EPSONREGLEN,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(EPSONFBSTART, EPSONFBLEN),
[1] = DEFINE_RES_MEM(EPSONREGSTART, EPSONREGLEN),
};
static struct platform_device s1d13xxxfb_device = {
......@@ -197,20 +190,12 @@ static struct platform_device s1d13xxxfb_device = {
};
static struct resource sa1111_resources[] = {
[0] = {
.start = SA1111REGSTART,
.end = SA1111REGSTART + SA1111REGLEN,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_GPIO1,
.end = IRQ_GPIO1,
.flags = IORESOURCE_IRQ,
},
[0] = DEFINE_RES_MEM(SA1111REGSTART, SA1111REGLEN),
[1] = DEFINE_RES_IRQ(IRQ_GPIO1),
};
static struct sa1111_platform_data sa1111_info = {
.irq_base = IRQ_BOARD_END,
.disable_devs = SA1111_DEVID_PS2_MSE,
};
static u64 sa1111_dmamask = 0xffffffffUL;
......@@ -284,11 +269,6 @@ static struct map_desc jornada720_io_desc[] __initdata = {
.pfn = __phys_to_pfn(EPSONFBSTART),
.length = EPSONFBLEN,
.type = MT_DEVICE
}, { /* SA-1111 */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(SA1111REGSTART),
.length = SA1111REGLEN,
.type = MT_DEVICE
}
};
......@@ -352,11 +332,8 @@ static struct flash_platform_data jornada720_flash_data = {
.nr_parts = ARRAY_SIZE(jornada720_partitions),
};
static struct resource jornada720_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct resource jornada720_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
static void __init jornada720_mach_init(void)
{
......@@ -367,6 +344,7 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
/* Maintainer: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> */
.atag_offset = 0x100,
.map_io = jornada720_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = jornada720_mach_init,
......
......@@ -6,6 +6,8 @@
#include <linux/kernel.h>
#include <linux/tty.h>
#include <video/sa1100fb.h>
#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
......@@ -15,6 +17,7 @@
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
#include <mach/mcp.h>
#include <mach/irqs.h>
#include "generic.h"
......@@ -26,8 +29,86 @@ static struct mcp_plat_data lart_mcp_data = {
.sclk_rate = 11981000,
};
#ifdef LART_GREY_LCD
static struct sa1100fb_mach_info lart_grey_info = {
.pixclock = 150000, .bpp = 4,
.xres = 320, .yres = 240,
.hsync_len = 1, .vsync_len = 1,
.left_margin = 4, .upper_margin = 0,
.right_margin = 2, .lower_margin = 0,
.cmap_greyscale = 1,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
};
#endif
#ifdef LART_COLOR_LCD
static struct sa1100fb_mach_info lart_color_info = {
.pixclock = 150000, .bpp = 16,
.xres = 320, .yres = 240,
.hsync_len = 2, .vsync_len = 3,
.left_margin = 69, .upper_margin = 14,
.right_margin = 8, .lower_margin = 4,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
};
#endif
#ifdef LART_VIDEO_OUT
static struct sa1100fb_mach_info lart_video_info = {
.pixclock = 39721, .bpp = 16,
.xres = 640, .yres = 480,
.hsync_len = 95, .vsync_len = 2,
.left_margin = 40, .upper_margin = 32,
.right_margin = 24, .lower_margin = 11,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
};
#endif
#ifdef LART_KIT01_LCD
static struct sa1100fb_mach_info lart_kit01_info = {
.pixclock = 63291, .bpp = 16,
.xres = 640, .yres = 480,
.hsync_len = 64, .vsync_len = 3,
.left_margin = 122, .upper_margin = 45,
.right_margin = 10, .lower_margin = 10,
.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
.lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg
};
#endif
static void __init lart_init(void)
{
struct sa1100fb_mach_info *inf = NULL;
#ifdef LART_GREY_LCD
inf = &lart_grey_info;
#endif
#ifdef LART_COLOR_LCD
inf = &lart_color_info;
#endif
#ifdef LART_VIDEO_OUT
inf = &lart_video_info;
#endif
#ifdef LART_KIT01_LCD
inf = &lart_kit01_info;
#endif
if (inf)
sa11x0_register_lcd(inf);
sa11x0_ppc_configure_mcp();
sa11x0_register_mcp(&lart_mcp_data);
}
......@@ -63,6 +144,7 @@ static void __init lart_map_io(void)
MACHINE_START(LART, "LART")
.atag_offset = 0x100,
.map_io = lart_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.init_machine = lart_init,
.timer = &sa1100_timer,
......
......@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <mach/nanoengine.h>
#include <mach/irqs.h>
#include "generic.h"
......@@ -58,15 +59,8 @@ static struct flash_platform_data nanoengine_flash_data = {
};
static struct resource nanoengine_flash_resources[] = {
{
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}, {
.start = SA1100_CS1_PHYS,
.end = SA1100_CS1_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
}
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
};
static struct map_desc nanoengine_io_desc[] __initdata = {
......@@ -114,6 +108,7 @@ static void __init nanoengine_init(void)
MACHINE_START(NANOENGINE, "BSE nanoEngine")
.atag_offset = 0x100,
.map_io = nanoengine_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = nanoengine_init,
......
This diff is collapsed.
......@@ -135,12 +135,8 @@ struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys
&sys->resources);
}
static struct resource pci_io_ports = {
.name = "PCI IO",
.start = 0x400,
.end = 0x7FF,
.flags = IORESOURCE_IO,
};
static struct resource pci_io_ports =
DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
static struct resource pci_non_prefetchable_memory = {
.name = "PCI non-prefetchable",
......
......@@ -37,17 +37,9 @@
#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21
static struct resource smc91x_resources[] = {
[0] = {
.start = PLEB_ETH0_P,
.end = PLEB_ETH0_P | 0x03ffffff,
.flags = IORESOURCE_MEM,
},
[0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
[1] = {
.start = IRQ_GPIO_ETH0_IRQ,
.end = IRQ_GPIO_ETH0_IRQ,
.flags = IORESOURCE_IRQ,
},
[1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
#endif
};
......@@ -70,16 +62,8 @@ static struct platform_device *devices[] __initdata = {
* the two SA1100 lowest chip select outputs.
*/
static struct resource pleb_flash_resources[] = {
[0] = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SA1100_CS1_PHYS,
.end = SA1100_CS1_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
}
[0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
[1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
};
......@@ -147,6 +131,7 @@ static void __init pleb_map_io(void)
MACHINE_START(PLEB, "PLEB")
.map_io = pleb_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = pleb_init,
......
......@@ -9,6 +9,8 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <video/sa1100fb.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
......@@ -19,6 +21,7 @@
#include <asm/mach/serial_sa1100.h>
#include <mach/mcp.h>
#include <mach/shannon.h>
#include <mach/irqs.h>
#include "generic.h"
......@@ -46,19 +49,32 @@ static struct flash_platform_data shannon_flash_data = {
.nr_parts = ARRAY_SIZE(shannon_partitions),
};
static struct resource shannon_flash_resource = {
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_4M - 1,
.flags = IORESOURCE_MEM,
};
static struct resource shannon_flash_resource =
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
static struct mcp_plat_data shannon_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
};
static struct sa1100fb_mach_info shannon_lcd_info = {
.pixclock = 152500, .bpp = 8,
.xres = 640, .yres = 480,
.hsync_len = 4, .vsync_len = 3,
.left_margin = 2, .upper_margin = 0,
.right_margin = 1, .lower_margin = 0,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
.lccr3 = LCCR3_ACBsDiv(512),
};
static void __init shannon_init(void)
{
sa11x0_ppc_configure_mcp();
sa11x0_register_lcd(&shannon_lcd_info);
sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
sa11x0_register_mcp(&shannon_mcp_data);
}
......@@ -84,6 +100,7 @@ static void __init shannon_map_io(void)
MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
.atag_offset = 0x100,
.map_io = shannon_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.init_machine = shannon_init,
......
......@@ -10,12 +10,12 @@
#include <linux/string.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <linux/mfd/ucb1x00.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/setup.h>
......@@ -26,6 +26,7 @@
#include <asm/mach/serial_sa1100.h>
#include <mach/mcp.h>
#include <mach/simpad.h>
#include <mach/irqs.h>
#include <linux/serial_core.h>
#include <linux/ioport.h>
......@@ -176,21 +177,18 @@ static struct flash_platform_data simpad_flash_data = {
static struct resource simpad_flash_resources [] = {
{
.start = SA1100_CS0_PHYS,
.end = SA1100_CS0_PHYS + SZ_16M -1,
.flags = IORESOURCE_MEM,
}, {
.start = SA1100_CS1_PHYS,
.end = SA1100_CS1_PHYS + SZ_16M -1,
.flags = IORESOURCE_MEM,
}
DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M),
DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
};
static struct ucb1x00_plat_data simpad_ucb1x00_data = {
.gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
};
static struct mcp_plat_data simpad_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,
.gpio_base = SIMPAD_UCB1X00_GPIO_BASE,
.codec_pdata = &simpad_ucb1x00_data,
};
......@@ -376,6 +374,7 @@ static int __init simpad_init(void)
pm_power_off = simpad_power_off;
sa11x0_ppc_configure_mcp();
sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
ARRAY_SIZE(simpad_flash_resources));
sa11x0_register_mcp(&simpad_mcp_data);
......@@ -394,6 +393,7 @@ MACHINE_START(SIMPAD, "Simpad")
/* Maintainer: Holger Freyther */
.atag_offset = 0x100,
.map_io = simpad_map_io,
.nr_irqs = SA1100_NR_IRQS,
.init_irq = sa1100_init_irq,
.timer = &sa1100_timer,
.restart = sa11x0_restart,
......
......@@ -26,27 +26,36 @@
*
* Causes sa11x0 to enter sleep state
*
* Must be aligned to a cacheline.
*/
.balign 32
ENTRY(sa1100_finish_suspend)
@ disable clock switching
mcr p15, 0, r1, c15, c2, 2
ldr r6, =MDREFR
ldr r4, [r6]
orr r4, r4, #MDREFR_K1DB2
ldr r5, =PPCR
@ Pre-load __udelay into the I-cache
mov r0, #1
bl __udelay
mov r0, r0
@ The following must all exist in a single cache line to
@ avoid accessing memory until this sequence is complete,
@ otherwise we occasionally hang.
@ Adjust memory timing before lowering CPU clock
@ Clock speed adjustment without changing memory timing makes
@ CPU hang in some cases
ldr r0, =MDREFR
ldr r1, [r0]
orr r1, r1, #MDREFR_K1DB2
str r1, [r0]
str r4, [r6]
@ delay 90us and set CPU PLL to lowest speed
@ fixes resume problem on high speed SA1110
mov r0, #90
bl __udelay
ldr r0, =PPCR
mov r1, #0
str r1, [r0]
str r1, [r5]
mov r0, #90
bl __udelay
......@@ -85,12 +94,10 @@ ENTRY(sa1100_finish_suspend)
bic r5, r5, #FMsk(MSC_RT)
bic r5, r5, #FMsk(MSC_RT)<<16
ldr r6, =MDREFR
ldr r7, [r6]
bic r7, r7, #0x0000FF00
bic r7, r7, #0x000000F0
orr r8, r7, #MDREFR_SLFRSH
bic r7, r7, #0x0000FF00
bic r7, r7, #0x000000F0
orr r8, r7, #MDREFR_SLFRSH
ldr r9, =MDCNFG
ldr r10, [r9]
......
......@@ -19,8 +19,8 @@
#include <linux/init.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <asm/hardware/ssp.h>
#define TIMEOUT 100000
......
......@@ -18,6 +18,7 @@
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
static u32 notrace sa1100_read_sched_clock(void)
{
......
......@@ -252,6 +252,15 @@ config EP93XX_DMA
help
Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
config DMA_SA11X0
tristate "SA-11x0 DMA support"
depends on ARCH_SA1100
select DMA_ENGINE
help
Support the DMA engine found on Intel StrongARM SA-1100 and
SA-1110 SoCs. This DMA engine can only be used with on-chip
devices.
config DMA_ENGINE
bool
......
......@@ -27,3 +27,4 @@ obj-$(CONFIG_PL330_DMA) += pl330.o
obj-$(CONFIG_PCH_DMA) += pch_dma.o
obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
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......@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset)
{
......
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