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Commit ab19aef6 authored by David S. Miller's avatar David S. Miller
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[SPARC64]: Kill insn scheduling comments from etrap.S 

They just make the columns super wide and the
code harder to read and edit.
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent fad0b64b
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Showing with 151 additions and 150 deletions
arch/sparc64/kernel/etrap.S
View file @ ab19aef6
...@@ -17,7 +17,8 @@ ...@@ -17,7 +17,8 @@
#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ) #define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV) #define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
#define ETRAP_PSTATE2 (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE) #define ETRAP_PSTATE2 \
(PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
/* /*
* On entry, %g7 is return address - 0x4. * On entry, %g7 is return address - 0x4.
...@@ -27,91 +28,91 @@ ...@@ -27,91 +28,91 @@
.text .text
.align 64 .align 64
.globl etrap, etrap_irq, etraptl1 .globl etrap, etrap_irq, etraptl1
etrap: rdpr %pil, %g2 ! Single Group etrap: rdpr %pil, %g2
etrap_irq: etrap_irq:
rdpr %tstate, %g1 ! Single Group rdpr %tstate, %g1
sllx %g2, 20, %g3 ! IEU0 Group sllx %g2, 20, %g3
andcc %g1, TSTATE_PRIV, %g0 ! IEU1 andcc %g1, TSTATE_PRIV, %g0
or %g1, %g3, %g1 ! IEU0 Group or %g1, %g3, %g1
bne,pn %xcc, 1f ! CTI bne,pn %xcc, 1f
sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2 ! IEU1 sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2
wrpr %g0, 7, %cleanwin ! Single Group+4bubbles wrpr %g0, 7, %cleanwin
sethi %hi(TASK_REGOFF), %g2 ! IEU0 Group sethi %hi(TASK_REGOFF), %g2
sethi %hi(TSTATE_PEF), %g3 ! IEU1 sethi %hi(TSTATE_PEF), %g3
or %g2, %lo(TASK_REGOFF), %g2 ! IEU0 Group or %g2, %lo(TASK_REGOFF), %g2
and %g1, %g3, %g3 ! IEU1 and %g1, %g3, %g3
brnz,pn %g3, 1f ! CTI+IEU1 Group brnz,pn %g3, 1f
add %g6, %g2, %g2 ! IEU0 add %g6, %g2, %g2
wr %g0, 0, %fprs ! Single Group+4bubbles wr %g0, 0, %fprs
1: rdpr %tpc, %g3 ! Single Group 1: rdpr %tpc, %g3
stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] ! Store Group stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE]
rdpr %tnpc, %g1 ! Single Group rdpr %tnpc, %g1
stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] ! Store Group stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
rd %y, %g3 ! Single Group+4bubbles rd %y, %g3
stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] ! Store Group stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC]
st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y] ! Store Group st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y]
save %g2, -STACK_BIAS, %sp ! Ordering here is critical ! Single Group save %g2, -STACK_BIAS, %sp ! Ordering here is critical
mov %g6, %l6 ! IEU0 Group mov %g6, %l6
bne,pn %xcc, 3f ! CTI bne,pn %xcc, 3f
mov PRIMARY_CONTEXT, %l4 ! IEU1 mov PRIMARY_CONTEXT, %l4
rdpr %canrestore, %g3 ! Single Group+4bubbles rdpr %canrestore, %g3
rdpr %wstate, %g2 ! Single Group+4bubbles rdpr %wstate, %g2
wrpr %g0, 0, %canrestore ! Single Group+4bubbles wrpr %g0, 0, %canrestore
sll %g2, 3, %g2 ! IEU0 Group sll %g2, 3, %g2
mov 1, %l5 ! IEU1 mov 1, %l5
stb %l5, [%l6 + TI_FPDEPTH] ! Store stb %l5, [%l6 + TI_FPDEPTH]
wrpr %g3, 0, %otherwin ! Single Group+4bubbles wrpr %g3, 0, %otherwin
wrpr %g2, 0, %wstate ! Single Group+4bubbles wrpr %g2, 0, %wstate
stxa %g0, [%l4] ASI_DMMU ! Store Group stxa %g0, [%l4] ASI_DMMU
flush %l6 ! Single Group+9bubbles flush %l6
wr %g0, ASI_AIUS, %asi ! Single Group+4bubbles wr %g0, ASI_AIUS, %asi
2: wrpr %g0, 0x0, %tl ! Single Group+4bubbles 2: wrpr %g0, 0x0, %tl
mov %g4, %l4 ! IEU1 mov %g4, %l4
mov %g5, %l5 ! IEU0 Group mov %g5, %l5
mov %g7, %l2 ! IEU1 mov %g7, %l2
wrpr %g0, ETRAP_PSTATE1, %pstate ! Single Group+4bubbles wrpr %g0, ETRAP_PSTATE1, %pstate
stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] ! Store Group stx %g1, [%sp + PTREGS_OFF + PT_V9_G1]
stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] ! Store Group stx %g2, [%sp + PTREGS_OFF + PT_V9_G2]
stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] ! Store Group stx %g3, [%sp + PTREGS_OFF + PT_V9_G3]
stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] ! Store Group stx %g4, [%sp + PTREGS_OFF + PT_V9_G4]
stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] ! Store Group stx %g5, [%sp + PTREGS_OFF + PT_V9_G5]
stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] ! Store Group stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] ! Store Group stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] ! Store Group stx %i0, [%sp + PTREGS_OFF + PT_V9_I0]
stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] ! Store Group stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] ! Store Group stx %i2, [%sp + PTREGS_OFF + PT_V9_I2]
stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] ! Store Group stx %i3, [%sp + PTREGS_OFF + PT_V9_I3]
stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] ! Store Group stx %i4, [%sp + PTREGS_OFF + PT_V9_I4]
stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] ! Store Group stx %i5, [%sp + PTREGS_OFF + PT_V9_I5]
stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] ! Store Group stx %i6, [%sp + PTREGS_OFF + PT_V9_I6]
stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] ! Store Group stx %i7, [%sp + PTREGS_OFF + PT_V9_I7]
wrpr %g0, ETRAP_PSTATE2, %pstate ! Single Group+4bubbles wrpr %g0, ETRAP_PSTATE2, %pstate
mov %l6, %g6 ! IEU0 mov %l6, %g6
jmpl %l2 + 0x4, %g0 ! CTI Group jmpl %l2 + 0x4, %g0
ldx [%g6 + TI_TASK], %g4 ! Load ldx [%g6 + TI_TASK], %g4
nop nop
nop nop
nop nop
3: ldub [%l6 + TI_FPDEPTH], %l5 ! Load Group 3: ldub [%l6 + TI_FPDEPTH], %l5
add %l6, TI_FPSAVED + 1, %l4 ! IEU0 add %l6, TI_FPSAVED + 1, %l4
srl %l5, 1, %l3 ! IEU0 Group srl %l5, 1, %l3
add %l5, 2, %l5 ! IEU1 add %l5, 2, %l5
stb %l5, [%l6 + TI_FPDEPTH] ! Store stb %l5, [%l6 + TI_FPDEPTH]
ba,pt %xcc, 2b ! CTI ba,pt %xcc, 2b
stb %g0, [%l4 + %l3] ! Store Group stb %g0, [%l4 + %l3]
nop nop
etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself. etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
* We place this right after pt_regs on the trap stack. The layout * We place this right after pt_regs on the trap stack.
* is: * The layout is:
* 0x00 TL1's TSTATE * 0x00 TL1's TSTATE
* 0x08 TL1's TPC * 0x08 TL1's TPC
* 0x10 TL1's TNPC * 0x10 TL1's TNPC
...@@ -166,81 +167,81 @@ etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself. ...@@ -166,81 +167,81 @@ etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself.
wrpr %g1, %tl wrpr %g1, %tl
stx %g1, [%g2 + STACK_BIAS + 0x80] stx %g1, [%g2 + STACK_BIAS + 0x80]
rdpr %tstate, %g1 ! Single Group+4bubbles rdpr %tstate, %g1
sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2 ! IEU1 sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2
ba,pt %xcc, 1b ! CTI Group ba,pt %xcc, 1b
andcc %g1, TSTATE_PRIV, %g0 ! IEU0 andcc %g1, TSTATE_PRIV, %g0
.align 64 .align 64
.globl scetrap .globl scetrap
scetrap: rdpr %pil, %g2 ! Single Group scetrap: rdpr %pil, %g2
rdpr %tstate, %g1 ! Single Group rdpr %tstate, %g1
sllx %g2, 20, %g3 ! IEU0 Group sllx %g2, 20, %g3
andcc %g1, TSTATE_PRIV, %g0 ! IEU1 andcc %g1, TSTATE_PRIV, %g0
or %g1, %g3, %g1 ! IEU0 Group or %g1, %g3, %g1
bne,pn %xcc, 1f ! CTI bne,pn %xcc, 1f
sub %sp, (STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS), %g2 ! IEU1 sub %sp, (STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS), %g2
wrpr %g0, 7, %cleanwin ! Single Group+4bubbles wrpr %g0, 7, %cleanwin
sllx %g1, 51, %g3 ! IEU0 Group sllx %g1, 51, %g3
sethi %hi(TASK_REGOFF), %g2 ! IEU1 sethi %hi(TASK_REGOFF), %g2
or %g2, %lo(TASK_REGOFF), %g2 ! IEU0 Group or %g2, %lo(TASK_REGOFF), %g2
brlz,pn %g3, 1f ! CTI+IEU1 brlz,pn %g3, 1f
add %g6, %g2, %g2 ! IEU0 Group add %g6, %g2, %g2
wr %g0, 0, %fprs ! Single Group+4bubbles wr %g0, 0, %fprs
1: rdpr %tpc, %g3 ! Single Group 1: rdpr %tpc, %g3
stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] ! Store Group stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE]
rdpr %tnpc, %g1 ! Single Group rdpr %tnpc, %g1
stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] ! Store Group stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC]
stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] ! Store Group stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC]
save %g2, -STACK_BIAS, %sp ! Ordering here is critical ! Single Group save %g2, -STACK_BIAS, %sp ! Ordering here is critical
mov %g6, %l6 ! IEU0 Group mov %g6, %l6
bne,pn %xcc, 2f ! CTI bne,pn %xcc, 2f
mov ASI_P, %l7 ! IEU1 mov ASI_P, %l7
rdpr %canrestore, %g3 ! Single Group+4bubbles rdpr %canrestore, %g3
rdpr %wstate, %g2 ! Single Group+4bubbles rdpr %wstate, %g2
wrpr %g0, 0, %canrestore ! Single Group+4bubbles wrpr %g0, 0, %canrestore
sll %g2, 3, %g2 ! IEU0 Group sll %g2, 3, %g2
mov PRIMARY_CONTEXT, %l4 ! IEU1 mov PRIMARY_CONTEXT, %l4
wrpr %g3, 0, %otherwin ! Single Group+4bubbles wrpr %g3, 0, %otherwin
wrpr %g2, 0, %wstate ! Single Group+4bubbles wrpr %g2, 0, %wstate
stxa %g0, [%l4] ASI_DMMU ! Store stxa %g0, [%l4] ASI_DMMU
flush %l6 ! Single Group+9bubbles flush %l6
mov ASI_AIUS, %l7 ! IEU0 Group mov ASI_AIUS, %l7
2: mov %g4, %l4 ! IEU1 2: mov %g4, %l4
mov %g5, %l5 ! IEU0 Group mov %g5, %l5
add %g7, 0x4, %l2 ! IEU1 add %g7, 0x4, %l2
wrpr %g0, ETRAP_PSTATE1, %pstate ! Single Group+4bubbles wrpr %g0, ETRAP_PSTATE1, %pstate
stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] ! Store Group stx %g1, [%sp + PTREGS_OFF + PT_V9_G1]
stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] ! Store Group stx %g2, [%sp + PTREGS_OFF + PT_V9_G2]
sllx %l7, 24, %l7 ! IEU0 sllx %l7, 24, %l7
stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] ! Store Group stx %g3, [%sp + PTREGS_OFF + PT_V9_G3]
rdpr %cwp, %l0 ! Single Group rdpr %cwp, %l0
stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] ! Store Group stx %g4, [%sp + PTREGS_OFF + PT_V9_G4]
stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] ! Store Group stx %g5, [%sp + PTREGS_OFF + PT_V9_G5]
stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] ! Store Group stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] ! Store Group stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
or %l7, %l0, %l7 ! IEU0 or %l7, %l0, %l7
sethi %hi(TSTATE_RMO | TSTATE_PEF), %l0 ! IEU1 sethi %hi(TSTATE_RMO | TSTATE_PEF), %l0
or %l7, %l0, %l7 ! IEU0 Group or %l7, %l0, %l7
wrpr %l2, %tnpc ! Single Group+4bubbles wrpr %l2, %tnpc
wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate ! Single Group+4bubbles wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate
stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] ! Store Group stx %i0, [%sp + PTREGS_OFF + PT_V9_I0]
stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] ! Store Group stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] ! Store Group stx %i2, [%sp + PTREGS_OFF + PT_V9_I2]
stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] ! Store Group stx %i3, [%sp + PTREGS_OFF + PT_V9_I3]
stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] ! Store Group stx %i4, [%sp + PTREGS_OFF + PT_V9_I4]
stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] ! Store Group stx %i5, [%sp + PTREGS_OFF + PT_V9_I5]
stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] ! Store Group stx %i6, [%sp + PTREGS_OFF + PT_V9_I6]
mov %l6, %g6 ! IEU1 mov %l6, %g6
stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] ! Store Group stx %i7, [%sp + PTREGS_OFF + PT_V9_I7]
ldx [%g6 + TI_TASK], %g4 ! Load Group ldx [%g6 + TI_TASK], %g4
done done
nop nop
nop nop
......
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