Commit ab23c5b9 authored by Alex Sierra's avatar Alex Sierra Committed by Alex Deucher

drm/amdgpu: ensure no PCIe peer access for CPU XGMI iolinks

[Why] Devices with CPU XGMI iolink do not support PCIe peer access.
Signed-off-by: default avatarAlex Sierra <alex.sierra@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 093fc611
...@@ -5532,7 +5532,8 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev, ...@@ -5532,7 +5532,8 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1); ~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
resource_size_t aper_limit = resource_size_t aper_limit =
adev->gmc.aper_base + adev->gmc.aper_size - 1; adev->gmc.aper_base + adev->gmc.aper_size - 1;
bool p2p_access = !(pci_p2pdma_distance_many(adev->pdev, bool p2p_access = !adev->gmc.xgmi.connected_to_cpu &&
!(pci_p2pdma_distance_many(adev->pdev,
&peer_adev->dev, 1, true) < 0); &peer_adev->dev, 1, true) < 0);
return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size && return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size &&
......
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