Commit ab75dc02 authored by Ralf Baechle's avatar Ralf Baechle

MIPS: Fix up inconsistency in panic() string argument.

Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 864c6c22
...@@ -536,7 +536,7 @@ static int __init ar7_register_uarts(void) ...@@ -536,7 +536,7 @@ static int __init ar7_register_uarts(void)
bus_clk = clk_get(NULL, "bus"); bus_clk = clk_get(NULL, "bus");
if (IS_ERR(bus_clk)) if (IS_ERR(bus_clk))
panic("unable to get bus clk\n"); panic("unable to get bus clk");
uart_port.type = PORT_AR7; uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2; uart_port.uartclk = clk_get_rate(bus_clk) / 2;
......
...@@ -96,7 +96,7 @@ void __init plat_mem_setup(void) ...@@ -96,7 +96,7 @@ void __init plat_mem_setup(void)
io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000);
if (!io_base) if (!io_base)
panic("Can't remap IO base!\n"); panic("Can't remap IO base!");
set_io_port_base(io_base); set_io_port_base(io_base);
prom_meminit(); prom_meminit();
......
...@@ -134,7 +134,7 @@ static void __init ath79_detect_sys_type(void) ...@@ -134,7 +134,7 @@ static void __init ath79_detect_sys_type(void)
break; break;
default: default:
panic("ath79: unknown SoC, id:0x%08x\n", id); panic("ath79: unknown SoC, id:0x%08x", id);
} }
sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
......
...@@ -289,7 +289,7 @@ static void __init bcm47xx_register_ssb(void) ...@@ -289,7 +289,7 @@ static void __init bcm47xx_register_ssb(void)
err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE, err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
bcm47xx_get_invariants); bcm47xx_get_invariants);
if (err) if (err)
panic("Failed to initialize SSB bus (err %d)\n", err); panic("Failed to initialize SSB bus (err %d)", err);
mcore = &bcm47xx_bus.ssb.mipscore; mcore = &bcm47xx_bus.ssb.mipscore;
if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
...@@ -314,7 +314,7 @@ static void __init bcm47xx_register_bcma(void) ...@@ -314,7 +314,7 @@ static void __init bcm47xx_register_bcma(void)
err = bcma_host_soc_register(&bcm47xx_bus.bcma); err = bcma_host_soc_register(&bcm47xx_bus.bcma);
if (err) if (err)
panic("Failed to initialize BCMA bus (err %d)\n", err); panic("Failed to initialize BCMA bus (err %d)", err);
} }
#endif #endif
......
...@@ -767,11 +767,11 @@ void prom_free_prom_memory(void) ...@@ -767,11 +767,11 @@ void prom_free_prom_memory(void)
: "=r" (insn) : : "$31", "memory"); : "=r" (insn) : : "$31", "memory");
if ((insn >> 26) != 0x33) if ((insn >> 26) != 0x33)
panic("No PREF instruction at Core-14449 probe point.\n"); panic("No PREF instruction at Core-14449 probe point.");
if (((insn >> 16) & 0x1f) != 28) if (((insn >> 16) & 0x1f) != 28)
panic("Core-14449 WAR not in place (%04x).\n" panic("Core-14449 WAR not in place (%04x).\n"
"Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).\n", insn); "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).", insn);
} }
#ifdef CONFIG_CAVIUM_DECODE_RSL #ifdef CONFIG_CAVIUM_DECODE_RSL
cvmx_interrupt_rsl_enable(); cvmx_interrupt_rsl_enable();
...@@ -779,7 +779,7 @@ void prom_free_prom_memory(void) ...@@ -779,7 +779,7 @@ void prom_free_prom_memory(void)
/* Add an interrupt handler for general failures. */ /* Add an interrupt handler for general failures. */
if (request_irq(OCTEON_IRQ_RML, octeon_rlm_interrupt, IRQF_SHARED, if (request_irq(OCTEON_IRQ_RML, octeon_rlm_interrupt, IRQF_SHARED,
"RML/RSL", octeon_rlm_interrupt)) { "RML/RSL", octeon_rlm_interrupt)) {
panic("Unable to request_irq(OCTEON_IRQ_RML)\n"); panic("Unable to request_irq(OCTEON_IRQ_RML)");
} }
#endif #endif
} }
...@@ -210,7 +210,7 @@ void octeon_prepare_cpus(unsigned int max_cpus) ...@@ -210,7 +210,7 @@ void octeon_prepare_cpus(unsigned int max_cpus)
if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI", IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
mailbox_interrupt)) { mailbox_interrupt)) {
panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n"); panic("Cannot request_irq(OCTEON_IRQ_MBOX0)");
} }
} }
......
...@@ -488,7 +488,7 @@ static int __init qi_lb60_board_setup(void) ...@@ -488,7 +488,7 @@ static int __init qi_lb60_board_setup(void)
board_gpio_setup(); board_gpio_setup();
if (qi_lb60_init_platform_devices()) if (qi_lb60_init_platform_devices())
panic("Failed to initialize platform devices\n"); panic("Failed to initialize platform devices");
return 0; return 0;
} }
......
...@@ -559,7 +559,7 @@ void smtc_prepare_cpus(int cpus) ...@@ -559,7 +559,7 @@ void smtc_prepare_cpus(int cpus)
pipi = kmalloc(nipi *sizeof(struct smtc_ipi), GFP_KERNEL); pipi = kmalloc(nipi *sizeof(struct smtc_ipi), GFP_KERNEL);
if (pipi == NULL) if (pipi == NULL)
panic("kmalloc of IPI message buffers failed\n"); panic("kmalloc of IPI message buffers failed");
else else
printk("IPI buffer pool of %d buffers\n", nipi); printk("IPI buffer pool of %d buffers\n", nipi);
for (i = 0; i < nipi; i++) { for (i = 0; i < nipi; i++) {
...@@ -813,7 +813,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) ...@@ -813,7 +813,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
if (pipi == NULL) { if (pipi == NULL) {
bust_spinlocks(1); bust_spinlocks(1);
mips_mt_regdump(dvpe()); mips_mt_regdump(dvpe());
panic("IPI Msg. Buffers Depleted\n"); panic("IPI Msg. Buffers Depleted");
} }
pipi->type = type; pipi->type = type;
pipi->arg = (void *)action; pipi->arg = (void *)action;
......
...@@ -400,7 +400,7 @@ void __noreturn die(const char *str, struct pt_regs *regs) ...@@ -400,7 +400,7 @@ void __noreturn die(const char *str, struct pt_regs *regs)
panic("Fatal exception in interrupt"); panic("Fatal exception in interrupt");
if (panic_on_oops) { if (panic_on_oops) {
printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); printk(KERN_EMERG "Fatal exception: panic in 5 seconds");
ssleep(5); ssleep(5);
panic("Fatal exception"); panic("Fatal exception");
} }
...@@ -1150,7 +1150,7 @@ asmlinkage void do_mt(struct pt_regs *regs) ...@@ -1150,7 +1150,7 @@ asmlinkage void do_mt(struct pt_regs *regs)
asmlinkage void do_dsp(struct pt_regs *regs) asmlinkage void do_dsp(struct pt_regs *regs)
{ {
if (cpu_has_dsp) if (cpu_has_dsp)
panic("Unexpected DSP exception\n"); panic("Unexpected DSP exception");
force_sig(SIGILL, current); force_sig(SIGILL, current);
} }
......
...@@ -134,11 +134,11 @@ void __init plat_time_init(void) ...@@ -134,11 +134,11 @@ void __init plat_time_init(void)
struct clk *clk; struct clk *clk;
if (insert_resource(&iomem_resource, &ltq_cgu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_cgu_resource) < 0)
panic("Failed to insert cgu memory\n"); panic("Failed to insert cgu memory");
if (request_mem_region(ltq_cgu_resource.start, if (request_mem_region(ltq_cgu_resource.start,
resource_size(&ltq_cgu_resource), "cgu") < 0) resource_size(&ltq_cgu_resource), "cgu") < 0)
panic("Failed to request cgu memory\n"); panic("Failed to request cgu memory");
ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start, ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start,
resource_size(&ltq_cgu_resource)); resource_size(&ltq_cgu_resource));
......
...@@ -249,28 +249,28 @@ void __init arch_init_irq(void) ...@@ -249,28 +249,28 @@ void __init arch_init_irq(void)
int i; int i;
if (insert_resource(&iomem_resource, &ltq_icu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_icu_resource) < 0)
panic("Failed to insert icu memory\n"); panic("Failed to insert icu memory");
if (request_mem_region(ltq_icu_resource.start, if (request_mem_region(ltq_icu_resource.start,
resource_size(&ltq_icu_resource), "icu") < 0) resource_size(&ltq_icu_resource), "icu") < 0)
panic("Failed to request icu memory\n"); panic("Failed to request icu memory");
ltq_icu_membase = ioremap_nocache(ltq_icu_resource.start, ltq_icu_membase = ioremap_nocache(ltq_icu_resource.start,
resource_size(&ltq_icu_resource)); resource_size(&ltq_icu_resource));
if (!ltq_icu_membase) if (!ltq_icu_membase)
panic("Failed to remap icu memory\n"); panic("Failed to remap icu memory");
if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
panic("Failed to insert eiu memory\n"); panic("Failed to insert eiu memory");
if (request_mem_region(ltq_eiu_resource.start, if (request_mem_region(ltq_eiu_resource.start,
resource_size(&ltq_eiu_resource), "eiu") < 0) resource_size(&ltq_eiu_resource), "eiu") < 0)
panic("Failed to request eiu memory\n"); panic("Failed to request eiu memory");
ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start, ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
resource_size(&ltq_eiu_resource)); resource_size(&ltq_eiu_resource));
if (!ltq_eiu_membase) if (!ltq_eiu_membase)
panic("Failed to remap eiu memory\n"); panic("Failed to remap eiu memory");
/* make sure all irqs are turned off by default */ /* make sure all irqs are turned off by default */
for (i = 0; i < 5; i++) for (i = 0; i < 5; i++)
......
...@@ -222,17 +222,17 @@ ltq_dma_init(void) ...@@ -222,17 +222,17 @@ ltq_dma_init(void)
/* insert and request the memory region */ /* insert and request the memory region */
if (insert_resource(&iomem_resource, &ltq_dma_resource) < 0) if (insert_resource(&iomem_resource, &ltq_dma_resource) < 0)
panic("Failed to insert dma memory\n"); panic("Failed to insert dma memory");
if (request_mem_region(ltq_dma_resource.start, if (request_mem_region(ltq_dma_resource.start,
resource_size(&ltq_dma_resource), "dma") < 0) resource_size(&ltq_dma_resource), "dma") < 0)
panic("Failed to request dma memory\n"); panic("Failed to request dma memory");
/* remap dma register range */ /* remap dma register range */
ltq_dma_membase = ioremap_nocache(ltq_dma_resource.start, ltq_dma_membase = ioremap_nocache(ltq_dma_resource.start,
resource_size(&ltq_dma_resource)); resource_size(&ltq_dma_resource));
if (!ltq_dma_membase) if (!ltq_dma_membase)
panic("Failed to remap dma memory\n"); panic("Failed to remap dma memory");
/* power up and reset the dma engine */ /* power up and reset the dma engine */
ltq_pmu_enable(PMU_DMA); ltq_pmu_enable(PMU_DMA);
......
...@@ -32,17 +32,17 @@ static int __init lantiq_ebu_init(void) ...@@ -32,17 +32,17 @@ static int __init lantiq_ebu_init(void)
{ {
/* insert and request the memory region */ /* insert and request the memory region */
if (insert_resource(&iomem_resource, &ltq_ebu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_ebu_resource) < 0)
panic("Failed to insert ebu memory\n"); panic("Failed to insert ebu memory");
if (request_mem_region(ltq_ebu_resource.start, if (request_mem_region(ltq_ebu_resource.start,
resource_size(&ltq_ebu_resource), "ebu") < 0) resource_size(&ltq_ebu_resource), "ebu") < 0)
panic("Failed to request ebu memory\n"); panic("Failed to request ebu memory");
/* remap ebu register range */ /* remap ebu register range */
ltq_ebu_membase = ioremap_nocache(ltq_ebu_resource.start, ltq_ebu_membase = ioremap_nocache(ltq_ebu_resource.start,
resource_size(&ltq_ebu_resource)); resource_size(&ltq_ebu_resource));
if (!ltq_ebu_membase) if (!ltq_ebu_membase)
panic("Failed to remap ebu memory\n"); panic("Failed to remap ebu memory");
/* make sure to unprotect the memory region where flash is located */ /* make sure to unprotect the memory region where flash is located */
ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) & ~EBU_WRDIS, LTQ_EBU_BUSCON0); ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) & ~EBU_WRDIS, LTQ_EBU_BUSCON0);
......
...@@ -40,7 +40,7 @@ void ltq_pmu_enable(unsigned int module) ...@@ -40,7 +40,7 @@ void ltq_pmu_enable(unsigned int module)
do {} while (--err && (ltq_pmu_r32(LTQ_PMU_PWDSR) & module)); do {} while (--err && (ltq_pmu_r32(LTQ_PMU_PWDSR) & module));
if (!err) if (!err)
panic("activating PMU module failed!\n"); panic("activating PMU module failed!");
} }
EXPORT_SYMBOL(ltq_pmu_enable); EXPORT_SYMBOL(ltq_pmu_enable);
...@@ -53,16 +53,16 @@ EXPORT_SYMBOL(ltq_pmu_disable); ...@@ -53,16 +53,16 @@ EXPORT_SYMBOL(ltq_pmu_disable);
int __init ltq_pmu_init(void) int __init ltq_pmu_init(void)
{ {
if (insert_resource(&iomem_resource, &ltq_pmu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_pmu_resource) < 0)
panic("Failed to insert pmu memory\n"); panic("Failed to insert pmu memory");
if (request_mem_region(ltq_pmu_resource.start, if (request_mem_region(ltq_pmu_resource.start,
resource_size(&ltq_pmu_resource), "pmu") < 0) resource_size(&ltq_pmu_resource), "pmu") < 0)
panic("Failed to request pmu memory\n"); panic("Failed to request pmu memory");
ltq_pmu_membase = ioremap_nocache(ltq_pmu_resource.start, ltq_pmu_membase = ioremap_nocache(ltq_pmu_resource.start,
resource_size(&ltq_pmu_resource)); resource_size(&ltq_pmu_resource));
if (!ltq_pmu_membase) if (!ltq_pmu_membase)
panic("Failed to remap pmu memory\n"); panic("Failed to remap pmu memory");
return 0; return 0;
} }
......
...@@ -69,17 +69,17 @@ static int __init mips_reboot_setup(void) ...@@ -69,17 +69,17 @@ static int __init mips_reboot_setup(void)
{ {
/* insert and request the memory region */ /* insert and request the memory region */
if (insert_resource(&iomem_resource, &ltq_rcu_resource) < 0) if (insert_resource(&iomem_resource, &ltq_rcu_resource) < 0)
panic("Failed to insert rcu memory\n"); panic("Failed to insert rcu memory");
if (request_mem_region(ltq_rcu_resource.start, if (request_mem_region(ltq_rcu_resource.start,
resource_size(&ltq_rcu_resource), "rcu") < 0) resource_size(&ltq_rcu_resource), "rcu") < 0)
panic("Failed to request rcu memory\n"); panic("Failed to request rcu memory");
/* remap rcu register range */ /* remap rcu register range */
ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start, ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start,
resource_size(&ltq_rcu_resource)); resource_size(&ltq_rcu_resource));
if (!ltq_rcu_membase) if (!ltq_rcu_membase)
panic("Failed to remap rcu memory\n"); panic("Failed to remap rcu memory");
_machine_restart = ltq_machine_restart; _machine_restart = ltq_machine_restart;
_machine_halt = ltq_machine_halt; _machine_halt = ltq_machine_halt;
......
...@@ -223,7 +223,7 @@ static void __cpuinit probe_octeon(void) ...@@ -223,7 +223,7 @@ static void __cpuinit probe_octeon(void)
break; break;
default: default:
panic("Unsupported Cavium Networks CPU type\n"); panic("Unsupported Cavium Networks CPU type");
break; break;
} }
......
...@@ -162,7 +162,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) ...@@ -162,7 +162,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
msg.address_hi = (0 + CVMX_NPEI_PCIE_MSI_RCV) >> 32; msg.address_hi = (0 + CVMX_NPEI_PCIE_MSI_RCV) >> 32;
break; break;
default: default:
panic("arch_setup_msi_irq: Invalid octeon_dma_bar_type\n"); panic("arch_setup_msi_irq: Invalid octeon_dma_bar_type");
} }
msg.data = irq - OCTEON_IRQ_MSI_BIT0; msg.data = irq - OCTEON_IRQ_MSI_BIT0;
......
...@@ -209,7 +209,7 @@ void __init prom_init(void) ...@@ -209,7 +209,7 @@ void __init prom_init(void)
default: default:
/* we don't recognize the machine */ /* we don't recognize the machine */
mips_machtype = MACH_UNKNOWN; mips_machtype = MACH_UNKNOWN;
panic("***Bogosity factor five***, exiting\n"); panic("***Bogosity factor five***, exiting");
break; break;
} }
......
...@@ -73,7 +73,7 @@ static inline int alloc_level(int cpu, int irq) ...@@ -73,7 +73,7 @@ static inline int alloc_level(int cpu, int irq)
level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE); level = find_first_zero_bit(hub->irq_alloc_mask, LEVELS_PER_SLICE);
if (level >= LEVELS_PER_SLICE) if (level >= LEVELS_PER_SLICE)
panic("Cpu %d flooded with devices\n", cpu); panic("Cpu %d flooded with devices", cpu);
__set_bit(level, hub->irq_alloc_mask); __set_bit(level, hub->irq_alloc_mask);
si->level_to_irq[level] = irq; si->level_to_irq[level] = irq;
...@@ -96,7 +96,7 @@ static inline int find_level(cpuid_t *cpunum, int irq) ...@@ -96,7 +96,7 @@ static inline int find_level(cpuid_t *cpunum, int irq)
} }
} }
panic("Could not identify cpu/level for irq %d\n", irq); panic("Could not identify cpu/level for irq %d", irq);
} }
/* /*
......
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