Commit abd06860 authored by Keith Packard's avatar Keith Packard

drv/i915: Pull display_clock_mode out of VBT table

This tells the driver whether a CK505 clock source is available on
pre-PCH hardware. If so, it should be used as the non-SSC source,
leaving the internal clock for use as the SSC source.
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
Reviewed-by: default avatarChris Wison <chris@chris-wilson.co.uk>
parent 562396b9
...@@ -357,6 +357,7 @@ typedef struct drm_i915_private { ...@@ -357,6 +357,7 @@ typedef struct drm_i915_private {
unsigned int lvds_vbt:1; unsigned int lvds_vbt:1;
unsigned int int_crt_support:1; unsigned int int_crt_support:1;
unsigned int lvds_use_ssc:1; unsigned int lvds_use_ssc:1;
unsigned int display_clock_mode:1;
int lvds_ssc_freq; int lvds_ssc_freq;
struct { struct {
int rate; int rate;
......
...@@ -309,11 +309,13 @@ parse_general_features(struct drm_i915_private *dev_priv, ...@@ -309,11 +309,13 @@ parse_general_features(struct drm_i915_private *dev_priv,
dev_priv->lvds_use_ssc = general->enable_ssc; dev_priv->lvds_use_ssc = general->enable_ssc;
dev_priv->lvds_ssc_freq = dev_priv->lvds_ssc_freq =
intel_bios_ssc_frequency(dev, general->ssc_freq); intel_bios_ssc_frequency(dev, general->ssc_freq);
DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d\n", dev_priv->display_clock_mode = general->display_clock_mode;
DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
dev_priv->int_tv_support, dev_priv->int_tv_support,
dev_priv->int_crt_support, dev_priv->int_crt_support,
dev_priv->lvds_use_ssc, dev_priv->lvds_use_ssc,
dev_priv->lvds_ssc_freq); dev_priv->lvds_ssc_freq,
dev_priv->display_clock_mode);
} }
} }
......
...@@ -120,7 +120,9 @@ struct bdb_general_features { ...@@ -120,7 +120,9 @@ struct bdb_general_features {
u8 ssc_freq:1; u8 ssc_freq:1;
u8 enable_lfp_on_override:1; u8 enable_lfp_on_override:1;
u8 disable_ssc_ddt:1; u8 disable_ssc_ddt:1;
u8 rsvd8:3; /* finish byte */ u8 rsvd7:1;
u8 display_clock_mode:1;
u8 rsvd8:1; /* finish byte */
/* bits 3 */ /* bits 3 */
u8 disable_smooth_vision:1; u8 disable_smooth_vision:1;
......
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