Commit b0921d5c authored by Michael Walle's avatar Michael Walle Committed by Ulf Hansson

mmc: sdhci-of-esdhc: fixup PRESENT_STATE read

Since commit 87a18a6a ("mmc: mmc: Use ->card_busy() to detect busy
cards in __mmc_switch()") the ESDHC driver is broken:
  mmc0: Card stuck in programming state! __mmc_switch
  mmc0: error -110 whilst initialising MMC card

Since this commit __mmc_switch() uses ->card_busy(), which is
sdhci_card_busy() for the esdhc driver. sdhci_card_busy() uses the
PRESENT_STATE register, specifically the DAT0 signal level bit. But the
ESDHC uses a non-conformant PRESENT_STATE register, thus a read fixup is
required to make the driver work again.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Fixes: 87a18a6a ("mmc: mmc: Use ->card_busy() to detect busy cards in __mmc_switch()")
Acked-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Cc: <stable@vger.kernel.org> # v4.8+
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent a25f0944
...@@ -66,6 +66,20 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host, ...@@ -66,6 +66,20 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
return ret; return ret;
} }
} }
/*
* The DAT[3:0] line signal levels and the CMD line signal level are
* not compatible with standard SDHC register. The line signal levels
* DAT[7:0] are at bits 31:24 and the command line signal level is at
* bit 23. All other bits are the same as in the standard SDHC
* register.
*/
if (spec_reg == SDHCI_PRESENT_STATE) {
ret = value & 0x000fffff;
ret |= (value >> 4) & SDHCI_DATA_LVL_MASK;
ret |= (value << 1) & SDHCI_CMD_LVL;
return ret;
}
ret = value; ret = value;
return ret; return ret;
} }
......
...@@ -73,6 +73,7 @@ ...@@ -73,6 +73,7 @@
#define SDHCI_DATA_LVL_MASK 0x00F00000 #define SDHCI_DATA_LVL_MASK 0x00F00000
#define SDHCI_DATA_LVL_SHIFT 20 #define SDHCI_DATA_LVL_SHIFT 20
#define SDHCI_DATA_0_LVL_MASK 0x00100000 #define SDHCI_DATA_0_LVL_MASK 0x00100000
#define SDHCI_CMD_LVL 0x01000000
#define SDHCI_HOST_CONTROL 0x28 #define SDHCI_HOST_CONTROL 0x28
#define SDHCI_CTRL_LED 0x01 #define SDHCI_CTRL_LED 0x01
......
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