Commit b2105b9f authored by Krzysztof Wilczyński's avatar Krzysztof Wilczyński Committed by Bjorn Helgaas

PCI: Correct misspelled and remove duplicated words

Correct a number of misspelled words and remove any words that were
duplicated in the PCI tree.  No change to functionality intended.

Link: https://lore.kernel.org/r/20211006233827.147328-1-kw@linux.comSigned-off-by: default avatarKrzysztof Wilczyński <kw@linux.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 9a0a1417
...@@ -302,7 +302,7 @@ static void xgene_msi_isr(struct irq_desc *desc) ...@@ -302,7 +302,7 @@ static void xgene_msi_isr(struct irq_desc *desc)
/* /*
* MSIINTn (n is 0..F) indicates if there is a pending MSI interrupt * MSIINTn (n is 0..F) indicates if there is a pending MSI interrupt
* If bit x of this register is set (x is 0..7), one or more interupts * If bit x of this register is set (x is 0..7), one or more interrupts
* corresponding to MSInIRx is set. * corresponding to MSInIRx is set.
*/ */
grp_select = xgene_msi_int_read(xgene_msi, msi_grp); grp_select = xgene_msi_int_read(xgene_msi, msi_grp);
......
...@@ -145,7 +145,7 @@ ...@@ -145,7 +145,7 @@
#define BRCM_INT_PCI_MSI_LEGACY_NR 8 #define BRCM_INT_PCI_MSI_LEGACY_NR 8
#define BRCM_INT_PCI_MSI_SHIFT 0 #define BRCM_INT_PCI_MSI_SHIFT 0
/* MSI target adresses */ /* MSI target addresses */
#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL #define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL
#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL #define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL
......
...@@ -249,7 +249,7 @@ enum iproc_pcie_reg { ...@@ -249,7 +249,7 @@ enum iproc_pcie_reg {
/* /*
* To hold the address of the register where the MSI writes are * To hold the address of the register where the MSI writes are
* programed. When ARM GICv3 ITS is used, this should be programmed * programmed. When ARM GICv3 ITS is used, this should be programmed
* with the address of the GITS_TRANSLATER register. * with the address of the GITS_TRANSLATER register.
*/ */
IPROC_PCIE_MSI_ADDR_LO, IPROC_PCIE_MSI_ADDR_LO,
......
...@@ -700,7 +700,7 @@ EXPORT_SYMBOL_GPL(pci_epc_linkup); ...@@ -700,7 +700,7 @@ EXPORT_SYMBOL_GPL(pci_epc_linkup);
/** /**
* pci_epc_init_notify() - Notify the EPF device that EPC device's core * pci_epc_init_notify() - Notify the EPF device that EPC device's core
* initialization is completed. * initialization is completed.
* @epc: the EPC device whose core initialization is completeds * @epc: the EPC device whose core initialization is completed
* *
* Invoke to Notify the EPF device that the EPC device's initialization * Invoke to Notify the EPF device that the EPC device's initialization
* is completed. * is completed.
......
...@@ -224,7 +224,7 @@ EXPORT_SYMBOL_GPL(pci_epf_add_vepf); ...@@ -224,7 +224,7 @@ EXPORT_SYMBOL_GPL(pci_epf_add_vepf);
* be removed * be removed
* @epf_vf: the virtual EP function to be removed * @epf_vf: the virtual EP function to be removed
* *
* Invoke to remove a virtual endpoint function from the physcial endpoint * Invoke to remove a virtual endpoint function from the physical endpoint
* function. * function.
*/ */
void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf) void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf)
...@@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_epf_destroy); ...@@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_epf_destroy);
/** /**
* pci_epf_create() - create a new PCI EPF device * pci_epf_create() - create a new PCI EPF device
* @name: the name of the PCI EPF device. This name will be used to bind the * @name: the name of the PCI EPF device. This name will be used to bind the
* the EPF device to a EPF driver * EPF device to a EPF driver
* *
* Invoke to create a new PCI EPF device by providing the name of the function * Invoke to create a new PCI EPF device by providing the name of the function
* device. * device.
......
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
* when the bridge is scanned and it loses a refcount when the bridge * when the bridge is scanned and it loses a refcount when the bridge
* is removed. * is removed.
* - When a P2P bridge is present, we elevate the refcount on the subordinate * - When a P2P bridge is present, we elevate the refcount on the subordinate
* bus. It loses the refcount when the the driver unloads. * bus. It loses the refcount when the driver unloads.
*/ */
#define pr_fmt(fmt) "acpiphp_glue: " fmt #define pr_fmt(fmt) "acpiphp_glue: " fmt
......
...@@ -519,7 +519,7 @@ static struct pci_resource *do_bridge_resource_split(struct pci_resource **head, ...@@ -519,7 +519,7 @@ static struct pci_resource *do_bridge_resource_split(struct pci_resource **head,
* @head: list to search * @head: list to search
* @size: size of node to find, must be a power of two. * @size: size of node to find, must be a power of two.
* *
* Description: This function sorts the resource list by size and then returns * Description: This function sorts the resource list by size and then
* returns the first node of "size" length that is not in the ISA aliasing * returns the first node of "size" length that is not in the ISA aliasing
* window. If it finds a node larger than "size" it will split it up. * window. If it finds a node larger than "size" it will split it up.
*/ */
...@@ -1202,7 +1202,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_ ...@@ -1202,7 +1202,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
mdelay(5); mdelay(5);
/* Reenable interrupts */ /* Re-enable interrupts */
writel(0, ctrl->hpc_reg + INT_MASK); writel(0, ctrl->hpc_reg + INT_MASK);
pci_write_config_byte(ctrl->pci_dev, 0x41, reg); pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
......
...@@ -352,7 +352,7 @@ struct resource_node { ...@@ -352,7 +352,7 @@ struct resource_node {
u32 len; u32 len;
int type; /* MEM, IO, PFMEM */ int type; /* MEM, IO, PFMEM */
u8 fromMem; /* this is to indicate that the range is from u8 fromMem; /* this is to indicate that the range is from
* from the Memory bucket rather than from PFMem */ * the Memory bucket rather than from PFMem */
struct resource_node *next; struct resource_node *next;
struct resource_node *nextRange; /* for the other mem range on bus */ struct resource_node *nextRange; /* for the other mem range on bus */
}; };
...@@ -736,7 +736,7 @@ struct controller { ...@@ -736,7 +736,7 @@ struct controller {
int ibmphp_init_devno(struct slot **); /* This function is called from EBDA, so we need it not be static */ int ibmphp_init_devno(struct slot **); /* This function is called from EBDA, so we need it not be static */
int ibmphp_do_disable_slot(struct slot *slot_cur); int ibmphp_do_disable_slot(struct slot *slot_cur);
int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be be static */ int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be static */
int ibmphp_configure_card(struct pci_func *, u8); int ibmphp_configure_card(struct pci_func *, u8);
int ibmphp_unconfigure_card(struct slot **, int); int ibmphp_unconfigure_card(struct slot **, int);
extern const struct hotplug_slot_ops ibmphp_hotplug_slot_ops; extern const struct hotplug_slot_ops ibmphp_hotplug_slot_ops;
......
...@@ -295,7 +295,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) ...@@ -295,7 +295,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
mutex_lock(&slot->ctrl->cmd_lock); mutex_lock(&slot->ctrl->cmd_lock);
if (!shpc_poll_ctrl_busy(ctrl)) { if (!shpc_poll_ctrl_busy(ctrl)) {
/* After 1 sec and and the controller is still busy */ /* After 1 sec and the controller is still busy */
ctrl_err(ctrl, "Controller is still busy after 1 sec\n"); ctrl_err(ctrl, "Controller is still busy after 1 sec\n");
retval = -EBUSY; retval = -EBUSY;
goto out; goto out;
......
...@@ -576,7 +576,7 @@ static int pci_pm_reenable_device(struct pci_dev *pci_dev) ...@@ -576,7 +576,7 @@ static int pci_pm_reenable_device(struct pci_dev *pci_dev)
{ {
int retval; int retval;
/* if the device was enabled before suspend, reenable */ /* if the device was enabled before suspend, re-enable */
retval = pci_reenable_device(pci_dev); retval = pci_reenable_device(pci_dev);
/* /*
* if the device was busmaster before the suspend, make it busmaster * if the device was busmaster before the suspend, make it busmaster
......
...@@ -57,7 +57,7 @@ struct aer_stats { ...@@ -57,7 +57,7 @@ struct aer_stats {
* "as seen by this device". Note that this may mean that if an * "as seen by this device". Note that this may mean that if an
* end point is causing problems, the AER counters may increment * end point is causing problems, the AER counters may increment
* at its link partner (e.g. root port) because the errors will be * at its link partner (e.g. root port) because the errors will be
* "seen" by the link partner and not the the problematic end point * "seen" by the link partner and not the problematic end point
* itself (which may report all counters as 0 as it never saw any * itself (which may report all counters as 0 as it never saw any
* problems). * problems).
*/ */
......
...@@ -2700,7 +2700,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, ...@@ -2700,7 +2700,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
* then the device can't use INTx interrupts. Tegra's PCIe root ports don't * then the device can't use INTx interrupts. Tegra's PCIe root ports don't
* generate MSI interrupts for PME and AER events instead only INTx interrupts * generate MSI interrupts for PME and AER events instead only INTx interrupts
* are generated. Though Tegra's PCIe root ports can generate MSI interrupts * are generated. Though Tegra's PCIe root ports can generate MSI interrupts
* for other events, since PCIe specificiation doesn't support using a mix of * for other events, since PCIe specification doesn't support using a mix of
* INTx and MSI/MSI-X, it is required to disable MSI interrupts to avoid port * INTx and MSI/MSI-X, it is required to disable MSI interrupts to avoid port
* service drivers registering their respective ISRs for MSIs. * service drivers registering their respective ISRs for MSIs.
*/ */
......
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