Commit b3185d1f authored by Tom Rini's avatar Tom Rini Committed by David Woodhouse

[PPC32] Change how we handle DP memory on MPC8xx.

We now have a 'remote heap' implemented (see comments in
arch/ppc/lib/rheap.c) which manages this memory.
From Pantelis Antoniou <panto@intracom.gr>.
Signed-off-by: default avatarTom Rini <trini@kernel.crashing.org>
parent 7459093a
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#include <linux/string.h> #include <linux/string.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/module.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mpc8xx.h> #include <asm/mpc8xx.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -34,11 +35,11 @@ ...@@ -34,11 +35,11 @@
#include <asm/8xx_immap.h> #include <asm/8xx_immap.h>
#include <asm/commproc.h> #include <asm/commproc.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/rheap.h>
extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep); extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep);
static uint dp_alloc_base; /* Starting offset in DP ram */ static void m8xx_cpm_dpinit(void);
static uint dp_alloc_top; /* Max offset + 1 */
static uint host_buffer; /* One page of host buffer */ static uint host_buffer; /* One page of host buffer */
static uint host_end; /* end + 1 */ static uint host_end; /* end + 1 */
cpm8xx_t *cpmp; /* Pointer to comm processor space */ cpm8xx_t *cpmp; /* Pointer to comm processor space */
...@@ -84,10 +85,8 @@ m8xx_cpm_reset(void) ...@@ -84,10 +85,8 @@ m8xx_cpm_reset(void)
*/ */
imp->im_siu_conf.sc_sdcr = 1; imp->im_siu_conf.sc_sdcr = 1;
/* Reclaim the DP memory for our use. /* Reclaim the DP memory for our use. */
*/ m8xx_cpm_dpinit();
dp_alloc_base = CPM_DATAONLY_BASE;
dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
/* Tell everyone where the comm processor resides. /* Tell everyone where the comm processor resides.
*/ */
...@@ -138,10 +137,8 @@ m8xx_cpm_reset(uint host_page_addr) ...@@ -138,10 +137,8 @@ m8xx_cpm_reset(uint host_page_addr)
*/ */
imp->im_siu_conf.sc_sdcr = 1; imp->im_siu_conf.sc_sdcr = 1;
/* Reclaim the DP memory for our use. /* Reclaim the DP memory for our use. */
*/ m8xx_cpm_dpinit();
dp_alloc_base = CPM_DATAONLY_BASE;
dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
/* Set the host page for allocation. /* Set the host page for allocation.
*/ */
...@@ -257,30 +254,6 @@ cpm_free_handler(int vec) ...@@ -257,30 +254,6 @@ cpm_free_handler(int vec)
((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
} }
/* Allocate some memory from the dual ported ram. We may want to
* enforce alignment restrictions, but right now everyone is a good
* citizen.
*/
uint
m8xx_cpm_dpalloc(uint size)
{
uint retloc;
if ((dp_alloc_base + size) >= dp_alloc_top)
return(CPM_DP_NOSPACE);
retloc = dp_alloc_base;
dp_alloc_base += size;
return(retloc);
}
uint
m8xx_cpm_dpalloc_index(void)
{
return dp_alloc_base;
}
/* We also own one page of host buffer space for the allocation of /* We also own one page of host buffer space for the allocation of
* UART "fifos" and the like. * UART "fifos" and the like.
*/ */
...@@ -330,3 +303,102 @@ m8xx_cpm_setbrg(uint brg, uint rate) ...@@ -330,3 +303,102 @@ m8xx_cpm_setbrg(uint brg, uint rate)
*bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
CPM_BRG_EN | CPM_BRG_DIV16; CPM_BRG_EN | CPM_BRG_DIV16;
} }
/*
* dpalloc / dpfree bits.
*/
static spinlock_t cpm_dpmem_lock;
/*
* 16 blocks should be enough to satisfy all requests
* until the memory subsystem goes up...
*/
static rh_block_t cpm_boot_dpmem_rh_block[16];
static rh_info_t cpm_dpmem_info;
#define CPM_DPMEM_ALIGNMENT 8
void m8xx_cpm_dpinit(void)
{
cpm8xx_t *cp = &((immap_t *)IMAP_ADDR)->im_cpm;
spin_lock_init(&cpm_dpmem_lock);
/* Initialize the info header */
rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
sizeof(cpm_boot_dpmem_rh_block) /
sizeof(cpm_boot_dpmem_rh_block[0]),
cpm_boot_dpmem_rh_block);
/*
* Attach the usable dpmem area.
* XXX: This is actually crap. CPM_DATAONLY_BASE and
* CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
* with the processor and the microcode patches applied / activated.
* But the following should be at least safe.
*/
rh_attach_region(&cpm_dpmem_info, cp->cp_dpmem + CPM_DATAONLY_BASE,
CPM_DATAONLY_SIZE);
}
/*
* Allocate the requested size worth of DP memory.
* This function used to return an index into the DPRAM area.
* Now it returns the actuall physical address of that area.
* use m8xx_cpm_dpram_offset() to get the index
*/
void *m8xx_cpm_dpalloc(int size)
{
void *start;
unsigned long flags;
spin_lock_irqsave(&cpm_dpmem_lock, flags);
start = rh_alloc(&cpm_dpmem_info, size, "commproc");
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
return start;
}
EXPORT_SYMBOL(m8xx_cpm_dpalloc);
int m8xx_cpm_dpfree(void *addr)
{
int ret;
unsigned long flags;
spin_lock_irqsave(&cpm_dpmem_lock, flags);
ret = rh_free(&cpm_dpmem_info, addr);
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
return ret;
}
EXPORT_SYMBOL(m8xx_cpm_dpfree);
void *m8xx_cpm_dpalloc_fixed(void *addr, int size)
{
void *start;
unsigned long flags;
spin_lock_irqsave(&cpm_dpmem_lock, flags);
start = rh_alloc_fixed(&cpm_dpmem_info, addr, size, "commproc");
spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
return start;
}
EXPORT_SYMBOL(m8xx_cpm_dpalloc_fixed);
void m8xx_cpm_dpdump(void)
{
rh_dump(&cpm_dpmem_info);
}
EXPORT_SYMBOL(m8xx_cpm_dpdump);
int m8xx_cpm_dpram_offset(void *addr)
{
return (u_char *)addr - ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem;
}
EXPORT_SYMBOL(m8xx_cpm_dpram_offset);
void *m8xx_cpm_dpram_addr(int offset)
{
return ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem + offset;
}
EXPORT_SYMBOL(m8xx_cpm_dpram_addr);
...@@ -2463,7 +2463,7 @@ static long long sound_lseek(struct file *file, long long offset, int orig) ...@@ -2463,7 +2463,7 @@ static long long sound_lseek(struct file *file, long long offset, int orig)
int __init tdm8xx_sound_init(void) int __init tdm8xx_sound_init(void)
{ {
int i, has_sound; int i, has_sound;
uint dp_addr; uint dp_addr, dp_mem;
volatile uint *sirp; volatile uint *sirp;
volatile cbd_t *bdp; volatile cbd_t *bdp;
volatile cpm8xx_t *cp; volatile cpm8xx_t *cp;
...@@ -2525,14 +2525,15 @@ int __init tdm8xx_sound_init(void) ...@@ -2525,14 +2525,15 @@ int __init tdm8xx_sound_init(void)
/* We need to allocate a transmit and receive buffer /* We need to allocate a transmit and receive buffer
* descriptors from dual port ram. * descriptors from dual port ram.
*/ */
dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * numReadBufs); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * numReadBufs);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
/* Set the physical address of the host memory /* Set the physical address of the host memory
* buffers in the buffer descriptors, and the * buffers in the buffer descriptors, and the
* virtual address for us to work with. * virtual address for us to work with.
*/ */
bdp = (cbd_t *)&cp->cp_dpmem[dp_addr]; bdp = (cbd_t *)&cp->cp_dpmem[dp_addr];
up->smc_rbase = dp_addr; up->smc_rbase = dp_mem;
rx_cur = rx_base = (cbd_t *)bdp; rx_cur = rx_base = (cbd_t *)bdp;
for (i=0; i<(numReadBufs-1); i++) { for (i=0; i<(numReadBufs-1); i++) {
...@@ -2547,10 +2548,11 @@ int __init tdm8xx_sound_init(void) ...@@ -2547,10 +2548,11 @@ int __init tdm8xx_sound_init(void)
/* Now, do the same for the transmit buffers. /* Now, do the same for the transmit buffers.
*/ */
dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * numBufs); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * numBufs);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
bdp = (cbd_t *)&cp->cp_dpmem[dp_addr]; bdp = (cbd_t *)&cp->cp_dpmem[dp_addr];
up->smc_tbase = dp_addr; up->smc_tbase = dp_mem;
tx_cur = tx_base = (cbd_t *)bdp; tx_cur = tx_base = (cbd_t *)bdp;
for (i=0; i<(numBufs-1); i++) { for (i=0; i<(numBufs-1); i++) {
......
...@@ -644,6 +644,8 @@ static int __init scc_enet_init(void) ...@@ -644,6 +644,8 @@ static int __init scc_enet_init(void)
struct net_device *dev; struct net_device *dev;
struct scc_enet_private *cep; struct scc_enet_private *cep;
int i, j, k, err; int i, j, k, err;
void *dp_mem;
unsigned int dp_addr;
unsigned char *eap, *ba; unsigned char *eap, *ba;
dma_addr_t mem_addr; dma_addr_t mem_addr;
bd_t *bd; bd_t *bd;
...@@ -738,13 +740,15 @@ static int __init scc_enet_init(void) ...@@ -738,13 +740,15 @@ static int __init scc_enet_init(void)
* These are relative offsets in the DP ram address space. * These are relative offsets in the DP ram address space.
* Initialize base addresses for the buffer descriptors. * Initialize base addresses for the buffer descriptors.
*/ */
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE);
ep->sen_genscc.scc_rbase = i; dp_addr = m8xx_cpm_dpram_offset(dp_mem);
cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[i]; ep->sen_genscc.scc_rbase = dp_mem;
cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[dp_addr];
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE);
ep->sen_genscc.scc_tbase = i; dp_addr = m8xx_cpm_dpram_offset(dp_mem);
cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[i]; ep->sen_genscc.scc_tbase = dp_mem;
cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[dp_addr];
cep->dirty_tx = cep->cur_tx = cep->tx_bd_base; cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
cep->cur_rx = cep->rx_bd_base; cep->cur_rx = cep->rx_bd_base;
......
...@@ -2491,7 +2491,7 @@ static int __init rs_8xx_init(void) ...@@ -2491,7 +2491,7 @@ static int __init rs_8xx_init(void)
{ {
struct serial_state * state; struct serial_state * state;
ser_info_t *info; ser_info_t *info;
uint mem_addr, dp_addr, iobits; uint mem_addr, dp_addr, dp_mem, iobits;
int i, j, idx; int i, j, idx;
ushort chan; ushort chan;
volatile cbd_t *bdp; volatile cbd_t *bdp;
...@@ -2623,7 +2623,8 @@ static int __init rs_8xx_init(void) ...@@ -2623,7 +2623,8 @@ static int __init rs_8xx_init(void)
* descriptors from dual port ram, and a character * descriptors from dual port ram, and a character
* buffer area from host mem. * buffer area from host mem.
*/ */
dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
/* Allocate space for FIFOs in the host memory. /* Allocate space for FIFOs in the host memory.
*/ */
...@@ -2650,15 +2651,16 @@ static int __init rs_8xx_init(void) ...@@ -2650,15 +2651,16 @@ static int __init rs_8xx_init(void)
if (info->state->smc_scc_num & NUM_IS_SCC) { if (info->state->smc_scc_num & NUM_IS_SCC) {
scp = &cp->cp_scc[idx]; scp = &cp->cp_scc[idx];
sup = (scc_uart_t *)&cp->cp_dparam[state->port]; sup = (scc_uart_t *)&cp->cp_dparam[state->port];
sup->scc_genscc.scc_rbase = dp_addr; sup->scc_genscc.scc_rbase = dp_mem;
} }
else { else {
sp = &cp->cp_smc[idx]; sp = &cp->cp_smc[idx];
up = (smc_uart_t *)&cp->cp_dparam[state->port]; up = (smc_uart_t *)&cp->cp_dparam[state->port];
up->smc_rbase = dp_addr; up->smc_rbase = dp_mem;
} }
dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
/* Allocate space for FIFOs in the host memory. /* Allocate space for FIFOs in the host memory.
*/ */
...@@ -2682,7 +2684,7 @@ static int __init rs_8xx_init(void) ...@@ -2682,7 +2684,7 @@ static int __init rs_8xx_init(void)
bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT); bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT);
if (info->state->smc_scc_num & NUM_IS_SCC) { if (info->state->smc_scc_num & NUM_IS_SCC) {
sup->scc_genscc.scc_tbase = dp_addr; sup->scc_genscc.scc_tbase = dp_mem;
/* Set up the uart parameters in the /* Set up the uart parameters in the
* parameter ram. * parameter ram.
...@@ -2779,7 +2781,7 @@ static int __init rs_8xx_init(void) ...@@ -2779,7 +2781,7 @@ static int __init rs_8xx_init(void)
cp->cp_simode &= ~(0xffff << (idx * 16)); cp->cp_simode &= ~(0xffff << (idx * 16));
cp->cp_simode |= (i << ((idx * 16) + 12)); cp->cp_simode |= (i << ((idx * 16) + 12));
up->smc_tbase = dp_addr; up->smc_tbase = dp_mem;
/* Set up the uart parameters in the /* Set up the uart parameters in the
* parameter ram. * parameter ram.
...@@ -2843,7 +2845,7 @@ module_init(rs_8xx_init); ...@@ -2843,7 +2845,7 @@ module_init(rs_8xx_init);
static int __init serial_console_setup(struct console *co, char *options) static int __init serial_console_setup(struct console *co, char *options)
{ {
struct serial_state *ser; struct serial_state *ser;
uint mem_addr, dp_addr, bidx, idx; uint mem_addr, dp_addr, dp_mem, bidx, idx;
ushort chan; ushort chan;
volatile cbd_t *bdp; volatile cbd_t *bdp;
volatile cpm8xx_t *cp; volatile cpm8xx_t *cp;
...@@ -2889,12 +2891,14 @@ static int __init serial_console_setup(struct console *co, char *options) ...@@ -2889,12 +2891,14 @@ static int __init serial_console_setup(struct console *co, char *options)
* memory yet because vm allocator isn't initialized * memory yet because vm allocator isn't initialized
* during this early console init. * during this early console init.
*/ */
dp_addr = m8xx_cpm_dpalloc(8); dp_mem = m8xx_cpm_dpalloc(8);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
mem_addr = (uint)(&cpmp->cp_dpmem[dp_addr]); mem_addr = (uint)(&cpmp->cp_dpmem[dp_addr]);
/* Allocate space for two buffer descriptors in the DP ram. /* Allocate space for two buffer descriptors in the DP ram.
*/ */
dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * 2); dp_mem = m8xx_cpm_dpalloc(sizeof(cbd_t) * 2);
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
/* Set the physical address of the host memory buffers in /* Set the physical address of the host memory buffers in
* the buffer descriptors. * the buffer descriptors.
...@@ -2918,8 +2922,8 @@ static int __init serial_console_setup(struct console *co, char *options) ...@@ -2918,8 +2922,8 @@ static int __init serial_console_setup(struct console *co, char *options)
*/ */
if (ser->smc_scc_num & NUM_IS_SCC) { if (ser->smc_scc_num & NUM_IS_SCC) {
sup->scc_genscc.scc_rbase = dp_addr; sup->scc_genscc.scc_rbase = dp_mem;
sup->scc_genscc.scc_tbase = dp_addr + sizeof(cbd_t); sup->scc_genscc.scc_tbase = dp_mem + sizeof(cbd_t);
/* Set up the uart parameters in the /* Set up the uart parameters in the
* parameter ram. * parameter ram.
...@@ -2977,8 +2981,8 @@ static int __init serial_console_setup(struct console *co, char *options) ...@@ -2977,8 +2981,8 @@ static int __init serial_console_setup(struct console *co, char *options)
} }
else { else {
up->smc_rbase = dp_addr; /* Base of receive buffer desc. */ up->smc_rbase = dp_mem; /* Base of receive buffer desc. */
up->smc_tbase = dp_addr+sizeof(cbd_t); /* Base of xmt buffer desc. */ up->smc_tbase = dp_mem+sizeof(cbd_t); /* Base of xmt buffer desc. */
up->smc_rfcr = SMC_EB; up->smc_rfcr = SMC_EB;
up->smc_tfcr = SMC_EB; up->smc_tfcr = SMC_EB;
......
...@@ -5,3 +5,4 @@ ...@@ -5,3 +5,4 @@
obj-y := checksum.o string.o strcase.o dec_and_lock.o div64.o obj-y := checksum.o string.o strcase.o dec_and_lock.o div64.o
obj-$(CONFIG_SMP) += locks.o obj-$(CONFIG_SMP) += locks.o
obj-$(CONFIG_8xx) += rheap.o
This diff is collapsed.
...@@ -50,7 +50,8 @@ rpx_iic_init(struct i2c_algo_8xx_data *data) ...@@ -50,7 +50,8 @@ rpx_iic_init(struct i2c_algo_8xx_data *data)
/* Allocate space for two transmit and two receive buffer /* Allocate space for two transmit and two receive buffer
* descriptors in the DP ram. * descriptors in the DP ram.
*/ */
data->dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * 4); data->dp_addr = m8xx_cpm_dpram_offset(m8xx_cpm_dpalloc(sizeof(cbd_t)
* 4));
/* ptr to i2c area */ /* ptr to i2c area */
data->i2c = (i2c8xx_t *)&(((immap_t *)IMAP_ADDR)->im_i2c); data->i2c = (i2c8xx_t *)&(((immap_t *)IMAP_ADDR)->im_i2c);
......
...@@ -129,6 +129,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo) ...@@ -129,6 +129,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
{ {
int dpmemsz, memsz; int dpmemsz, memsz;
u8 *dp_mem;
uint dp_addr; uint dp_addr;
u8 *mem_addr; u8 *mem_addr;
dma_addr_t dma_addr; dma_addr_t dma_addr;
...@@ -136,12 +137,13 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) ...@@ -136,12 +137,13 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line);
dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
dp_addr = m8xx_cpm_dpalloc(dpmemsz); dp_mem = m8xx_cpm_dpalloc(dpmemsz);
if (dp_addr == CPM_DP_NOSPACE) { if (dp_mem == NULL) {
printk(KERN_ERR printk(KERN_ERR
"cpm_uart_cpm1.c: could not allocate buffer descriptors\n"); "cpm_uart_cpm1.c: could not allocate buffer descriptors\n");
return -ENOMEM; return -ENOMEM;
} }
dp_addr = m8xx_cpm_dpram_offset(dp_mem);
memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
...@@ -152,10 +154,8 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) ...@@ -152,10 +154,8 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr, mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,
GFP_KERNEL); GFP_KERNEL);
/* We cant really from memory allocated via cpm2_dpalloc,
* fix this if in the future we can */
if (mem_addr == NULL) { if (mem_addr == NULL) {
/* XXX cpm_dpalloc does not yet free */ m8xx_cpm_dpfree(dp_mem);
printk(KERN_ERR printk(KERN_ERR
"cpm_uart_cpm1.c: could not allocate coherent memory\n"); "cpm_uart_cpm1.c: could not allocate coherent memory\n");
return -ENOMEM; return -ENOMEM;
...@@ -169,7 +169,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) ...@@ -169,7 +169,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
* pinfo->rx_fifosize); * pinfo->rx_fifosize);
pinfo->rx_bd_base = (volatile cbd_t *)(DPRAM_BASE + dp_addr); pinfo->rx_bd_base = (volatile cbd_t *)dp_mem;
pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
return 0; return 0;
...@@ -183,7 +183,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) ...@@ -183,7 +183,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
pinfo->tx_fifosize), pinfo->mem_addr, pinfo->tx_fifosize), pinfo->mem_addr,
pinfo->dma_addr); pinfo->dma_addr);
/* XXX cannot free dpmem yet */ m8xx_cpm_dpfree(m8xx_cpm_dpram_addr(pinfo->dp_addr));
} }
/* Setup any dynamic params in the uart desc */ /* Setup any dynamic params in the uart desc */
......
...@@ -66,7 +66,12 @@ ...@@ -66,7 +66,12 @@
* and dual port ram. * and dual port ram.
*/ */
extern cpm8xx_t *cpmp; /* Pointer to comm processor */ extern cpm8xx_t *cpmp; /* Pointer to comm processor */
uint m8xx_cpm_dpalloc(uint size); extern void *m8xx_cpm_dpalloc(int size);
extern int m8xx_cpm_dpfree(void *addr);
extern void *m8xx_cpm_dpalloc_fixed(void *addr, int size);
extern void m8xx_cpm_dpdump(void);
extern int m8xx_cpm_dpram_offset(void *addr);
extern void *m8xx_cpm_dpram_addr(int offset);
uint m8xx_cpm_hostalloc(uint size); uint m8xx_cpm_hostalloc(uint size);
void m8xx_cpm_setbrg(uint brg, uint rate); void m8xx_cpm_setbrg(uint brg, uint rate);
......
/*
* include/asm-ppc/rheap.c
*
* Header file for the implementation of a remote heap.
*
* Author: Pantelis Antoniou <panto@intracom.gr>
*
* 2004 (c) INTRACOM S.A. Greece. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_PPC_RHEAP_H__
#define __ASM_PPC_RHEAP_H__
#include <linux/list.h>
typedef struct _rh_block {
struct list_head list;
void *start;
int size;
const char *owner;
} rh_block_t;
typedef struct _rh_info {
unsigned int alignment;
int max_blocks;
int empty_slots;
rh_block_t *block;
struct list_head empty_list;
struct list_head free_list;
struct list_head taken_list;
unsigned int flags;
} rh_info_t;
#define RHIF_STATIC_INFO 0x1
#define RHIF_STATIC_BLOCK 0x2
typedef struct rh_stats_t {
void *start;
int size;
const char *owner;
} rh_stats_t;
#define RHGS_FREE 0
#define RHGS_TAKEN 1
/* Create a remote heap dynamically */
extern rh_info_t *rh_create(unsigned int alignment);
/* Destroy a remote heap, created by rh_create() */
extern void rh_destroy(rh_info_t * info);
/* Initialize in place a remote info block */
extern void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
rh_block_t * block);
/* Attach a free region to manage */
extern int rh_attach_region(rh_info_t * info, void *start, int size);
/* Detach a free region */
extern void *rh_detach_region(rh_info_t * info, void *start, int size);
/* Allocate the given size from the remote heap */
extern void *rh_alloc(rh_info_t * info, int size, const char *owner);
/* Allocate the given size from the given address */
extern void *rh_alloc_fixed(rh_info_t * info, void *start, int size,
const char *owner);
/* Free the allocated area */
extern int rh_free(rh_info_t * info, void *start);
/* Get stats for debugging purposes */
extern int rh_get_stats(rh_info_t * info, int what, int max_stats,
rh_stats_t * stats);
/* Simple dump of remote heap info */
extern void rh_dump(rh_info_t * info);
/* Set owner of taken block */
extern int rh_set_owner(rh_info_t * info, void *start, const char *owner);
#endif /* __ASM_PPC_RHEAP_H__ */
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