Commit b409db08 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
parent 3d6c72b7
...@@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt) ...@@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
if (gt->i915->params.reset < 2) if (gt->i915->params.reset < 2)
return false; return false;
return GRAPHICS_VER(gt->i915) >= 7; return INTEL_INFO(gt->i915)->has_reset_engine;
} }
int intel_reset_guc(struct intel_gt *gt) int intel_reset_guc(struct intel_gt *gt)
......
...@@ -456,6 +456,7 @@ static const struct intel_device_info snb_m_gt2_info = { ...@@ -456,6 +456,7 @@ static const struct intel_device_info snb_m_gt2_info = {
.has_coherent_ggtt = true, \ .has_coherent_ggtt = true, \
.has_llc = 1, \ .has_llc = 1, \
.has_rc6p = 1, \ .has_rc6p = 1, \
.has_reset_engine = true, \
.has_rps = true, \ .has_rps = true, \
.dma_mask_size = 40, \ .dma_mask_size = 40, \
.ppgtt_type = INTEL_PPGTT_ALIASING, \ .ppgtt_type = INTEL_PPGTT_ALIASING, \
...@@ -513,6 +514,7 @@ static const struct intel_device_info vlv_info = { ...@@ -513,6 +514,7 @@ static const struct intel_device_info vlv_info = {
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1, .has_runtime_pm = 1,
.has_reset_engine = true,
.has_rps = true, .has_rps = true,
.display.has_gmch = 1, .display.has_gmch = 1,
.display.has_hotplug = 1, .display.has_hotplug = 1,
...@@ -616,6 +618,7 @@ static const struct intel_device_info chv_info = { ...@@ -616,6 +618,7 @@ static const struct intel_device_info chv_info = {
.dma_mask_size = 39, .dma_mask_size = 39,
.ppgtt_type = INTEL_PPGTT_FULL, .ppgtt_type = INTEL_PPGTT_FULL,
.ppgtt_size = 32, .ppgtt_size = 32,
.has_reset_engine = 1,
.has_snoop = true, .has_snoop = true,
.has_coherent_ggtt = false, .has_coherent_ggtt = false,
.display_mmio_offset = VLV_DISPLAY_BASE, .display_mmio_offset = VLV_DISPLAY_BASE,
...@@ -697,6 +700,7 @@ static const struct intel_device_info skl_gt4_info = { ...@@ -697,6 +700,7 @@ static const struct intel_device_info skl_gt4_info = {
.dma_mask_size = 39, \ .dma_mask_size = 39, \
.ppgtt_type = INTEL_PPGTT_FULL, \ .ppgtt_type = INTEL_PPGTT_FULL, \
.ppgtt_size = 48, \ .ppgtt_size = 48, \
.has_reset_engine = 1, \
.has_snoop = true, \ .has_snoop = true, \
.has_coherent_ggtt = false, \ .has_coherent_ggtt = false, \
.display.has_ipc = 1, \ .display.has_ipc = 1, \
...@@ -999,6 +1003,7 @@ static const struct intel_device_info adl_p_info = { ...@@ -999,6 +1003,7 @@ static const struct intel_device_info adl_p_info = {
.has_logical_ring_contexts = 1, \ .has_logical_ring_contexts = 1, \
.has_logical_ring_elsq = 1, \ .has_logical_ring_elsq = 1, \
.has_mslices = 1, \ .has_mslices = 1, \
.has_reset_engine = 1, \
.has_rps = 1, \ .has_rps = 1, \
.has_runtime_pm = 1, \ .has_runtime_pm = 1, \
.ppgtt_size = 48, \ .ppgtt_size = 48, \
......
...@@ -137,6 +137,7 @@ enum intel_ppgtt_type { ...@@ -137,6 +137,7 @@ enum intel_ppgtt_type {
func(has_64k_pages); \ func(has_64k_pages); \
func(needs_compact_pt); \ func(needs_compact_pt); \
func(gpu_reset_clobbers_display); \ func(gpu_reset_clobbers_display); \
func(has_reset_engine); \
func(has_4tile); \ func(has_4tile); \
func(has_flat_ccs); \ func(has_flat_ccs); \
func(has_global_mocs); \ func(has_global_mocs); \
......
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