Commit b4e031e4 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher

drm/amd/display: revert max lb use by default for n10

This is causing a pstate change underflow regression for
unknown reason
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarEric Bernstein <Eric.Bernstein@amd.com>
Acked-by: default avatarSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c006a1c0
...@@ -619,7 +619,6 @@ static const struct dc_debug_options debug_defaults_drv = { ...@@ -619,7 +619,6 @@ static const struct dc_debug_options debug_defaults_drv = {
.recovery_enabled = false, /*enable this by default after testing.*/ .recovery_enabled = false, /*enable this by default after testing.*/
.max_downscale_src_width = 3840, .max_downscale_src_width = 3840,
.underflow_assert_delay_us = 0xFFFFFFFF, .underflow_assert_delay_us = 0xFFFFFFFF,
.use_max_lb = true
}; };
static const struct dc_debug_options debug_defaults_diags = { static const struct dc_debug_options debug_defaults_diags = {
...@@ -631,7 +630,6 @@ static const struct dc_debug_options debug_defaults_diags = { ...@@ -631,7 +630,6 @@ static const struct dc_debug_options debug_defaults_diags = {
.disable_pplib_clock_request = true, .disable_pplib_clock_request = true,
.disable_pplib_wm_range = true, .disable_pplib_wm_range = true,
.underflow_assert_delay_us = 0xFFFFFFFF, .underflow_assert_delay_us = 0xFFFFFFFF,
.use_max_lb = true
}; };
static void dcn10_dpp_destroy(struct dpp **dpp) static void dcn10_dpp_destroy(struct dpp **dpp)
......
...@@ -1075,7 +1075,6 @@ static const struct dc_debug_options debug_defaults_drv = { ...@@ -1075,7 +1075,6 @@ static const struct dc_debug_options debug_defaults_drv = {
.scl_reset_length10 = true, .scl_reset_length10 = true,
.sanity_checks = false, .sanity_checks = false,
.underflow_assert_delay_us = 0xFFFFFFFF, .underflow_assert_delay_us = 0xFFFFFFFF,
.use_max_lb = true
}; };
static const struct dc_debug_options debug_defaults_diags = { static const struct dc_debug_options debug_defaults_diags = {
...@@ -1092,7 +1091,6 @@ static const struct dc_debug_options debug_defaults_diags = { ...@@ -1092,7 +1091,6 @@ static const struct dc_debug_options debug_defaults_diags = {
.scl_reset_length10 = true, .scl_reset_length10 = true,
.underflow_assert_delay_us = 0xFFFFFFFF, .underflow_assert_delay_us = 0xFFFFFFFF,
.enable_tri_buf = true, .enable_tri_buf = true,
.use_max_lb = true
}; };
void dcn20_dpp_destroy(struct dpp **dpp) void dcn20_dpp_destroy(struct dpp **dpp)
......
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