Commit b51351e2 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman

powerpc/64s/idle: Branch to handler with virtual mode offset

Have the system reset idle wakeup handlers branched to in real mode
with the 0xc... kernel address applied. This allows simplifications of
avoiding rfid when switching to virtual mode in the wakeup handler.
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent b48bbb82
...@@ -236,6 +236,19 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) ...@@ -236,6 +236,19 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define kvmppc_interrupt kvmppc_interrupt_pr #define kvmppc_interrupt kvmppc_interrupt_pr
#endif #endif
/*
* Branch to label using its 0xC000 address. This results in instruction
* address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
* on using mtmsr rather than rfid.
*
* This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
* load KBASE for a slight optimisation.
*/
#define BRANCH_TO_C000(reg, label) \
__LOAD_HANDLER(reg, label); \
mtctr reg; \
bctr
#ifdef CONFIG_RELOCATABLE #ifdef CONFIG_RELOCATABLE
#define BRANCH_TO_COMMON(reg, label) \ #define BRANCH_TO_COMMON(reg, label) \
__LOAD_HANDLER(reg, label); \ __LOAD_HANDLER(reg, label); \
......
...@@ -99,7 +99,9 @@ EXC_VIRT_NONE(0x4000, 0x100) ...@@ -99,7 +99,9 @@ EXC_VIRT_NONE(0x4000, 0x100)
#ifdef CONFIG_PPC_P7_NAP #ifdef CONFIG_PPC_P7_NAP
/* /*
* If running native on arch 2.06 or later, check if we are waking up * If running native on arch 2.06 or later, check if we are waking up
* from nap/sleep/winkle, and branch to idle handler. * from nap/sleep/winkle, and branch to idle handler. The idle wakeup
* handler initially runs in real mode, but we branch to the 0xc000...
* address so we can turn on relocation with mtmsr.
*/ */
#define IDLETEST(n) \ #define IDLETEST(n) \
BEGIN_FTR_SECTION ; \ BEGIN_FTR_SECTION ; \
...@@ -107,7 +109,7 @@ EXC_VIRT_NONE(0x4000, 0x100) ...@@ -107,7 +109,7 @@ EXC_VIRT_NONE(0x4000, 0x100)
rlwinm. r10,r10,47-31,30,31 ; \ rlwinm. r10,r10,47-31,30,31 ; \
beq- 1f ; \ beq- 1f ; \
cmpwi cr3,r10,2 ; \ cmpwi cr3,r10,2 ; \
BRANCH_TO_COMMON(r10, system_reset_idle_common) ; \ BRANCH_TO_C000(r10, system_reset_idle_common) ; \
1: \ 1: \
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
#else #else
......
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