Commit b596649f authored by Dave Airlie's avatar Dave Airlie

Merge tag 'amd-drm-fixes-5.9-2020-09-03' of...

Merge tag 'amd-drm-fixes-5.9-2020-09-03' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

amd-drm-fixes-5.9-2020-09-03:

amdgpu:
- Fix for 32bit systems
- SW CTF fix
- Update for Sienna Cichlid
- CIK bug fixes

radeon:
- PLL fix
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200903050022.3960-1-alexander.deucher@amd.com
parents f75aef39 fc8c7052
...@@ -1840,10 +1840,14 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) ...@@ -1840,10 +1840,14 @@ static bool arcturus_is_dpm_running(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
uint32_t feature_mask[2]; uint32_t feature_mask[2];
unsigned long feature_enabled; uint64_t feature_enabled;
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | if (ret)
((uint64_t)feature_mask[1] << 32)); return false;
feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
return !!(feature_enabled & SMC_DPM_FEATURE); return !!(feature_enabled & SMC_DPM_FEATURE);
} }
......
...@@ -3581,7 +3581,8 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, ...@@ -3581,7 +3581,8 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
case AMDGPU_PP_SENSOR_GPU_POWER: case AMDGPU_PP_SENSOR_GPU_POWER:
return smu7_get_gpu_power(hwmgr, (uint32_t *)value); return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
case AMDGPU_PP_SENSOR_VDDGFX: case AMDGPU_PP_SENSOR_VDDGFX:
if ((data->vr_config & 0xff) == 0x2) if ((data->vr_config & VRCONF_VDDGFX_MASK) ==
(VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT))
val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device, val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,
CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID); CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID);
else else
......
...@@ -374,8 +374,18 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, ...@@ -374,8 +374,18 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
/* compare them in unit celsius degree */ /* compare them in unit celsius degree */
if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES) if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES; low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
/*
* As a common sense, usSoftwareShutdownTemp should be bigger
* than ThotspotLimit. For any invalid usSoftwareShutdownTemp,
* we will just use the max possible setting VEGA10_THERMAL_MAXIMUM_ALERT_TEMP
* to avoid false alarms.
*/
if ((tdp_table->usSoftwareShutdownTemp >
range->hotspot_crit_max / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)) {
if (high > tdp_table->usSoftwareShutdownTemp) if (high > tdp_table->usSoftwareShutdownTemp)
high = tdp_table->usSoftwareShutdownTemp; high = tdp_table->usSoftwareShutdownTemp;
}
if (low > high) if (low > high)
return -EINVAL; return -EINVAL;
......
...@@ -1331,10 +1331,14 @@ static bool navi10_is_dpm_running(struct smu_context *smu) ...@@ -1331,10 +1331,14 @@ static bool navi10_is_dpm_running(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
uint32_t feature_mask[2]; uint32_t feature_mask[2];
unsigned long feature_enabled; uint64_t feature_enabled;
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | if (ret)
((uint64_t)feature_mask[1] << 32)); return false;
feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
return !!(feature_enabled & SMC_DPM_FEATURE); return !!(feature_enabled & SMC_DPM_FEATURE);
} }
......
...@@ -68,7 +68,8 @@ ...@@ -68,7 +68,8 @@
FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \ FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \
FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \ FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \
FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \ FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | \
FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)) FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) | \
FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))
#define SMU_11_0_7_GFX_BUSY_THRESHOLD 15 #define SMU_11_0_7_GFX_BUSY_THRESHOLD 15
...@@ -229,6 +230,7 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, ...@@ -229,6 +230,7 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT)
| FEATURE_MASK(FEATURE_DPM_FCLK_BIT) | FEATURE_MASK(FEATURE_DPM_FCLK_BIT)
| FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)
| FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
| FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT) | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
| FEATURE_MASK(FEATURE_DS_FCLK_BIT) | FEATURE_MASK(FEATURE_DS_FCLK_BIT)
...@@ -1147,10 +1149,14 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu) ...@@ -1147,10 +1149,14 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu)
{ {
int ret = 0; int ret = 0;
uint32_t feature_mask[2]; uint32_t feature_mask[2];
unsigned long feature_enabled; uint64_t feature_enabled;
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | if (ret)
((uint64_t)feature_mask[1] << 32)); return false;
feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
return !!(feature_enabled & SMC_DPM_FEATURE); return !!(feature_enabled & SMC_DPM_FEATURE);
} }
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include "cgs_common.h" #include "cgs_common.h"
#include "atombios.h" #include "atombios.h"
#include "pppcielanes.h" #include "pppcielanes.h"
#include "smu7_smumgr.h"
#include "smu/smu_7_0_1_d.h" #include "smu/smu_7_0_1_d.h"
#include "smu/smu_7_0_1_sh_mask.h" #include "smu/smu_7_0_1_sh_mask.h"
...@@ -2948,6 +2949,7 @@ const struct pp_smumgr_func ci_smu_funcs = { ...@@ -2948,6 +2949,7 @@ const struct pp_smumgr_func ci_smu_funcs = {
.request_smu_load_specific_fw = NULL, .request_smu_load_specific_fw = NULL,
.send_msg_to_smc = ci_send_msg_to_smc, .send_msg_to_smc = ci_send_msg_to_smc,
.send_msg_to_smc_with_parameter = ci_send_msg_to_smc_with_parameter, .send_msg_to_smc_with_parameter = ci_send_msg_to_smc_with_parameter,
.get_argument = smu7_get_argument,
.download_pptable_settings = NULL, .download_pptable_settings = NULL,
.upload_pptable_settings = NULL, .upload_pptable_settings = NULL,
.get_offsetof = ci_get_offsetof, .get_offsetof = ci_get_offsetof,
......
...@@ -933,7 +933,7 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, ...@@ -933,7 +933,7 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div,
/* get matching reference and feedback divider */ /* get matching reference and feedback divider */
*ref_div = min(max(den/post_div, 1u), ref_div_max); *ref_div = min(max(den/post_div, 1u), ref_div_max);
*fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); *fb_div = max(nom * *ref_div * post_div / den, 1u);
/* limit fb divider to its maximum */ /* limit fb divider to its maximum */
if (*fb_div > fb_div_max) { if (*fb_div > fb_div_max) {
......
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