Commit b5c0a800 authored by Marcin Wojtas's avatar Marcin Wojtas Committed by David S. Miller

net: mvpp2: Fix the periodic XON enable bit

This bit was originally wrong, the correct value is BIT(1), so fix it.
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0bec8c88
...@@ -262,7 +262,7 @@ ...@@ -262,7 +262,7 @@
#define MVPP2_GMAC_MAX_RX_SIZE_MASK 0x7ffc #define MVPP2_GMAC_MAX_RX_SIZE_MASK 0x7ffc
#define MVPP2_GMAC_MIB_CNTR_EN_MASK BIT(15) #define MVPP2_GMAC_MIB_CNTR_EN_MASK BIT(15)
#define MVPP2_GMAC_CTRL_1_REG 0x4 #define MVPP2_GMAC_CTRL_1_REG 0x4
#define MVPP2_GMAC_PERIODIC_XON_EN_MASK BIT(0) #define MVPP2_GMAC_PERIODIC_XON_EN_MASK BIT(1)
#define MVPP2_GMAC_GMII_LB_EN_MASK BIT(5) #define MVPP2_GMAC_GMII_LB_EN_MASK BIT(5)
#define MVPP2_GMAC_PCS_LB_EN_BIT 6 #define MVPP2_GMAC_PCS_LB_EN_BIT 6
#define MVPP2_GMAC_PCS_LB_EN_MASK BIT(6) #define MVPP2_GMAC_PCS_LB_EN_MASK BIT(6)
......
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