Commit b5f2ace2 authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Shawn Guo

arm64: dts: imx8mn-evk: Add sound-wm8524 card nodes

Add sound-wm8524 card nodes which are supported on imx8mn-evk board.
Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 26442c79
...@@ -46,6 +46,32 @@ ir-receiver { ...@@ -46,6 +46,32 @@ ir-receiver {
pinctrl-0 = <&pinctrl_ir>; pinctrl-0 = <&pinctrl_ir>;
linux,autosuspend-period = <125>; linux,autosuspend-period = <125>;
}; };
wm8524: audio-codec {
#sound-dai-cells = <0>;
compatible = "wlf,wm8524";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_wlf>;
wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
clock-names = "mclk";
};
sound-wm8524 {
compatible = "fsl,imx-audio-wm8524";
model = "wm8524-audio";
audio-cpu = <&sai3>;
audio-codec = <&wm8524>;
audio-asrc = <&easrc>;
audio-routing =
"Line Out Jack", "LINEVOUTL",
"Line Out Jack", "LINEVOUTR";
};
};
&easrc {
fsl,asrc-rate = <48000>;
status = "okay";
}; };
&fec1 { &fec1 {
...@@ -124,6 +150,16 @@ pca6416: gpio@20 { ...@@ -124,6 +150,16 @@ pca6416: gpio@20 {
}; };
}; };
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
fsl,sai-mclk-direction-output;
status = "okay";
};
&snvs_pwrkey { &snvs_pwrkey {
status = "okay"; status = "okay";
}; };
...@@ -210,6 +246,12 @@ MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 ...@@ -210,6 +246,12 @@ MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
>; >;
}; };
pinctrl_gpio_wlf: gpiowlfgrp {
fsl,pins = <
MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
>;
};
pinctrl_ir: irgrp { pinctrl_ir: irgrp {
fsl,pins = < fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
...@@ -249,6 +291,15 @@ MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 ...@@ -249,6 +291,15 @@ MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
>; >;
}; };
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
>;
};
pinctrl_typec1: typec1grp { pinctrl_typec1: typec1grp {
fsl,pins = < fsl,pins = <
MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
......
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