Commit b6181a0a authored by Matthew Wilcox's avatar Matthew Wilcox Committed by Linus Torvalds

[PATCH] PA-RISC assembler cleanups and fixes

 - Convert ldil/ldo to using the load32 macro.
Signed-Off-By: default avatarKyle McMartin <kyle@parisc-linux.org>

 - loop on signal delivery like other archs
 - unify VM initialization code for 32/64-bit
Signed-off-by: default avatarRandolph Chung <tausq@parisc-linux.org>
Signed-off-by: default avatarMatthew Wilcox <willy@parisc-linux.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 50599817
......@@ -76,13 +76,11 @@
mtsp %r0, %sr5
mtsp %r0, %sr6
mtsp %r0, %sr7
ldil L%KERNEL_PSW, %r1
ldo R%KERNEL_PSW(%r1), %r1
load32 KERNEL_PSW, %r1
mtctl %r1, %cr22
mtctl %r0, %cr17 /* Clear IIASQ tail */
mtctl %r0, %cr17 /* Clear IIASQ head */
ldil L%4f, %r1
ldo R%4f(%r1), %r1
load32 4f, %r1
mtctl %r1, %cr18 /* Set IIAOQ tail */
ldo 4(%r1), %r1
mtctl %r1, %cr18 /* Set IIAOQ head */
......@@ -197,8 +195,7 @@
/* HPMC handler */
.macro hpmc code
nop /* must be a NOP, will be patched later */
ldil L%PA(os_hpmc), %r3
ldo R%PA(os_hpmc)(%r3), %r3
load32 PA(os_hpmc), %r3
bv,n 0(%r3)
nop
.word 0 /* checksum (will be patched) */
......@@ -860,8 +857,7 @@ _switch_to:
callee_save
ldil L%_switch_to_ret, %r2
ldo R%_switch_to_ret(%r2), %r2
load32 _switch_to_ret, %r2
STREG %r2, TASK_PT_KPC(%r26)
LDREG TASK_PT_KPC(%r25), %r2
......@@ -914,16 +910,13 @@ syscall_exit_rfi:
depi 3,31,2,%r19
STREG %r19,PT_IAOQ1(%r16)
LDREG PT_PSW(%r16),%r19
ldil L%USER_PSW_MASK,%r1
ldo R%USER_PSW_MASK(%r1),%r1
load32 USER_PSW_MASK,%r1
#ifdef __LP64__
ldil L%USER_PSW_HI_MASK,%r20
ldo R%USER_PSW_HI_MASK(%r20),%r20
load32 USER_PSW_HI_MASK,%r20
depd %r20,31,32,%r1
#endif
and %r19,%r1,%r19 /* Mask out bits that user shouldn't play with */
ldil L%USER_PSW,%r1
ldo R%USER_PSW(%r1),%r1
load32 USER_PSW,%r1
or %r19,%r1,%r19 /* Make sure default USER_PSW bits are set */
STREG %r19,PT_PSW(%r16)
......@@ -955,8 +948,7 @@ intr_return:
.import irq_stat,data
ldil L%irq_stat,%r19
ldo R%irq_stat(%r19),%r19
load32 irq_stat,%r19
#ifdef CONFIG_SMP
mfctl %cr30,%r1
ldw TI_CPU(%r1),%r1 /* get cpu # - int */
......@@ -1079,7 +1071,7 @@ intr_do_signal:
BL do_signal,%r2
copy %r0, %r26 /* sigset_t *oldset = NULL */
b intr_restore
b intr_check_sig
nop
/*
......@@ -1607,8 +1599,7 @@ dbit_trap_20w:
#ifdef CONFIG_SMP
CMPIB=,n 0,spc,dbit_nolock_20w
ldil L%PA(pa_dbit_lock),t0
ldo R%PA(pa_dbit_lock)(t0),t0
load32 PA(pa_dbit_lock),t0
dbit_spin_20w:
ldcw 0(t0),t1
......@@ -1644,8 +1635,7 @@ dbit_trap_11:
#ifdef CONFIG_SMP
CMPIB=,n 0,spc,dbit_nolock_11
ldil L%PA(pa_dbit_lock),t0
ldo R%PA(pa_dbit_lock)(t0),t0
load32 PA(pa_dbit_lock),t0
dbit_spin_11:
ldcw 0(t0),t1
......@@ -1685,8 +1675,7 @@ dbit_trap_20:
#ifdef CONFIG_SMP
CMPIB=,n 0,spc,dbit_nolock_20
ldil L%PA(pa_dbit_lock),t0
ldo R%PA(pa_dbit_lock)(t0),t0
load32 PA(pa_dbit_lock),t0
dbit_spin_20:
ldcw 0(t0),t1
......@@ -2082,8 +2071,7 @@ syscall_check_bh:
.import irq_stat,data
ldil L%irq_stat,%r19
ldo R%irq_stat(%r19),%r19
load32 irq_stat,%r19
#ifdef CONFIG_SMP
/* sched.h: int processor */
......@@ -2282,7 +2270,7 @@ syscall_do_signal:
ldo TASK_REGS(%r1), %r20 /* reload pt_regs */
reg_restore %r20
b,n syscall_restore
b,n syscall_check_sig
/*
* get_register is used by the non access tlb miss handlers to
......
......@@ -71,47 +71,42 @@ $bss_loop:
stw,ma %arg2,4(%r1)
stw,ma %arg3,4(%r1)
/* Initialize startup VM. Just map first 8 MB of memory */
load32 PA(pg0),%r1
#ifdef __LP64__
load32 PA(pmd0),%r5
shrd %r5,PxD_VALUE_SHIFT,%r3
#else
shr %r1,PxD_VALUE_SHIFT,%r3
#endif
ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
/* Initialize startup VM. Just map first 8/16 MB of memory */
load32 PA(swapper_pg_dir),%r4
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
#ifdef __LP64__
stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
shrd %r1,PxD_VALUE_SHIFT,%r3
/* Set pmd in pgd */
load32 PA(pmd0),%r5
shrd %r5,PxD_VALUE_SHIFT,%r3
ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r5
stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
#else
/* 2-level page table, so pmd == pgd */
ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
#endif
/* Fill in pmd with enough pte directories */
load32 PA(pg0),%r1
SHRREG %r1,PxD_VALUE_SHIFT,%r3
ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
ldi ASM_PT_INITIAL,%r1
1:
#ifdef __LP64__
stw %r3,0(%r5)
#else
stw %r3,0(%r4)
#endif
ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
addib,> -1,%r1,1b
#ifdef __LP64__
ldo ASM_PMD_ENTRY_SIZE(%r5),%r5
ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
#else
ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
#endif
/* Now initialize the PTEs themselves */
ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
load32 PA(pg0),%r1
......
......@@ -121,8 +121,7 @@ os_hpmc:
/* Setup stack pointer. */
ldil L%PA(hpmc_stack),sp
ldo R%PA(hpmc_stack)(sp),sp
load32 PA(hpmc_stack),sp
ldo 128(sp),sp /* leave room for arguments */
......@@ -135,8 +134,7 @@ os_hpmc:
mtctl %r4,ipsw
mtctl %r0,pcsq
mtctl %r0,pcsq
ldil L%PA(os_hpmc_1),%r4
ldo R%PA(os_hpmc_1)(%r4),%r4
load32 PA(os_hpmc_1),%r4
mtctl %r4,pcoq
ldo 4(%r4),%r4
mtctl %r4,pcoq
......@@ -155,12 +153,9 @@ os_hpmc_1:
ldo PDC_PIM(%r0), arg0
ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
ldil L%PA(hpmc_raddr),arg2
ldo R%PA(hpmc_raddr)(arg2),arg2
ldil L%PA(hpmc_pim_data),arg3
ldo R%PA(hpmc_pim_data)(arg3),arg3
ldil L%HPMC_PIM_DATA_SIZE,%r4
ldo R%HPMC_PIM_DATA_SIZE(%r4),%r4
load32 PA(hpmc_raddr),arg2
load32 PA(hpmc_pim_data),arg3
load32 HPMC_PIM_DATA_SIZE,%r4
stw %r4,-52(sp)
ldil L%PA(os_hpmc_2), rp
......@@ -199,16 +194,13 @@ os_hpmc_3:
ldo PDC_IODC(%r0),arg0
ldo PDC_IODC_READ(%r0),arg1
ldil L%PA(hpmc_raddr),arg2
ldo R%PA(hpmc_raddr)(arg2),arg2
load32 PA(hpmc_raddr),arg2
ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
ldo PDC_IODC_RI_INIT(%r0),%r4
stw %r4,-52(sp)
ldil L%PA(hpmc_iodc_buf),%r4
ldo R%PA(hpmc_iodc_buf)(%r4),%r4
load32 PA(hpmc_iodc_buf),%r4
stw %r4,-56(sp)
ldil L%HPMC_IODC_BUF_SIZE,%r4
ldo R%HPMC_IODC_BUF_SIZE(%r4),%r4
load32 HPMC_IODC_BUF_SIZE,%r4
stw %r4,-60(sp)
ldil L%PA(os_hpmc_4),rp
......@@ -225,16 +217,14 @@ os_hpmc_4:
ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */
depi 0,31,11,arg2 /* clear bits 21-31 */
ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
ldil L%PA(hpmc_raddr),%r4
ldo R%PA(hpmc_raddr)(%r4),%r4
load32 PA(hpmc_raddr),%r4
stw %r4, -52(sp)
stw %r0, -56(sp) /* HV */
stw %r0, -60(sp) /* HV */
stw %r0, -64(sp) /* HV */
stw %r0, -68(sp) /* lang, must be zero */
ldil L%PA(hpmc_iodc_buf),%r5
ldo R%PA(hpmc_iodc_buf)(%r5),%r5
load32 PA(hpmc_iodc_buf),%r5
ldil L%PA(os_hpmc_5),rp
bv (%r5)
ldo R%PA(os_hpmc_5)(rp),rp
......@@ -249,8 +239,7 @@ os_hpmc_5:
* we don't intend to ever return to user land anyway)
*/
ldil L%PA(swapper_pg_dir),%r4
ldo R%PA(swapper_pg_dir)(%r4),%r4
load32 PA(swapper_pg_dir),%r4
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
......@@ -265,8 +254,7 @@ os_hpmc_5:
rsm 8,%r0 /* Clear Q bit */
ldi 1,%r8 /* Set trap code to "1" for HPMC */
ldil L%PA(intr_save), %r1
ldo R%PA(intr_save)(%r1), %r1
load32 PA(intr_save),%r1
be 0(%sr7,%r1)
nop
......
......@@ -81,8 +81,7 @@ real32_call_asm:
rsm PSW_SM_W, %r0 /* go narrow */
#endif
ldil L%PA(ric_ret), %r2
ldo R%PA(ric_ret)(%r2), %r2
load32 PA(ric_ret), %r2
bv 0(%r31)
nop
ric_ret:
......
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