[PATCH] H8/300 io.h bussizing problem fix

- fix warning
- byte swap miss fix
- 16bit bus access problem fix

arch/h8300/platform/h8300h/aki3068net/timer.c

@@ -27,10 +27,10 @@
 
 void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
 {
-	outb(H8300_TIMER_COUNT_DATA,TCORA2);
-	outb(0x00,_8TCSR2);
+	ctrl_outb(H8300_TIMER_COUNT_DATA,TCORA2);
+	ctrl_outb(0x00,_8TCSR2);
 	request_irq(40,timer_int,0,"timer",0);
-	outb(0x40|0x08|0x03,_8TCR2);
+	ctrl_outb(0x40|0x08|0x03,_8TCR2);
 }
 
 void platform_timer_eoi(void)

arch/h8300/platform/h8300h/generic/timer.c

@@ -29,13 +29,14 @@ extern int request_irq_boot(unsigned int,
 
 #if defined(CONFIG_H83007) || defined(CONFIG_H83068)
 #include <asm/regs306x.h>
+#define CMFA 6
 
 int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *))
 {
-	outb(H8300_TIMER_COUNT_DATA,TMR8CMA2);
-	outb(0x00,TMR8TCSR2);
-	request_irq_boot(40,timer_int,0,"timer",0);
-	outb(0x40|0x08|0x03,TMR8TCNT2);
+	ctrl_outb(H8300_TIMER_COUNT_DATA,TCORA2);
+	ctrl_outb(0x00,_8TCSR2);
+	request_irq(40,timer_int,0,"timer",0);
+	ctrl_outb(0x40|0x08|0x03,_8TCR2);
 	return 0;
 }
 
@@ -65,19 +66,19 @@ int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *))
 {
 	*(unsigned short *)GRA= H8300_TIMER_COUNT_DATA;
 	*(unsigned short *)TCNT=0;
-	outb(0x23,TCR);
-	outb(0x00,TIOR);
+	ctrl_outb(0x23,TCR);
+	ctrl_outb(0x00,TIOR);
 	request_timer_irq(26,timer_int,0,"timer",0);
-	outb(inb(TIER) | 0x01,TIER);
-	outb(inb(TSNC) & ~0x01,TSNC);
-	outb(inb(TMDR) & ~0x01,TMDR);
-	outb(inb(TSTR) | 0x01,TSTR);
+	ctrl_outb(inb(TIER) | 0x01,TIER);
+	ctrl_outb(inb(TSNC) & ~0x01,TSNC);
+	ctrl_outb(inb(TMDR) & ~0x01,TMDR);
+	ctrl_outb(inb(TSTR) | 0x01,TSTR);
 	return 0;
 }
 
 void platform_timer_eoi(void)
 {
-	outb(inb(TSR) & ~0x01,TSR);
+	ctrl_outb(inb(TSR) & ~0x01,TSR);
 }
 #endif
 

arch/h8300/platform/h8300h/h8max/timer.c

@@ -27,10 +27,10 @@
 
 void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
 {
-	outb(H8300_TIMER_COUNT_DATA,TCORA2);
-	outb(0x00,_8TCSR2);
+	ctrl_outb(H8300_TIMER_COUNT_DATA,TCORA2);
+	ctrl_outb(0x00,_8TCSR2);
 	request_irq(40,timer_int,0,"timer",0);
-	outb(0x40|0x08|0x03,_8TCR2);
+	ctrl_outb(0x40|0x08|0x03,_8TCR2);
 }
 
 void platform_timer_eoi(void)

arch/h8300/platform/h8s/edosk2674/timer.c

@@ -29,13 +29,13 @@
 int __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
 {
 	unsigned char mstpcrl;
-	mstpcrl = inb(MSTPCRL);                  /* Enable timer */
+	mstpcrl = ctrl_inb(MSTPCRL);                  /* Enable timer */
 	mstpcrl &= ~0x01;
-	outb(mstpcrl,MSTPCRL);
-	outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
-	outb(0x00,_8TCSR1);
+	ctrl_outb(mstpcrl,MSTPCRL);
+	ctrl_outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+	ctrl_outb(0x00,_8TCSR1);
 	request_irq(76,timer_int,0,"timer",0);
-	outb(0x40|0x08|0x03,_8TCR1);
+	ctrl_outb(0x40|0x08|0x03,_8TCR1);
 	return 0;
 }
 

arch/h8300/platform/h8s/generic/timer.c

@@ -25,10 +25,10 @@
 
 int platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
 {
-	outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
-	outb(0x00,_8TCSR1);
+	ctrl_outb(H8300_TIMER_COUNT_DATA,_8TCORA1);
+	ctrl_outb(0x00,_8TCSR1);
 	request_irq(76,timer_int,0,"timer",0);
-	outb(0x40|0x08|0x03,_8TCR1);
+	ctrl_outb(0x40|0x08|0x03,_8TCR1);
 	return 0;
 }
 

include/asm-h8300/io.h

@@ -6,6 +6,15 @@
 #include <linux/config.h>
 #include <asm/virtconvert.h>
 
+#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
+#include <asm/regs306x.h>
+#elif defined(CONFIG_H8S2678)
+#include <asm/regs2678.h>
+#else
+#error UNKNOWN CPU TYPE
+#endif
+
+
 /*
  * These are for ISA/PCI shared memory _only_ and should never be used
  * on any other type of memory, including Zorro memory. They are meant to
@@ -30,6 +39,7 @@
  * 020325   Added some #define's for the COBRA5272 board
  *          (hede)
  */
+
 static inline unsigned short _swapw(volatile unsigned short v)
 {
     return ((v << 8) | (v >> 8));
@@ -41,20 +51,19 @@ static inline unsigned int _swapl(volatile unsigned long v)
 }
 
 #define readb(addr) \
-    ({ unsigned char __v = (*(volatile unsigned char *) (addr & 0x00ffffff)); __v; })
+    ({ unsigned char __v = (*(volatile unsigned char *) ((addr) & 0x00ffffff)); __v; })
 #define readw(addr) \
-    ({ unsigned short __v = (*(volatile unsigned short *) (addr & 0x00ffffff)); __v; })
+    ({ unsigned short __v = (*(volatile unsigned short *) ((addr) & 0x00ffffff)); __v; })
 #define readl(addr) \
-    ({ unsigned int __v = (*(volatile unsigned int *) (addr & 0x00ffffff)); __v; })
+    ({ unsigned int __v = (*(volatile unsigned int *) ((addr) & 0x00ffffff)); __v; })
 
+#define writeb(b,addr) (void)((*(volatile unsigned char *) ((addr) & 0x00ffffff)) = (b))
+#define writew(b,addr) (void)((*(volatile unsigned short *) ((addr) & 0x00ffffff)) = (b))
+#define writel(b,addr) (void)((*(volatile unsigned int *) ((addr) & 0x00ffffff)) = (b))
 #define readb_relaxed(addr) readb(addr)
 #define readw_relaxed(addr) readw(addr)
 #define readl_relaxed(addr) readl(addr)
 
-#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr & 0x00ffffff)) = (b))
-#define writew(b,addr) (void)((*(volatile unsigned short *) (addr & 0x00ffffff)) = (b))
-#define writel(b,addr) (void)((*(volatile unsigned int *) (addr & 0x00ffffff)) = (b))
-
 #define __raw_readb readb
 #define __raw_readw readw
 #define __raw_readl readl
@@ -62,12 +71,24 @@ static inline unsigned int _swapl(volatile unsigned long v)
 #define __raw_writew writew
 #define __raw_writel writel
 
+static inline int h8300_buswidth(unsigned int addr)
+{
+	return (*(volatile unsigned char *)ABWCR & (1 << (addr >> 21) & 7)) == 0;
+}
+
 static inline void io_outsb(unsigned int addr, void *buf, int len)
 {
-	volatile unsigned char *ap = (volatile unsigned char *) addr;
+	volatile unsigned char  *ap_b = (volatile unsigned char *) addr;
+	volatile unsigned short *ap_w = (volatile unsigned short *) addr;
 	unsigned char *bp = (unsigned char *) buf;
+
+	if(h8300_buswidth(addr) && (addr & 1)) {
 		while (len--)
-		*ap = *bp++;
+			*ap_w = *bp++;
+	} else {
+		while (len--)
+			*ap_b = *bp++;
+	}
 }
 
 static inline void io_outsw(unsigned int addr, void *buf, int len)
@@ -75,7 +96,7 @@ static inline void io_outsw(unsigned int addr, void *buf, int len)
 	volatile unsigned short *ap = (volatile unsigned short *) addr;
 	unsigned short *bp = (unsigned short *) buf;
 	while (len--)
-		*ap = _swapw(*bp++);
+		*ap = *bp++;
 }
 
 static inline void io_outsl(unsigned int addr, void *buf, int len)
@@ -83,13 +104,18 @@ static inline void io_outsl(unsigned int addr, void *buf, int len)
 	volatile unsigned int *ap = (volatile unsigned int *) addr;
 	unsigned int *bp = (unsigned int *) buf;
 	while (len--)
-		*ap = _swapl(*bp++);
+		*ap = *bp++;
 }
 
 static inline void io_insb(unsigned int addr, void *buf, int len)
 {
-	volatile unsigned char *ap = (volatile unsigned char *) addr;
+	volatile unsigned char  *ap;
 	unsigned char *bp = (unsigned char *) buf;
+
+	if(h8300_buswidth(addr))
+		ap = (volatile unsigned char *)(addr ^ 1);
+	else
+		ap = (volatile unsigned char *)addr;
 	while (len--)
 		*bp++ = *ap;
 }
@@ -99,7 +125,7 @@ static inline void io_insw(unsigned int addr, void *buf, int len)
 	volatile unsigned short *ap = (volatile unsigned short *) addr;
 	unsigned short *bp = (unsigned short *) buf;
 	while (len--)
-		*bp++ = _swapw(*ap);
+		*bp++ = *ap;
 }
 
 static inline void io_insl(unsigned int addr, void *buf, int len)
@@ -107,7 +133,7 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 	volatile unsigned int *ap = (volatile unsigned int *) addr;
 	unsigned int *bp = (unsigned int *) buf;
 	while (len--)
-		*bp++ = _swapl(*ap);
+		*bp++ = *ap;
 }
 
 /*
@@ -119,12 +145,12 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 #define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
 #define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))
 
-#define inb(addr)      readb(addr)
-#define inw(addr)    readw(addr)
-#define inl(addr)    readl(addr)
-#define outb(x,addr) ((void) writeb(x,addr))
-#define outw(x,addr) ((void) writew(x,addr))
-#define outl(x,addr) ((void) writel(x,addr))
+#define inb(addr)    ((h8300_buswidth(addr))?readb(addr ^ 1) & 0xff:readb(addr))
+#define inw(addr)    _swapw(readw(addr))
+#define inl(addr)    _swapl(readl(addr))
+#define outb(x,addr) ((void)((h8300_buswidth(addr) && (addr & 1))?writew(x,addr):writeb(x,addr)))
+#define outw(x,addr) ((void) writew(_swapw(x),addr))
+#define outl(x,addr) ((void) writel(_swapl(x),addr))
 
 #define inb_p(addr)    inb(addr)
 #define inw_p(addr)    inw(addr)
@@ -153,19 +179,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
 extern void __iounmap(void *addr, unsigned long size);
 
-extern inline void *ioremap(unsigned long physaddr, unsigned long size)
+static inline void *ioremap(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 }
-extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 }
-extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
 }
-extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
+static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
 {
 	return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
 }