Commit b98f1b9e authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: align GTT start to 4GB v2

For VCE to work properly the start of the GTT space must be aligned to a
4GB boundary.

v2: add comment why we do this
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3d647c8f
...@@ -622,7 +622,10 @@ void amdgpu_gart_location(struct amdgpu_device *adev, struct amdgpu_mc *mc) ...@@ -622,7 +622,10 @@ void amdgpu_gart_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
dev_warn(adev->dev, "limiting GTT\n"); dev_warn(adev->dev, "limiting GTT\n");
mc->gart_size = size_af; mc->gart_size = size_af;
} }
mc->gart_start = mc->vram_end + 1; /* VCE doesn't like it when BOs cross a 4GB segment, so align
* the GART base on a 4GB boundary as well.
*/
mc->gart_start = ALIGN(mc->vram_end + 1, 0x100000000ULL);
} }
mc->gart_end = mc->gart_start + mc->gart_size - 1; mc->gart_end = mc->gart_start + mc->gart_size - 1;
dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n", dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment