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Commit ba9fe460 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
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ARM: dts: imx: align SPI NOR node name with dtschema 

The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 3d397a12
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Showing with 34 additions and 34 deletions
arch/arm/boot/dts/imx28-evk.dts
View file @ ba9fe460
......@@ -129,7 +129,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf016b", "jedec,spi-nor";
......
arch/arm/boot/dts/imx28-m28evk.dts
View file @ ba9fe460
......@@ -33,7 +33,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p80", "jedec,spi-nor";
......
arch/arm/boot/dts/imx28-sps1.dts
View file @ ba9fe460
......@@ -51,7 +51,7 @@ ssp2: spi@80014000 {
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "everspin,mr25h256", "mr25h256";
......
arch/arm/boot/dts/imx6dl-rex-basic.dts
View file @ ba9fe460
......@@ -19,7 +19,7 @@ memory@10000000 {
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6q-ba16.dtsi
View file @ ba9fe460
......@@ -142,7 +142,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: n25q032@0 {
flash: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
......
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View file @ ba9fe460
......@@ -160,7 +160,7 @@ &ecspi5 {
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25";
spi-max-frequency = <10000000>;
size = <0x8000>;
......
arch/arm/boot/dts/imx6q-cm-fx6.dts
View file @ ba9fe460
......@@ -260,7 +260,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
m25p80@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View file @ ba9fe460
......@@ -102,7 +102,7 @@ &ecspi5 {
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "m25p80", "jedec,spi-nor";
spi-max-frequency = <40000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6q-dms-ba16.dts
View file @ ba9fe460
......@@ -47,7 +47,7 @@ &ecspi5 {
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
m25_eeprom: flash@0 {
compatible = "atmel,at25256B", "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;
......
arch/arm/boot/dts/imx6q-gw5400-a.dts
View file @ ba9fe460
......@@ -137,7 +137,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,w25q256", "jedec,spi-nor";
spi-max-frequency = <30000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6q-marsboard.dts
View file @ ba9fe460
......@@ -100,7 +100,7 @@ &ecspi1 {
cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
status = "okay";
m25p80@0 {
flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6q-rex-pro.dts
View file @ ba9fe460
......@@ -19,7 +19,7 @@ memory@10000000 {
};
&ecspi3 {
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf032b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
View file @ ba9fe460
......@@ -96,7 +96,7 @@ &ecspi4 {
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
View file @ ba9fe460
......@@ -131,7 +131,7 @@ &ecspi4 {
pinctrl-0 = <&pinctrl_ecspi4>;
status = "okay";
flash: m25p80@1 {
flash: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128a11", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
View file @ ba9fe460
......@@ -35,7 +35,7 @@ &ecspi3 {
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25vf040b", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
View file @ ba9fe460
......@@ -258,7 +258,7 @@ &ecspi4 {
status = "okay";
/* default boot source: workaround #1 for errata ERR006282 */
smarc_flash: spi-flash@0 {
smarc_flash: flash@0 {
compatible = "winbond,w25q16dw", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
......
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
View file @ ba9fe460
......@@ -179,7 +179,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
View file @ ba9fe460
......@@ -321,7 +321,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
View file @ ba9fe460
......@@ -252,7 +252,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
View file @ ba9fe460
......@@ -237,7 +237,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View file @ ba9fe460
......@@ -272,7 +272,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
status = "disabled"; /* pin conflict with WEIM NOR */
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
View file @ ba9fe460
......@@ -313,7 +313,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View file @ ba9fe460
......@@ -197,7 +197,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6sl-evk.dts
View file @ ba9fe460
......@@ -137,7 +137,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p32", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
View file @ ba9fe460
......@@ -107,7 +107,7 @@ &ecspi1 {
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: m25p80@0 {
flash: flash@0 {
compatible = "microchip,sst25vf016b";
spi-max-frequency = <20000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6sx-sdb-reva.dts
View file @ ba9fe460
......@@ -123,7 +123,7 @@ &qspi2 {
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: s25fl128s@0 {
flash0: flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
......@@ -133,7 +133,7 @@ flash0: s25fl128s@0 {
spi-tx-bus-width = <4>;
};
flash1: s25fl128s@2 {
flash1: flash@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <1>;
......
arch/arm/boot/dts/imx6sx-sdb.dts
View file @ ba9fe460
......@@ -108,7 +108,7 @@ &qspi2 {
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
......@@ -118,7 +118,7 @@ flash0: n25q256a@0 {
reg = <0>;
};
flash1: n25q256a@2 {
flash1: flash@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View file @ ba9fe460
......@@ -286,7 +286,7 @@ &qspi {
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash0: n25q256a@0 {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
......
arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi
View file @ ba9fe460
......@@ -19,7 +19,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
......
arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi
View file @ ba9fe460
......@@ -18,7 +18,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
......
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi
View file @ ba9fe460
......@@ -19,7 +19,7 @@ &ecspi2 {
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
......
arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi
View file @ ba9fe460
......@@ -18,7 +18,7 @@ memory@80000000 {
};
&qspi {
spi-flash@0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
......
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