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Commit bc2ad8ff authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-dt-for-v4.2' of... 

Merge tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Updates for v4.2" from Simon Horman:

* Enable DMA for HSUSB on r8a7790 and r8a7791 SoCs
* Configure the HOME key as wake-up source on kzm9g board
* Use generic names for device nodes on SH Mobile SoCs and boards
* Add "nor-jedec" compatible value to SH Mobile boards
* Add IRQC clock to r8a73a4, r8a779* SoCs
* Remove MSIOF address from r8a7790 and r8a7791 SoCs

* tag 'renesas-dt-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
  ARM: shmobile: r8a7791: Enable DMA for HSUSB
  ARM: shmobile: r8a7791: add USB-DMAC device nodes
  ARM: shmobile: r8a7790: Enable DMA for HSUSB
  ARM: shmobile: r8a7790: add USB-DMAC device nodes
  ARM: shmobile: kzm9g dts: Configure the HOME key as wake-up source
  ARM: shmobile: koelsch dts: Use generic names for device nodes
  ARM: shmobile: lager dts: Use generic names for device nodes
  ARM: shmobile: bockw dts: Use generic names for device nodes
  ARM: shmobile: koelsch dts: Add "nor-jedec" compatible value
  ARM: shmobile: bockw dts: Add "nor-jedec" compatible value
  ARM: shmobile: lager dts: Add "nor-jedec" compatible value
  ARM: shmobile: bockw-reference dts: Add "nor-jedec" compatible value
  ARM: shmobile: henninger dts: Add "nor-jedec" compatible value
  ARM: shmobile: armadillo800eva dts: Use generic names for device nodes
  ARM: shmobile: marzen dts: Use generic names for device nodes
  ARM: shmobile: kzm9d dts: Use generic names for device nodes
  ARM: shmobile: ape6evm dts: Use generic names for device nodes
  ARM: shmobile: sh73a0 dtsi: Use generic names for device nodes
  ARM: shmobile: r8a7791 dtsi: Use generic names for device nodes
  ARM: shmobile: r8a7790 dtsi: Use generic names for device nodes
  ...
parents 144ed970 7706993e
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Showing with 132 additions and 41 deletions
Documentation/devicetree/bindings/spi/sh-msiof.txt
View file @ bc2ad8ff
...@@ -60,7 +60,7 @@ Example: ...@@ -60,7 +60,7 @@ Example:
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791";
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>; dmas = <&dmac0 0x51>, <&dmac0 0x52>;
......
arch/arm/boot/dts/emev2-kzm9d.dts
View file @ bc2ad8ff
...@@ -81,7 +81,7 @@ reg_3p3v: regulator@1 { ...@@ -81,7 +81,7 @@ reg_3p3v: regulator@1 {
regulator-boot-on; regulator-boot-on;
}; };
lan9220@20000000 { ethernet@20000000 {
compatible = "smsc,lan9220", "smsc,lan9115"; compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x20000000 0x10000>; reg = <0x20000000 0x10000>;
phy-mode = "mii"; phy-mode = "mii";
...@@ -96,7 +96,7 @@ lan9220@20000000 { ...@@ -96,7 +96,7 @@ lan9220@20000000 {
}; };
&pfc { &pfc {
uart1_pins: uart@e1030000 { uart1_pins: serial@e1030000 {
renesas,groups = "uart1_ctrl", "uart1_data"; renesas,groups = "uart1_ctrl", "uart1_data";
renesas,function = "uart1"; renesas,function = "uart1";
}; };
......
arch/arm/boot/dts/r8a73a4-ape6evm.dts
View file @ bc2ad8ff
...@@ -147,7 +147,7 @@ voldown-key { ...@@ -147,7 +147,7 @@ voldown-key {
&i2c5 { &i2c5 {
status = "okay"; status = "okay";
vdd_dvfs: max8973@1b { vdd_dvfs: regulator@1b {
compatible = "maxim,max8973"; compatible = "maxim,max8973";
reg = <0x1b>; reg = <0x1b>;
......
arch/arm/boot/dts/r8a73a4.dtsi
View file @ bc2ad8ff
...@@ -163,6 +163,7 @@ irqc0: interrupt-controller@e61c0000 { ...@@ -163,6 +163,7 @@ irqc0: interrupt-controller@e61c0000 {
<0 29 IRQ_TYPE_LEVEL_HIGH>, <0 29 IRQ_TYPE_LEVEL_HIGH>,
<0 30 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>,
<0 31 IRQ_TYPE_LEVEL_HIGH>; <0 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A73A4_CLK_IRQC>;
power-domains = <&pd_c4>; power-domains = <&pd_c4>;
}; };
...@@ -197,6 +198,7 @@ irqc1: interrupt-controller@e61c0200 { ...@@ -197,6 +198,7 @@ irqc1: interrupt-controller@e61c0200 {
<0 55 IRQ_TYPE_LEVEL_HIGH>, <0 55 IRQ_TYPE_LEVEL_HIGH>,
<0 56 IRQ_TYPE_LEVEL_HIGH>, <0 56 IRQ_TYPE_LEVEL_HIGH>,
<0 57 IRQ_TYPE_LEVEL_HIGH>; <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A73A4_CLK_IRQC>;
power-domains = <&pd_c4>; power-domains = <&pd_c4>;
}; };
...@@ -724,15 +726,16 @@ R8A73A4_CLK_CMT1 ...@@ -724,15 +726,16 @@ R8A73A4_CLK_CMT1
mstp4_clks: mstp4_clks@e6150140 { mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_HP>, clocks = <&main_div2_clk>, <&main_div2_clk>,
<&cpg_clocks R8A73A4_CLK_HP>,
<&cpg_clocks R8A73A4_CLK_HP>; <&cpg_clocks R8A73A4_CLK_HP>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4 R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
R8A73A4_CLK_IIC3 R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
>; >;
clock-output-names = clock-output-names =
"iic5", "iic4", "iic3"; "irqc", "iic5", "iic4", "iic3";
}; };
mstp5_clks: mstp5_clks@e6150144 { mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
......
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
View file @ bc2ad8ff
...@@ -208,7 +208,7 @@ touchscreen@55 { ...@@ -208,7 +208,7 @@ touchscreen@55 {
gpios = <&pfc 166 GPIO_ACTIVE_LOW>; gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
}; };
wm8978: wm8978@1a { wm8978: codec@1a {
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
compatible = "wlf,wm8978"; compatible = "wlf,wm8978";
reg = <0x1a>; reg = <0x1a>;
......
arch/arm/boot/dts/r8a7740.dtsi
View file @ bc2ad8ff
...@@ -67,7 +67,7 @@ cmt1: timer@e6138000 { ...@@ -67,7 +67,7 @@ cmt1: timer@e6138000 {
}; };
/* irqpin0: IRQ0 - IRQ7 */ /* irqpin0: IRQ0 - IRQ7 */
irqpin0: irqpin@e6900000 { irqpin0: interrupt-controller@e6900000 {
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -89,7 +89,7 @@ irqpin0: irqpin@e6900000 { ...@@ -89,7 +89,7 @@ irqpin0: irqpin@e6900000 {
}; };
/* irqpin1: IRQ8 - IRQ15 */ /* irqpin1: IRQ8 - IRQ15 */
irqpin1: irqpin@e6900004 { irqpin1: interrupt-controller@e6900004 {
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -111,7 +111,7 @@ irqpin1: irqpin@e6900004 { ...@@ -111,7 +111,7 @@ irqpin1: irqpin@e6900004 {
}; };
/* irqpin2: IRQ16 - IRQ23 */ /* irqpin2: IRQ16 - IRQ23 */
irqpin2: irqpin@e6900008 { irqpin2: interrupt-controller@e6900008 {
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -133,7 +133,7 @@ irqpin2: irqpin@e6900008 { ...@@ -133,7 +133,7 @@ irqpin2: irqpin@e6900008 {
}; };
/* irqpin3: IRQ24 - IRQ31 */ /* irqpin3: IRQ24 - IRQ31 */
irqpin3: irqpin@e690000c { irqpin3: interrupt-controller@e690000c {
compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -275,7 +275,7 @@ scifa7: serial@e6cd0000 { ...@@ -275,7 +275,7 @@ scifa7: serial@e6cd0000 {
status = "disabled"; status = "disabled";
}; };
scifb8: serial@e6c30000 { scifb: serial@e6c30000 {
compatible = "renesas,scifb-r8a7740", "renesas,scifb"; compatible = "renesas,scifb-r8a7740", "renesas,scifb";
reg = <0xe6c30000 0x100>; reg = <0xe6c30000 0x100>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm/boot/dts/r8a7778-bockw-reference.dts
View file @ bc2ad8ff
...@@ -119,7 +119,7 @@ &hspi0 { ...@@ -119,7 +119,7 @@ &hspi0 {
flash: flash@0 { flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spansion,s25fl008k"; compatible = "spansion,s25fl008k", "nor-jedec";
reg = <0>; reg = <0>;
spi-max-frequency = <104000000>; spi-max-frequency = <104000000>;
m25p,fast-read; m25p,fast-read;
......
arch/arm/boot/dts/r8a7778-bockw.dts
View file @ bc2ad8ff
...@@ -85,7 +85,7 @@ &extal_clk { ...@@ -85,7 +85,7 @@ &extal_clk {
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
ak4643: sound-codec@12 { ak4643: codec@12 {
compatible = "asahi-kasei,ak4643"; compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
reg = <0x12>; reg = <0x12>;
...@@ -186,7 +186,7 @@ &hspi0 { ...@@ -186,7 +186,7 @@ &hspi0 {
flash: flash@0 { flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spansion,s25fl008k"; compatible = "spansion,s25fl008k", "nor-jedec";
reg = <0>; reg = <0>;
spi-max-frequency = <104000000>; spi-max-frequency = <104000000>;
m25p,fast-read; m25p,fast-read;
......
arch/arm/boot/dts/r8a7778.dtsi
View file @ bc2ad8ff
...@@ -68,7 +68,7 @@ gic: interrupt-controller@fe438000 { ...@@ -68,7 +68,7 @@ gic: interrupt-controller@fe438000 {
}; };
/* irqpin: IRQ0 - IRQ3 */ /* irqpin: IRQ0 - IRQ3 */
irqpin: irqpin@fe78001c { irqpin: interrupt-controller@fe78001c {
compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
......
arch/arm/boot/dts/r8a7779-marzen.dts
View file @ bc2ad8ff
...@@ -42,10 +42,10 @@ fixedregulator3v3: fixedregulator@0 { ...@@ -42,10 +42,10 @@ fixedregulator3v3: fixedregulator@0 {
regulator-always-on; regulator-always-on;
}; };
lan0@18000000 { ethernet@18000000 {
compatible = "smsc,lan9220", "smsc,lan9115"; compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18000000 0x100>; reg = <0x18000000 0x100>;
pinctrl-0 = <&lan0_pins>; pinctrl-0 = <&ethernet_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
phy-mode = "mii"; phy-mode = "mii";
...@@ -176,7 +176,7 @@ du1 { ...@@ -176,7 +176,7 @@ du1 {
}; };
}; };
lan0_pins: lan0 { ethernet_pins: ethernet {
intc { intc {
renesas,groups = "intc_irq1_b"; renesas,groups = "intc_irq1_b";
renesas,function = "intc"; renesas,function = "intc";
......
arch/arm/boot/dts/r8a7779.dtsi
View file @ bc2ad8ff
...@@ -148,7 +148,7 @@ gpio6: gpio@ffc46000 { ...@@ -148,7 +148,7 @@ gpio6: gpio@ffc46000 {
interrupt-controller; interrupt-controller;
}; };
irqpin0: irqpin@fe780010 { irqpin0: interrupt-controller@fe780010 {
compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
status = "disabled"; status = "disabled";
......
arch/arm/boot/dts/r8a7790-lager.dts
View file @ bc2ad8ff
...@@ -429,7 +429,7 @@ &qspi { ...@@ -429,7 +429,7 @@ &qspi {
flash: flash@0 { flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spansion,s25fl512s"; compatible = "spansion,s25fl512s", "nor-jedec";
reg = <0>; reg = <0>;
spi-max-frequency = <30000000>; spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>; spi-tx-bus-width = <4>;
...@@ -525,7 +525,7 @@ &iic2 { ...@@ -525,7 +525,7 @@ &iic2 {
clock-frequency = <100000>; clock-frequency = <100000>;
ak4643: sound-codec@12 { ak4643: codec@12 {
compatible = "asahi-kasei,ak4643"; compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
reg = <0x12>; reg = <0x12>;
......
arch/arm/boot/dts/r8a7790.dtsi
View file @ bc2ad8ff
...@@ -252,6 +252,7 @@ irqc0: interrupt-controller@e61c0000 { ...@@ -252,6 +252,7 @@ irqc0: interrupt-controller@e61c0000 {
<0 1 IRQ_TYPE_LEVEL_HIGH>, <0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>, <0 2 IRQ_TYPE_LEVEL_HIGH>,
<0 3 IRQ_TYPE_LEVEL_HIGH>; <0 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
}; };
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
...@@ -370,6 +371,28 @@ audma1: dma-controller@ec720000 { ...@@ -370,6 +371,28 @@ audma1: dma-controller@ec720000 {
dma-channels = <13>; dma-channels = <13>;
}; };
usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,usb-dmac";
reg = <0 0xe65a0000 0 0x100>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
0 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,usb-dmac";
reg = <0 0xe65b0000 0 0x100>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
0 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
#dma-cells = <1>;
dma-channels = <2>;
};
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -650,6 +673,9 @@ hsusb: usb@e6590000 { ...@@ -650,6 +673,9 @@ hsusb: usb@e6590000 {
renesas,buswait = <4>; renesas,buswait = <4>;
phys = <&usb0 1>; phys = <&usb0 1>;
phy-names = "usb"; phy-names = "usb";
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
status = "disabled"; status = "disabled";
}; };
...@@ -1158,6 +1184,14 @@ R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 ...@@ -1158,6 +1184,14 @@ R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
"iic0", "pciec", "iic1", "ssusb", "cmt1", "iic0", "pciec", "iic1", "ssusb", "cmt1",
"usbdmac0", "usbdmac1"; "usbdmac0", "usbdmac1";
}; };
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
clocks = <&cp_clk>;
#clock-cells = <1>;
clock-indices = <R8A7790_CLK_IRQC>;
clock-output-names = "irqc";
};
mstp5_clks: mstp5_clks@e6150144 { mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
...@@ -1273,7 +1307,7 @@ qspi: spi@e6b10000 { ...@@ -1273,7 +1307,7 @@ qspi: spi@e6b10000 {
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>; dmas = <&dmac0 0x51>, <&dmac0 0x52>;
...@@ -1285,7 +1319,7 @@ msiof0: spi@e6e20000 { ...@@ -1285,7 +1319,7 @@ msiof0: spi@e6e20000 {
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>; dmas = <&dmac0 0x55>, <&dmac0 0x56>;
...@@ -1297,7 +1331,7 @@ msiof1: spi@e6e10000 { ...@@ -1297,7 +1331,7 @@ msiof1: spi@e6e10000 {
msiof2: spi@e6e00000 { msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>; dmas = <&dmac0 0x41>, <&dmac0 0x42>;
...@@ -1309,7 +1343,7 @@ msiof2: spi@e6e00000 { ...@@ -1309,7 +1343,7 @@ msiof2: spi@e6e00000 {
msiof3: spi@e6c90000 { msiof3: spi@e6c90000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790";
reg = <0 0xe6c90000 0 0x0064>, <0 0xe7c90000 0 0x0064>; reg = <0 0xe6c90000 0 0x0064>;
interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
dmas = <&dmac0 0x45>, <&dmac0 0x46>; dmas = <&dmac0 0x45>, <&dmac0 0x46>;
...@@ -1442,7 +1476,7 @@ pciec: pcie@fe000000 { ...@@ -1442,7 +1476,7 @@ pciec: pcie@fe000000 {
status = "disabled"; status = "disabled";
}; };
rcar_sound: rcar_sound@ec500000 { rcar_sound: sound@ec500000 {
/* /*
* #sound-dai-cells is required * #sound-dai-cells is required
* *
......
arch/arm/boot/dts/r8a7791-henninger.dts
View file @ bc2ad8ff
...@@ -226,7 +226,7 @@ &qspi { ...@@ -226,7 +226,7 @@ &qspi {
flash@0 { flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spansion,s25fl512s"; compatible = "spansion,s25fl512s", "nor-jedec";
reg = <0>; reg = <0>;
spi-max-frequency = <30000000>; spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>; spi-tx-bus-width = <4>;
......
arch/arm/boot/dts/r8a7791-koelsch.dts
View file @ bc2ad8ff
...@@ -474,7 +474,7 @@ &qspi { ...@@ -474,7 +474,7 @@ &qspi {
flash: flash@0 { flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "spansion,s25fl512s"; compatible = "spansion,s25fl512s", "nor-jedec";
reg = <0>; reg = <0>;
spi-max-frequency = <30000000>; spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>; spi-tx-bus-width = <4>;
...@@ -522,7 +522,7 @@ &i2c2 { ...@@ -522,7 +522,7 @@ &i2c2 {
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
ak4643: sound-codec@12 { ak4643: codec@12 {
compatible = "asahi-kasei,ak4643"; compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
reg = <0x12>; reg = <0x12>;
......
arch/arm/boot/dts/r8a7791.dtsi
View file @ bc2ad8ff
...@@ -239,6 +239,7 @@ irqc0: interrupt-controller@e61c0000 { ...@@ -239,6 +239,7 @@ irqc0: interrupt-controller@e61c0000 {
<0 15 IRQ_TYPE_LEVEL_HIGH>, <0 15 IRQ_TYPE_LEVEL_HIGH>,
<0 16 IRQ_TYPE_LEVEL_HIGH>, <0 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>; <0 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
}; };
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
...@@ -357,6 +358,28 @@ audma1: dma-controller@ec720000 { ...@@ -357,6 +358,28 @@ audma1: dma-controller@ec720000 {
dma-channels = <13>; dma-channels = <13>;
}; };
usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,usb-dmac";
reg = <0 0xe65a0000 0 0x100>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH
0 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,usb-dmac";
reg = <0 0xe65b0000 0 0x100>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH
0 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>;
#dma-cells = <1>;
dma-channels = <2>;
};
/* The memory map in the User's Manual maps the cores to bus numbers */ /* The memory map in the User's Manual maps the cores to bus numbers */
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
...@@ -700,6 +723,9 @@ hsusb: usb@e6590000 { ...@@ -700,6 +723,9 @@ hsusb: usb@e6590000 {
renesas,buswait = <4>; renesas,buswait = <4>;
phys = <&usb0 1>; phys = <&usb0 1>;
phy-names = "usb"; phy-names = "usb";
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
status = "disabled"; status = "disabled";
}; };
...@@ -1160,6 +1186,14 @@ R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1 ...@@ -1160,6 +1186,14 @@ R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
"mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1", "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
"usbdmac0", "usbdmac1"; "usbdmac0", "usbdmac1";
}; };
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
clocks = <&cp_clk>;
#clock-cells = <1>;
clock-indices = <R8A7791_CLK_IRQC>;
clock-output-names = "irqc";
};
mstp5_clks: mstp5_clks@e6150144 { mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
...@@ -1288,7 +1322,7 @@ qspi: spi@e6b10000 { ...@@ -1288,7 +1322,7 @@ qspi: spi@e6b10000 {
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791";
reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>; dmas = <&dmac0 0x51>, <&dmac0 0x52>;
...@@ -1300,7 +1334,7 @@ msiof0: spi@e6e20000 { ...@@ -1300,7 +1334,7 @@ msiof0: spi@e6e20000 {
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791";
reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>; dmas = <&dmac0 0x55>, <&dmac0 0x56>;
...@@ -1312,7 +1346,7 @@ msiof1: spi@e6e10000 { ...@@ -1312,7 +1346,7 @@ msiof1: spi@e6e10000 {
msiof2: spi@e6e00000 { msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791";
reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>; dmas = <&dmac0 0x41>, <&dmac0 0x42>;
...@@ -1485,7 +1519,7 @@ ipmmu_gp: mmu@e62a0000 { ...@@ -1485,7 +1519,7 @@ ipmmu_gp: mmu@e62a0000 {
status = "disabled"; status = "disabled";
}; };
rcar_sound: rcar_sound@ec500000 { rcar_sound: sound@ec500000 {
/* /*
* #sound-dai-cells is required * #sound-dai-cells is required
* *
......
arch/arm/boot/dts/r8a7794.dtsi
View file @ bc2ad8ff
...@@ -105,6 +105,7 @@ irqc0: interrupt-controller@e61c0000 { ...@@ -105,6 +105,7 @@ irqc0: interrupt-controller@e61c0000 {
<0 15 IRQ_TYPE_LEVEL_HIGH>, <0 15 IRQ_TYPE_LEVEL_HIGH>,
<0 16 IRQ_TYPE_LEVEL_HIGH>, <0 16 IRQ_TYPE_LEVEL_HIGH>,
<0 17 IRQ_TYPE_LEVEL_HIGH>; <0 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R8A7794_CLK_IRQC>;
}; };
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
...@@ -625,6 +626,14 @@ R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 ...@@ -625,6 +626,14 @@ R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
"sdhi2", "sdhi1", "sdhi0", "sdhi2", "sdhi1", "sdhi0",
"mmcif0", "cmt1", "usbdmac0", "usbdmac1"; "mmcif0", "cmt1", "usbdmac0", "usbdmac1";
}; };
mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
clocks = <&cp_clk>;
#clock-cells = <1>;
clock-indices = <R8A7794_CLK_IRQC>;
clock-output-names = "irqc";
};
mstp7_clks: mstp7_clks@e615014c { mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
......
arch/arm/boot/dts/sh73a0-kzm9g.dts
View file @ bc2ad8ff
...@@ -147,6 +147,7 @@ home-key { ...@@ -147,6 +147,7 @@ home-key {
gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>; gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOME>; linux,code = <KEY_HOME>;
label = "SW1"; label = "SW1";
gpio-key,wakeup;
}; };
}; };
......
arch/arm/boot/dts/sh73a0.dtsi
View file @ bc2ad8ff
...@@ -90,7 +90,7 @@ cmt1: timer@e6138000 { ...@@ -90,7 +90,7 @@ cmt1: timer@e6138000 {
status = "disabled"; status = "disabled";
}; };
irqpin0: irqpin@e6900000 { irqpin0: interrupt-controller@e6900000 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -112,7 +112,7 @@ irqpin0: irqpin@e6900000 { ...@@ -112,7 +112,7 @@ irqpin0: irqpin@e6900000 {
control-parent; control-parent;
}; };
irqpin1: irqpin@e6900004 { irqpin1: interrupt-controller@e6900004 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -134,7 +134,7 @@ irqpin1: irqpin@e6900004 { ...@@ -134,7 +134,7 @@ irqpin1: irqpin@e6900004 {
control-parent; control-parent;
}; };
irqpin2: irqpin@e6900008 { irqpin2: interrupt-controller@e6900008 {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -156,7 +156,7 @@ irqpin2: irqpin@e6900008 { ...@@ -156,7 +156,7 @@ irqpin2: irqpin@e6900008 {
control-parent; control-parent;
}; };
irqpin3: irqpin@e690000c { irqpin3: interrupt-controller@e690000c {
compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin"; compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -376,7 +376,7 @@ scifa7: serial@e6cd0000 { ...@@ -376,7 +376,7 @@ scifa7: serial@e6cd0000 {
status = "disabled"; status = "disabled";
}; };
scifb8: serial@e6c30000 { scifb: serial@e6c30000 {
compatible = "renesas,scifb-sh73a0", "renesas,scifb"; compatible = "renesas,scifb-sh73a0", "renesas,scifb";
reg = <0xe6c30000 0x100>; reg = <0xe6c30000 0x100>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
......
include/dt-bindings/clock/r8a73a4-clock.h
View file @ bc2ad8ff
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#define R8A73A4_CLK_IIC3 11 #define R8A73A4_CLK_IIC3 11
#define R8A73A4_CLK_IIC4 10 #define R8A73A4_CLK_IIC4 10
#define R8A73A4_CLK_IIC5 9 #define R8A73A4_CLK_IIC5 9
#define R8A73A4_CLK_IRQC 7
/* MSTP5 */ /* MSTP5 */
#define R8A73A4_CLK_THERMAL 22 #define R8A73A4_CLK_THERMAL 22
......
include/dt-bindings/clock/r8a7790-clock.h
View file @ bc2ad8ff
...@@ -79,6 +79,9 @@ ...@@ -79,6 +79,9 @@
#define R8A7790_CLK_USBDMAC0 30 #define R8A7790_CLK_USBDMAC0 30
#define R8A7790_CLK_USBDMAC1 31 #define R8A7790_CLK_USBDMAC1 31
/* MSTP4 */
#define R8A7790_CLK_IRQC 7
/* MSTP5 */ /* MSTP5 */
#define R8A7790_CLK_AUDIO_DMAC1 1 #define R8A7790_CLK_AUDIO_DMAC1 1
#define R8A7790_CLK_AUDIO_DMAC0 2 #define R8A7790_CLK_AUDIO_DMAC0 2
......
include/dt-bindings/clock/r8a7791-clock.h
View file @ bc2ad8ff
...@@ -70,6 +70,9 @@ ...@@ -70,6 +70,9 @@
#define R8A7791_CLK_USBDMAC0 30 #define R8A7791_CLK_USBDMAC0 30
#define R8A7791_CLK_USBDMAC1 31 #define R8A7791_CLK_USBDMAC1 31
/* MSTP4 */
#define R8A7791_CLK_IRQC 7
/* MSTP5 */ /* MSTP5 */
#define R8A7791_CLK_AUDIO_DMAC1 1 #define R8A7791_CLK_AUDIO_DMAC1 1
#define R8A7791_CLK_AUDIO_DMAC0 2 #define R8A7791_CLK_AUDIO_DMAC0 2
......
include/dt-bindings/clock/r8a7794-clock.h
View file @ bc2ad8ff
...@@ -60,6 +60,9 @@ ...@@ -60,6 +60,9 @@
#define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC0 30
#define R8A7794_CLK_USBDMAC1 31 #define R8A7794_CLK_USBDMAC1 31
/* MSTP4 */
#define R8A7794_CLK_IRQC 7
/* MSTP5 */ /* MSTP5 */
#define R8A7794_CLK_THERMAL 22 #define R8A7794_CLK_THERMAL 22
#define R8A7794_CLK_PWM 23 #define R8A7794_CLK_PWM 23
......
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