Commit c05ee88f authored by Rob Herring's avatar Rob Herring Committed by Olof Johansson

ARM: highbank: fix typos with hignbank in power request functions

s/hignbank/highbank/
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 3943deed
...@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = { ...@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
static void highbank_power_off(void) static void highbank_power_off(void)
{ {
hignbank_set_pwr_shutdown(); highbank_set_pwr_shutdown();
while (1) while (1)
cpu_do_idle(); cpu_do_idle();
......
...@@ -32,7 +32,7 @@ static int highbank_suspend_finish(unsigned long val) ...@@ -32,7 +32,7 @@ static int highbank_suspend_finish(unsigned long val)
static int highbank_pm_enter(suspend_state_t state) static int highbank_pm_enter(suspend_state_t state)
{ {
hignbank_set_pwr_suspend(); highbank_set_pwr_suspend();
highbank_set_cpu_jump(0, cpu_resume); highbank_set_cpu_jump(0, cpu_resume);
cpu_suspend(0, highbank_suspend_finish); cpu_suspend(0, highbank_suspend_finish);
......
...@@ -44,25 +44,25 @@ static inline void highbank_set_core_pwr(void) ...@@ -44,25 +44,25 @@ static inline void highbank_set_core_pwr(void)
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
} }
static inline void hignbank_set_pwr_suspend(void) static inline void highbank_set_pwr_suspend(void)
{ {
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr(); highbank_set_core_pwr();
} }
static inline void hignbank_set_pwr_shutdown(void) static inline void highbank_set_pwr_shutdown(void)
{ {
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr(); highbank_set_core_pwr();
} }
static inline void hignbank_set_pwr_soft_reset(void) static inline void highbank_set_pwr_soft_reset(void)
{ {
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr(); highbank_set_core_pwr();
} }
static inline void hignbank_set_pwr_hard_reset(void) static inline void highbank_set_pwr_hard_reset(void)
{ {
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr(); highbank_set_core_pwr();
......
...@@ -22,9 +22,9 @@ ...@@ -22,9 +22,9 @@
void highbank_restart(char mode, const char *cmd) void highbank_restart(char mode, const char *cmd)
{ {
if (mode == 'h') if (mode == 'h')
hignbank_set_pwr_hard_reset(); highbank_set_pwr_hard_reset();
else else
hignbank_set_pwr_soft_reset(); highbank_set_pwr_soft_reset();
while (1) while (1)
cpu_do_idle(); cpu_do_idle();
......
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