Commit c1263c75 authored by Vijendar Mukunda's avatar Vijendar Mukunda Committed by Mark Brown

soundwire: amd: refactor register mask structure

Register mask array structure is no longer needed as except interrupt
control masks, rest of the register masks are not used in code.
Use array for interrupt masks instead of structure.
Signed-off-by: default avatarVijendar Mukunda <Vijendar.Mukunda@amd.com>
Acked-by: default avatarVinod Koul <vkoul@kernel.org>
Link: https://msgid.link/r/20240129055147.1493853-7-Vijendar.Mukunda@amd.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent cf0ddbc2
...@@ -86,12 +86,11 @@ static int amd_disable_sdw_manager(struct amd_sdw_manager *amd_manager) ...@@ -86,12 +86,11 @@ static int amd_disable_sdw_manager(struct amd_sdw_manager *amd_manager)
static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager) static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
{ {
struct sdw_manager_reg_mask *reg_mask = amd_manager->reg_mask;
u32 val; u32 val;
mutex_lock(amd_manager->acp_sdw_lock); mutex_lock(amd_manager->acp_sdw_lock);
val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
val |= reg_mask->acp_sdw_intr_mask; val |= sdw_manager_reg_mask_array[amd_manager->instance];
writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
mutex_unlock(amd_manager->acp_sdw_lock); mutex_unlock(amd_manager->acp_sdw_lock);
...@@ -104,12 +103,11 @@ static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager) ...@@ -104,12 +103,11 @@ static void amd_enable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
static void amd_disable_sdw_interrupts(struct amd_sdw_manager *amd_manager) static void amd_disable_sdw_interrupts(struct amd_sdw_manager *amd_manager)
{ {
struct sdw_manager_reg_mask *reg_mask = amd_manager->reg_mask;
u32 val; u32 val;
mutex_lock(amd_manager->acp_sdw_lock); mutex_lock(amd_manager->acp_sdw_lock);
val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); val = readl(amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
val &= ~reg_mask->acp_sdw_intr_mask; val &= ~sdw_manager_reg_mask_array[amd_manager->instance];
writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance)); writel(val, amd_manager->acp_mmio + ACP_EXTERNAL_INTR_CNTL(amd_manager->instance));
mutex_unlock(amd_manager->acp_sdw_lock); mutex_unlock(amd_manager->acp_sdw_lock);
...@@ -930,7 +928,6 @@ static int amd_sdw_manager_probe(struct platform_device *pdev) ...@@ -930,7 +928,6 @@ static int amd_sdw_manager_probe(struct platform_device *pdev)
return -EINVAL; return -EINVAL;
} }
amd_manager->reg_mask = &sdw_manager_reg_mask_array[amd_manager->instance];
params = &amd_manager->bus.params; params = &amd_manager->bus.params;
params->col = AMD_SDW_DEFAULT_COLUMNS; params->col = AMD_SDW_DEFAULT_COLUMNS;
......
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/* /*
* Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. * Copyright (C) 2023-24 Advanced Micro Devices, Inc. All rights reserved.
*/ */
#ifndef __AMD_MANAGER_H #ifndef __AMD_MANAGER_H
...@@ -243,16 +243,8 @@ static struct sdw_manager_dp_reg sdw1_manager_dp_reg[AMD_SDW1_MAX_DAI] = { ...@@ -243,16 +243,8 @@ static struct sdw_manager_dp_reg sdw1_manager_dp_reg[AMD_SDW1_MAX_DAI] = {
ACP_SW_AUDIO1_RX_OFFSET, ACP_SW_AUDIO1_RX_CHANNEL_ENABLE_DP0} ACP_SW_AUDIO1_RX_OFFSET, ACP_SW_AUDIO1_RX_CHANNEL_ENABLE_DP0}
}; };
static struct sdw_manager_reg_mask sdw_manager_reg_mask_array[2] = { static u32 sdw_manager_reg_mask_array[AMD_SDW_MAX_MANAGER_COUNT] = {
{ AMD_SDW0_EXT_INTR_MASK,
AMD_SDW0_PAD_KEEPER_EN_MASK,
AMD_SDW0_PAD_PULLDOWN_CTRL_ENABLE_MASK,
AMD_SDW0_EXT_INTR_MASK
},
{
AMD_SDW1_PAD_KEEPER_EN_MASK,
AMD_SDW1_PAD_PULLDOWN_CTRL_ENABLE_MASK,
AMD_SDW1_EXT_INTR_MASK AMD_SDW1_EXT_INTR_MASK
}
}; };
#endif #endif
...@@ -34,12 +34,6 @@ struct acp_sdw_pdata { ...@@ -34,12 +34,6 @@ struct acp_sdw_pdata {
struct mutex *acp_sdw_lock; struct mutex *acp_sdw_lock;
}; };
struct sdw_manager_reg_mask {
u32 sw_pad_enable_mask;
u32 sw_pad_pulldown_mask;
u32 acp_sdw_intr_mask;
};
/** /**
* struct sdw_amd_dai_runtime: AMD sdw dai runtime data * struct sdw_amd_dai_runtime: AMD sdw dai runtime data
* *
...@@ -61,7 +55,6 @@ struct sdw_amd_dai_runtime { ...@@ -61,7 +55,6 @@ struct sdw_amd_dai_runtime {
* @dev: linux device * @dev: linux device
* @mmio: SoundWire registers mmio base * @mmio: SoundWire registers mmio base
* @acp_mmio: acp registers mmio base * @acp_mmio: acp registers mmio base
* @reg_mask: register mask structure per manager instance
* @amd_sdw_irq_thread: SoundWire manager irq workqueue * @amd_sdw_irq_thread: SoundWire manager irq workqueue
* @amd_sdw_work: peripheral status work queue * @amd_sdw_work: peripheral status work queue
* @acp_sdw_lock: mutex to protect acp share register access * @acp_sdw_lock: mutex to protect acp share register access
...@@ -84,7 +77,6 @@ struct amd_sdw_manager { ...@@ -84,7 +77,6 @@ struct amd_sdw_manager {
void __iomem *mmio; void __iomem *mmio;
void __iomem *acp_mmio; void __iomem *acp_mmio;
struct sdw_manager_reg_mask *reg_mask;
struct work_struct amd_sdw_irq_thread; struct work_struct amd_sdw_irq_thread;
struct work_struct amd_sdw_work; struct work_struct amd_sdw_work;
/* mutex to protect acp common register access */ /* mutex to protect acp common register access */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment