Commit c3460fd3 authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman

staging: gma500: begin tidying up the power management

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a3461ee1
......@@ -174,8 +174,7 @@ static void mrst_crtc_dpms(struct drm_crtc *crtc, int mode)
PSB_DEBUG_ENTRY("mode = %d, pipe = %d\n", mode, pipe);
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return;
/* XXX: When our outputs are all unaware of DPMS modes other than off
......@@ -270,7 +269,7 @@ static void mrst_crtc_dpms(struct drm_crtc *crtc, int mode)
REG_WRITE(0x70400, REG_READ(0x70400) | 0x4000);
/* Must write Bit 14 of the Chicken Bit Register */
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
/**
......@@ -323,8 +322,7 @@ static int mrst_crtc_mode_set(struct drm_crtc *crtc,
PSB_DEBUG_ENTRY("pipe = 0x%x\n", pipe);
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return 0;
memcpy(&psb_intel_crtc->saved_mode,
......@@ -514,7 +512,7 @@ static int mrst_crtc_mode_set(struct drm_crtc *crtc,
psb_intel_wait_for_vblank(dev);
mrst_crtc_mode_set_exit:
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
return 0;
}
......@@ -551,8 +549,7 @@ int mrst_pipe_set_base(struct drm_crtc *crtc,
return 0;
}
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return 0;
Start = mode_dev->bo_offset(dev, psbfb);
......@@ -596,7 +593,7 @@ int mrst_pipe_set_base(struct drm_crtc *crtc,
}
pipe_set_base_exit:
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
return ret;
}
......
......@@ -48,8 +48,7 @@ static void mrst_lvds_set_power(struct drm_device *dev,
DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private;
PSB_DEBUG_ENTRY("\n");
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return;
if (on) {
......@@ -69,7 +68,7 @@ static void mrst_lvds_set_power(struct drm_device *dev,
pm_request_idle(&dev->pdev->dev);
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
static void mrst_lvds_dpms(struct drm_encoder *encoder, int mode)
......@@ -99,8 +98,7 @@ static void mrst_lvds_mode_set(struct drm_encoder *encoder,
PSB_DEBUG_ENTRY("\n");
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return;
/*
......@@ -144,7 +142,7 @@ static void mrst_lvds_mode_set(struct drm_encoder *encoder,
} else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
......
......@@ -81,7 +81,7 @@ int mrst_set_brightness(struct backlight_device *bd)
if (level < 1)
level = 1;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, 0)) {
/* Calculate and set the brightness value */
max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16;
blc_pwm_ctl = level * max_pwm_blc / 100;
......@@ -103,7 +103,7 @@ int mrst_set_brightness(struct backlight_device *bd)
/* force PWM bit on */
REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2)));
REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
psb_brightness = level;
return 0;
......@@ -161,8 +161,7 @@ static int device_backlight_init(struct drm_device *dev)
value /= bl_max_freq;
value /= blc_pwm_precision_factor;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
if (IS_MRST(dev)) {
if (value > (unsigned long long)MRST_BLC_MAX_PWM_REG_FREQ)
return 2;
......@@ -182,7 +181,7 @@ static int device_backlight_init(struct drm_device *dev)
(value));
}
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
return 0;
}
......
......@@ -558,7 +558,7 @@ static int psb_driver_unload(struct drm_device *dev)
psb_intel_destroy_bios(dev);
}
ospm_power_uninit();
gma_power_uninit(dev);
return 0;
}
......@@ -612,7 +612,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
}
/* Init OSPM support */
ospm_power_init(dev);
gma_power_init(dev);
ret = -ENOMEM;
......@@ -837,13 +837,12 @@ static int psb_dpst_ioctl(struct drm_device *dev, void *data,
uint32_t y;
uint32_t reg;
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON))
if (!gma_power_begin(dev, 0))
return 0;
reg = PSB_RVDC32(PIPEASRC);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
/* horizontal is the left 16 bits */
x = reg >> 16;
......@@ -920,11 +919,10 @@ static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
drm_fb = obj_to_fb(obj);
psb_fb = to_psb_fb(drm_fb);
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, 0)) {
REG_WRITE(DSPASURF, psb_fb->offset);
REG_READ(DSPASURF);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
dev_priv->saveDSPASURF = psb_fb->offset;
}
......@@ -1010,11 +1008,10 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
{
struct drm_psb_private *dev_priv = psb_priv(dev);
struct drm_psb_register_rw_arg *arg = data;
UHBUsage usage =
arg->b_force_hw_on ? OSPM_UHB_FORCE_POWER_ON : OSPM_UHB_ONLY_IF_ON;
bool usage = arg->b_force_hw_on ? true : false;
if (arg->display_write_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
PSB_WVDC32(arg->display.pfit_controls,
PFIT_CONTROL);
......@@ -1039,7 +1036,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
if (arg->display_write_mask & REGRWBITS_VTOTAL_B)
PSB_WVDC32(arg->display.vtotal_b,
VTOTAL_B);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
dev_priv->savePFIT_CONTROL =
......@@ -1064,7 +1061,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
}
if (arg->display_read_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
if (arg->display_read_mask &
REGRWBITS_PFIT_CONTROLS)
arg->display.pfit_controls =
......@@ -1085,7 +1082,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
arg->display.vtotal_a = PSB_RVDC32(VTOTAL_A);
if (arg->display_read_mask & REGRWBITS_VTOTAL_B)
arg->display.vtotal_b = PSB_RVDC32(VTOTAL_B);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
if (arg->display_read_mask &
REGRWBITS_PFIT_CONTROLS)
......@@ -1111,7 +1108,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
}
if (arg->overlay_write_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
PSB_WVDC32(arg->overlay.OGAMC5, OV_OGAMC5);
PSB_WVDC32(arg->overlay.OGAMC4, OV_OGAMC4);
......@@ -1162,7 +1159,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
}
}
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
dev_priv->saveOV_OGAMC5 = arg->overlay.OGAMC5;
......@@ -1188,7 +1185,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
}
if (arg->overlay_read_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
arg->overlay.OGAMC5 = PSB_RVDC32(OV_OGAMC5);
arg->overlay.OGAMC4 = PSB_RVDC32(OV_OGAMC4);
......@@ -1209,7 +1206,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
arg->overlay.OVADD = PSB_RVDC32(OV_OVADD);
if (arg->overlay_read_mask & OVC_REGRWBITS_OVADD)
arg->overlay.OVADD = PSB_RVDC32(OVC_OVADD);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
arg->overlay.OGAMC5 = dev_priv->saveOV_OGAMC5;
......@@ -1235,7 +1232,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
}
if (arg->sprite_enable_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
PSB_WVDC32(0x1F3E, DSPARB);
PSB_WVDC32(arg->sprite.dspa_control
| PSB_RVDC32(DSPACNTR), DSPACNTR);
......@@ -1250,22 +1247,22 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
PSB_WVDC32(arg->sprite.dspc_size, DSPCSIZE);
PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
PSB_RVDC32(DSPCSURF);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
}
if (arg->sprite_disable_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
PSB_WVDC32(0x3F3E, DSPARB);
PSB_WVDC32(0x0, DSPCCNTR);
PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
PSB_RVDC32(DSPCSURF);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
}
if (arg->subpicture_enable_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
uint32_t temp;
if (arg->subpicture_enable_mask & REGRWBITS_DSPACNTR) {
temp = PSB_RVDC32(DSPACNTR);
......@@ -1309,12 +1306,12 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
PSB_WVDC32(temp, DSPCSURF);
PSB_RVDC32(DSPCSURF);
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
}
if (arg->subpicture_disable_mask != 0) {
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, usage)) {
if (gma_power_begin(dev, usage)) {
uint32_t temp;
if (arg->subpicture_disable_mask & REGRWBITS_DSPACNTR) {
temp = PSB_RVDC32(DSPACNTR);
......@@ -1355,7 +1352,7 @@ static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
PSB_WVDC32(temp, DSPCSURF);
PSB_RVDC32(DSPCSURF);
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
}
......@@ -1513,8 +1510,8 @@ static struct drm_driver driver = {
static struct pci_driver psb_pci_driver = {
.name = DRIVER_NAME,
.id_table = pciidlist,
.resume = ospm_power_resume,
.suspend = ospm_power_suspend,
.resume = gma_power_resume,
.suspend = gma_power_suspend,
.probe = psb_probe,
.remove = psb_remove,
#ifdef CONFIG_PM
......
......@@ -246,7 +246,6 @@ struct drm_psb_private {
uint8_t *vdc_reg;
uint32_t gatt_free_offset;
/*
*Fencing / irq.
*/
......@@ -256,6 +255,14 @@ struct drm_psb_private {
spinlock_t irqmask_lock;
/*
* Power
*/
bool suspended;
bool display_power;
int display_count;
/*
*Modesetting
*/
......@@ -527,8 +534,6 @@ extern int psb_irq_disable_dpst(struct drm_device *dev);
extern void psb_irq_preinstall(struct drm_device *dev);
extern int psb_irq_postinstall(struct drm_device *dev);
extern void psb_irq_uninstall(struct drm_device *dev);
extern void psb_irq_preinstall_islands(struct drm_device *dev, int hw_islands);
extern int psb_irq_postinstall_islands(struct drm_device *dev, int hw_islands);
extern void psb_irq_turn_on_dpst(struct drm_device *dev);
extern void psb_irq_turn_off_dpst(struct drm_device *dev);
......
......@@ -359,8 +359,7 @@ int psb_intel_pipe_set_base(struct drm_crtc *crtc,
return 0;
}
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return 0;
Start = mode_dev->bo_offset(dev, psbfb);
......@@ -405,7 +404,7 @@ int psb_intel_pipe_set_base(struct drm_crtc *crtc,
psb_intel_pipe_set_base_exit:
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
return ret;
}
......@@ -816,8 +815,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc)
return;
}
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
for (i = 0; i < 256; i++) {
REG_WRITE(palreg + 4 * i,
((psb_intel_crtc->lut_r[i] +
......@@ -827,7 +825,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc)
(psb_intel_crtc->lut_b[i] +
psb_intel_crtc->lut_adj[i]));
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
for (i = 0; i < 256; i++) {
dev_priv->save_palette_a[i] =
......@@ -1046,11 +1044,10 @@ static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,
temp = 0;
temp |= CURSOR_MODE_DISABLE;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
REG_WRITE(control, temp);
REG_WRITE(base, 0);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
/* unpin the old bo */
......@@ -1104,11 +1101,10 @@ static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,
temp |= (pipe << 28);
temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
REG_WRITE(control, temp);
REG_WRITE(base, addr);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
/* unpin the old bo */
......@@ -1143,11 +1139,10 @@ static int psb_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
adder = psb_intel_crtc->cursor_addr;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, adder);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
return 0;
}
......@@ -1197,15 +1192,14 @@ static int psb_intel_crtc_clock_get(struct drm_device *dev,
bool is_lvds;
struct drm_psb_private *dev_priv = dev->dev_private;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
dpll = REG_READ((pipe == 0) ? DPLL_A : DPLL_B);
if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
fp = REG_READ((pipe == 0) ? FPA0 : FPB0);
else
fp = REG_READ((pipe == 0) ? FPA1 : FPB1);
is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
dpll = (pipe == 0) ?
dev_priv->saveDPLL_A : dev_priv->saveDPLL_B;
......@@ -1277,13 +1271,12 @@ struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
int vsync;
struct drm_psb_private *dev_priv = dev->dev_private;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
htot = REG_READ((pipe == 0) ? HTOTAL_A : HTOTAL_B);
hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B);
vtot = REG_READ((pipe == 0) ? VTOTAL_A : VTOTAL_B);
vsync = REG_READ((pipe == 0) ? VSYNC_A : VSYNC_B);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
htot = (pipe == 0) ?
dev_priv->saveHTOTAL_A : dev_priv->saveHTOTAL_B;
......
......@@ -83,13 +83,12 @@ static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
struct drm_psb_private *dev_priv = dev->dev_private;
u32 retVal;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
retVal = ((REG_READ(BLC_PWM_CTL) &
BACKLIGHT_MODULATION_FREQ_MASK) >>
BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else
retVal = ((dev_priv->saveBLC_PWM_CTL &
BACKLIGHT_MODULATION_FREQ_MASK) >>
......@@ -200,14 +199,13 @@ static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
struct drm_psb_private *dev_priv = dev->dev_private;
u32 blc_pwm_ctl;
if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_ONLY_IF_ON)) {
if (gma_power_begin(dev, false)) {
blc_pwm_ctl =
REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
REG_WRITE(BLC_PWM_CTL,
(blc_pwm_ctl |
(level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
} else {
blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL &
~BACKLIGHT_DUTY_CYCLE_MASK;
......@@ -224,8 +222,7 @@ static void psb_intel_lvds_set_power(struct drm_device *dev,
{
u32 pp_status;
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return;
if (on) {
......@@ -248,7 +245,7 @@ static void psb_intel_lvds_set_power(struct drm_device *dev,
} while (pp_status & PP_ON);
}
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
......@@ -457,8 +454,7 @@ void psb_intel_lvds_prepare(struct drm_encoder *encoder)
PSB_DEBUG_ENTRY("\n");
if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
OSPM_UHB_FORCE_POWER_ON))
if (!gma_power_begin(dev, true))
return;
mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
......@@ -467,7 +463,7 @@ void psb_intel_lvds_prepare(struct drm_encoder *encoder)
psb_intel_lvds_set_power(dev, output, false);
ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
gma_power_end(dev);
}
void psb_intel_lvds_commit(struct drm_encoder *encoder)
......
This diff is collapsed.
This diff is collapsed.
......@@ -24,7 +24,8 @@
* Authors:
* Benjamin Defnet <benjamin.r.defnet@intel.com>
* Rajesh Poornachandran <rajesh.poornachandran@intel.com>
*
* Massively reworked
* Alan Cox <alan@linux.intel.com>
*/
#ifndef _PSB_POWERMGMT_H_
#define _PSB_POWERMGMT_H_
......@@ -32,65 +33,35 @@
#include <linux/pci.h>
#include <drm/drmP.h>
#define OSPM_GRAPHICS_ISLAND 0x1
#define OSPM_VIDEO_ENC_ISLAND 0x2
#define OSPM_VIDEO_DEC_ISLAND 0x4
#define OSPM_DISPLAY_ISLAND 0x8
#define OSPM_GL3_CACHE_ISLAND 0x10
#define OSPM_ALL_ISLANDS 0x1f
/* IPC message and command defines used to enable/disable mipi panel voltages */
#define IPC_MSG_PANEL_ON_OFF 0xE9
#define IPC_CMD_PANEL_ON 1
#define IPC_CMD_PANEL_OFF 0
typedef enum _UHBUsage
{
OSPM_UHB_ONLY_IF_ON = 0,
OSPM_UHB_FORCE_POWER_ON,
} UHBUsage;
/* Use these functions to power down video HW for D0i3 purpose */
void ospm_power_init(struct drm_device *dev);
void ospm_power_uninit(void);
void gma_power_init(struct drm_device *dev);
void gma_power_uninit(struct drm_device *dev);
/*
* OSPM will call these functions
* The kernel bus power management will call these functions
*/
int ospm_power_suspend(struct pci_dev *pdev, pm_message_t state);
int ospm_power_resume(struct pci_dev *pdev);
int gma_power_suspend(struct pci_dev *pdev, pm_message_t state);
int gma_power_resume(struct pci_dev *pdev);
/*
* These are the functions the driver should use to wrap all hw access
* (i.e. register reads and writes)
*/
bool ospm_power_using_hw_begin(int hw_island, UHBUsage usage);
void ospm_power_using_hw_end(int hw_island);
bool gma_power_begin(struct drm_device *dev, bool force);
void gma_power_end(struct drm_device *dev);
/*
* Use this function to do an instantaneous check for if the hw is on.
* Only use this in cases where you know the g_state_change_mutex
* is already held such as in irq install/uninstall and you need to
* prevent a deadlock situation. Otherwise use ospm_power_using_hw_begin().
* Only use this in cases where you know the mutex is already held such
* as in irq install/uninstall and you need to
* prevent a deadlock situation. Otherwise use gma_power_begin().
*/
bool ospm_power_is_hw_on(int hw_islands);
bool gma_power_is_on(struct drm_device *dev);
/*
* Power up/down different hw component rails/islands
*/
void ospm_power_island_down(int hw_islands);
void ospm_power_island_up(int hw_islands);
void ospm_suspend_graphics(void);
/*
* GFX-Runtime PM callbacks
*/
int psb_runtime_suspend(struct device *dev);
int psb_runtime_resume(struct device *dev);
int psb_runtime_idle(struct device *dev);
int ospm_runtime_pm_allow(struct drm_device * dev);
void ospm_runtime_pm_forbid(struct drm_device * dev);
#endif /*_PSB_POWERMGMT_H_*/
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