Commit c4c14f39 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'imx-cleanup-4.1' of...

Merge tag 'imx-cleanup-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/cleanup

Merge "ARM: imx: cleanup for 4.1" from Shawn Guo:

The i.MX cleanup for v4.1:
 - Convert i.MX25 to be a DT only platform and remove the code that is
   only used by non-DT support
 - A couple trivial cleanup on iomux-v3 code

* tag 'imx-cleanup-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v4_v5_defconfig: Remove CONFIG_MACH_MX25_3DS
  ARM: mx25: Remove imxdi_rtc platform code
  ARM: mx25: Remove "mx25.h" header file
  ARM: mx25: Remove static memory mapping
  ARM: mx25: Retrieve IIM base from dt
  ARM: mx25: Remove mx25_clocks_init()
  ARM: mx25: Remove platform code support files
  ARM: mx25: Convert to a dt-only platform
  ARM: imx25: Remove eukrea mx25 board files
  ARM: mx25: Remove mach-mx25_3ds board file
  ARM: imx: Fix trivial typo in comments
  ARM: imx: Kconfig: Fix grammar in help text
  ARM: imx/iomux-v3: allow pad_list to be const
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5602d12a dc98b0cb
...@@ -24,9 +24,8 @@ CONFIG_ARCH_MXC=y ...@@ -24,9 +24,8 @@ CONFIG_ARCH_MXC=y
CONFIG_MACH_SCB9328=y CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y CONFIG_MACH_APF9328=y
CONFIG_MACH_MX21ADS=y CONFIG_MACH_MX21ADS=y
CONFIG_MACH_MX25_3DS=y
CONFIG_MACH_EUKREA_CPUIMX25SD=y CONFIG_MACH_EUKREA_CPUIMX25SD=y
CONFIG_MACH_IMX25_DT=y CONFIG_SOC_IMX25=y
CONFIG_MACH_MX27ADS=y CONFIG_MACH_MX27ADS=y
CONFIG_MACH_MX27_3DS=y CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_IMX27_VISSTRIM_M10=y CONFIG_MACH_IMX27_VISSTRIM_M10=y
......
...@@ -13,7 +13,7 @@ CONFIG_ARCH_MVEBU=y ...@@ -13,7 +13,7 @@ CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_NETXBIG=y CONFIG_MACH_NETXBIG=y
CONFIG_ARCH_MXC=y CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX25_DT=y CONFIG_SOC_IMX25=y
CONFIG_MACH_IMX27_DT=y CONFIG_MACH_IMX27_DT=y
CONFIG_ARCH_U300=y CONFIG_ARCH_U300=y
CONFIG_PCI_MVEBU=y CONFIG_PCI_MVEBU=y
......
...@@ -77,13 +77,6 @@ config SOC_IMX21 ...@@ -77,13 +77,6 @@ config SOC_IMX21
select IMX_HAVE_IOMUX_V1 select IMX_HAVE_IOMUX_V1
select MXC_AVIC select MXC_AVIC
config SOC_IMX25
bool
select ARCH_MXC_IOMUX_V3
select CPU_ARM926T
select MXC_AVIC
select PINCTRL_IMX25
config SOC_IMX27 config SOC_IMX27
bool bool
select CPU_ARM926T select CPU_ARM926T
...@@ -149,62 +142,6 @@ config MACH_MX21ADS ...@@ -149,62 +142,6 @@ config MACH_MX21ADS
Include support for MX21ADS platform. This includes specific Include support for MX21ADS platform. This includes specific
configurations for the board and its peripherals. configurations for the board and its peripherals.
comment "MX25 platforms:"
config MACH_MX25_3DS
bool "Support MX25PDK (3DS) Platform"
select IMX_HAVE_PLATFORM_FLEXCAN
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMXDI_RTC
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_KEYPAD
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select SOC_IMX25
config MACH_EUKREA_CPUIMX25SD
bool "Support Eukrea CPUIMX25 Platform"
select IMX_HAVE_PLATFORM_FLEXCAN
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
select IMX_HAVE_PLATFORM_IMX2_WDT
select IMX_HAVE_PLATFORM_IMXDI_RTC
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_EHCI
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select USB_ULPI_VIEWPORT if USB_ULPI
select SOC_IMX25
choice
prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX25SD
default MACH_EUKREA_MBIMXSD25_BASEBOARD
config MACH_EUKREA_MBIMXSD25_BASEBOARD
bool "Eukrea MBIMXSD development board"
select IMX_HAVE_PLATFORM_GPIO_KEYS
select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_SPI_IMX
select LEDS_GPIO_REGISTER
help
This adds board specific devices that can be found on Eukrea's
MBIMXSD evaluation board.
endchoice
config MACH_IMX25_DT
bool "Support i.MX25 platforms from device tree"
select SOC_IMX25
help
Include support for Freescale i.MX25 based platforms
using the device tree for discovery
comment "MX27 platforms:" comment "MX27 platforms:"
config MACH_MX27ADS config MACH_MX27ADS
...@@ -557,6 +494,20 @@ config MACH_VPR200 ...@@ -557,6 +494,20 @@ config MACH_VPR200
endif endif
if ARCH_MULTI_V5
comment "Device tree only"
config SOC_IMX25
bool "i.MX25 support"
select ARCH_MXC_IOMUX_V3
select CPU_ARM926T
select MXC_AVIC
select PINCTRL_IMX25
help
This enables support for Freescale i.MX25 processor
endif
if ARCH_MULTI_V7 if ARCH_MULTI_V7
comment "Device tree only" comment "Device tree only"
...@@ -636,7 +587,7 @@ config SOC_VF610 ...@@ -636,7 +587,7 @@ config SOC_VF610
select PL310_ERRATA_769419 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0
help help
This enable support for Freescale Vybrid VF610 processor. This enables support for Freescale Vybrid VF610 processor.
choice choice
prompt "Clocksource for scheduler clock" prompt "Clocksource for scheduler clock"
...@@ -666,7 +617,7 @@ config SOC_LS1021A ...@@ -666,7 +617,7 @@ config SOC_LS1021A
select ZONE_DMA if ARM_LPAE select ZONE_DMA if ARM_LPAE
help help
This enable support for Freescale LS1021A processor. This enables support for Freescale LS1021A processor.
endif endif
......
...@@ -3,7 +3,7 @@ obj-y := time.o cpu.o system.o irq-common.o ...@@ -3,7 +3,7 @@ obj-y := time.o cpu.o system.o irq-common.o
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
obj-$(CONFIG_SOC_IMX25) += clk-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o obj-$(CONFIG_SOC_IMX25) += clk-imx25.o cpu-imx25.o mach-imx25.o
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o
obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
...@@ -48,12 +48,6 @@ obj-$(CONFIG_MACH_IMX1_DT) += imx1-dt.o ...@@ -48,12 +48,6 @@ obj-$(CONFIG_MACH_IMX1_DT) += imx1-dt.o
# i.MX21 based machines # i.MX21 based machines
obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
# i.MX25 based machines
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o
# i.MX27 based machines # i.MX27 based machines
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
......
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#include "clk.h" #include "clk.h"
#include "common.h" #include "common.h"
#include "hardware.h" #include "hardware.h"
#include "mx25.h"
#define CCM_MPCTL 0x00 #define CCM_MPCTL 0x00
#define CCM_UPCTL 0x04 #define CCM_UPCTL 0x04
...@@ -239,80 +238,6 @@ static int __init __mx25_clocks_init(unsigned long osc_rate, ...@@ -239,80 +238,6 @@ static int __init __mx25_clocks_init(unsigned long osc_rate,
return 0; return 0;
} }
int __init mx25_clocks_init(void)
{
void __iomem *ccm;
ccm = ioremap(MX25_CRM_BASE_ADDR, SZ_16K);
__mx25_clocks_init(24000000, ccm);
clk_register_clkdev(clk[gpt1_ipg], "ipg", "imx-gpt.0");
clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
/* i.mx25 has the i.mx21 type uart */
clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0");
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0");
clk_register_clkdev(clk[uart2_ipg], "ipg", "imx21-uart.1");
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.1");
clk_register_clkdev(clk[uart3_ipg], "ipg", "imx21-uart.2");
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.2");
clk_register_clkdev(clk[uart4_ipg], "ipg", "imx21-uart.3");
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3");
clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4");
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4");
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0");
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.1");
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.1");
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2");
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
clk_register_clkdev(clk[usbotg_ahb], "ahb", "imx-udc-mx27");
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
/* i.mx25 has the i.mx35 type cspi */
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
clk_register_clkdev(clk[cspi3_ipg], NULL, "imx35-cspi.2");
clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
clk_register_clkdev(clk[dummy], "audmux", NULL);
clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
/* i.mx25 has the i.mx35 type sdma */
clk_register_clkdev(clk[sdma_ipg], "ipg", "imx35-sdma");
clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
clk_register_clkdev(clk[iim_ipg], "iim", NULL);
mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
return 0;
}
static void __init mx25_clocks_init_dt(struct device_node *np) static void __init mx25_clocks_init_dt(struct device_node *np)
{ {
struct device_node *refnp; struct device_node *refnp;
......
...@@ -23,13 +23,11 @@ struct of_device_id; ...@@ -23,13 +23,11 @@ struct of_device_id;
void mx1_map_io(void); void mx1_map_io(void);
void mx21_map_io(void); void mx21_map_io(void);
void mx25_map_io(void);
void mx27_map_io(void); void mx27_map_io(void);
void mx31_map_io(void); void mx31_map_io(void);
void mx35_map_io(void); void mx35_map_io(void);
void imx1_init_early(void); void imx1_init_early(void);
void imx21_init_early(void); void imx21_init_early(void);
void imx25_init_early(void);
void imx27_init_early(void); void imx27_init_early(void);
void imx31_init_early(void); void imx31_init_early(void);
void imx35_init_early(void); void imx35_init_early(void);
...@@ -37,13 +35,11 @@ void mxc_init_irq(void __iomem *); ...@@ -37,13 +35,11 @@ void mxc_init_irq(void __iomem *);
void tzic_init_irq(void); void tzic_init_irq(void);
void mx1_init_irq(void); void mx1_init_irq(void);
void mx21_init_irq(void); void mx21_init_irq(void);
void mx25_init_irq(void);
void mx27_init_irq(void); void mx27_init_irq(void);
void mx31_init_irq(void); void mx31_init_irq(void);
void mx35_init_irq(void); void mx35_init_irq(void);
void imx1_soc_init(void); void imx1_soc_init(void);
void imx21_soc_init(void); void imx21_soc_init(void);
void imx25_soc_init(void);
void imx27_soc_init(void); void imx27_soc_init(void);
void imx31_soc_init(void); void imx31_soc_init(void);
void imx35_soc_init(void); void imx35_soc_init(void);
...@@ -51,7 +47,6 @@ void epit_timer_init(void __iomem *base, int irq); ...@@ -51,7 +47,6 @@ void epit_timer_init(void __iomem *base, int irq);
void mxc_timer_init(void __iomem *, int); void mxc_timer_init(void __iomem *, int);
int mx1_clocks_init(unsigned long fref); int mx1_clocks_init(unsigned long fref);
int mx21_clocks_init(unsigned long lref, unsigned long fref); int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx25_clocks_init(void);
int mx27_clocks_init(unsigned long fref); int mx27_clocks_init(unsigned long fref);
int mx31_clocks_init(unsigned long fref); int mx31_clocks_init(unsigned long fref);
int mx35_clocks_init(void); int mx35_clocks_init(void);
......
...@@ -11,6 +11,8 @@ ...@@ -11,6 +11,8 @@
*/ */
#include <linux/module.h> #include <linux/module.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include "iim.h" #include "iim.h"
#include "hardware.h" #include "hardware.h"
...@@ -20,8 +22,15 @@ static int mx25_cpu_rev = -1; ...@@ -20,8 +22,15 @@ static int mx25_cpu_rev = -1;
static int mx25_read_cpu_rev(void) static int mx25_read_cpu_rev(void)
{ {
u32 rev; u32 rev;
void __iomem *iim_base;
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim");
iim_base = of_iomap(np, 0);
BUG_ON(!iim_base);
rev = readl(iim_base + MXC_IIMSREV);
iounmap(iim_base);
rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV));
switch (rev) { switch (rev) {
case 0x00: case 0x00:
return IMX_CHIP_REVISION_1_0; return IMX_CHIP_REVISION_1_0;
......
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include "devices/devices-common.h"
extern const struct imx_fec_data imx25_fec_data;
#define imx25_add_fec(pdata) \
imx_add_fec(&imx25_fec_data, pdata)
extern const struct imx_flexcan_data imx25_flexcan_data[];
#define imx25_add_flexcan(id) \
imx_add_flexcan(&imx25_flexcan_data[id])
#define imx25_add_flexcan0() imx25_add_flexcan(0)
#define imx25_add_flexcan1() imx25_add_flexcan(1)
extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data;
#define imx25_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata)
extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data;
#define imx25_add_imxdi_rtc() \
imx_add_imxdi_rtc(&imx25_imxdi_rtc_data)
extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data;
#define imx25_add_imx2_wdt() \
imx_add_imx2_wdt(&imx25_imx2_wdt_data)
extern const struct imx_imx_fb_data imx25_imx_fb_data;
#define imx25_add_imx_fb(pdata) \
imx_add_imx_fb(&imx25_imx_fb_data, pdata)
extern const struct imx_imx_i2c_data imx25_imx_i2c_data[];
#define imx25_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx25_imx_i2c_data[id], pdata)
#define imx25_add_imx_i2c0(pdata) imx25_add_imx_i2c(0, pdata)
#define imx25_add_imx_i2c1(pdata) imx25_add_imx_i2c(1, pdata)
#define imx25_add_imx_i2c2(pdata) imx25_add_imx_i2c(2, pdata)
extern const struct imx_imx_keypad_data imx25_imx_keypad_data;
#define imx25_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx25_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx25_imx_ssi_data[];
#define imx25_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx25_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx25_imx_uart_data[];
#define imx25_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx25_imx_uart_data[id], pdata)
#define imx25_add_imx_uart0(pdata) imx25_add_imx_uart(0, pdata)
#define imx25_add_imx_uart1(pdata) imx25_add_imx_uart(1, pdata)
#define imx25_add_imx_uart2(pdata) imx25_add_imx_uart(2, pdata)
#define imx25_add_imx_uart3(pdata) imx25_add_imx_uart(3, pdata)
#define imx25_add_imx_uart4(pdata) imx25_add_imx_uart(4, pdata)
extern const struct imx_mx2_camera_data imx25_mx2_camera_data;
#define imx25_add_mx2_camera(pdata) \
imx_add_mx2_camera(&imx25_mx2_camera_data, pdata)
extern const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data;
#define imx25_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx25_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data;
#define imx25_add_mxc_ehci_hs(pdata) \
imx_add_mxc_ehci(&imx25_mxc_ehci_hs_data, pdata)
extern const struct imx_mxc_nand_data imx25_mxc_nand_data;
#define imx25_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx25_mxc_nand_data, pdata)
extern const struct imx_sdhci_esdhc_imx_data imx25_sdhci_esdhc_imx_data[];
#define imx25_add_sdhci_esdhc_imx(id, pdata) \
imx_add_sdhci_esdhc_imx(&imx25_sdhci_esdhc_imx_data[id], pdata)
extern const struct imx_spi_imx_data imx25_cspi_data[];
#define imx25_add_spi_imx(id, pdata) \
imx_add_spi_imx(&imx25_cspi_data[id], pdata)
#define imx25_add_spi_imx0(pdata) imx25_add_spi_imx(0, pdata)
#define imx25_add_spi_imx1(pdata) imx25_add_spi_imx(1, pdata)
#define imx25_add_spi_imx2(pdata) imx25_add_spi_imx(2, pdata)
...@@ -21,9 +21,6 @@ config IMX_HAVE_PLATFORM_IMX27_CODA ...@@ -21,9 +21,6 @@ config IMX_HAVE_PLATFORM_IMX27_CODA
config IMX_HAVE_PLATFORM_IMX2_WDT config IMX_HAVE_PLATFORM_IMX2_WDT
bool bool
config IMX_HAVE_PLATFORM_IMXDI_RTC
bool
config IMX_HAVE_PLATFORM_IMX_FB config IMX_HAVE_PLATFORM_IMX_FB
bool bool
......
...@@ -8,7 +8,6 @@ obj-y += platform-gpio-mxc.o ...@@ -8,7 +8,6 @@ obj-y += platform-gpio-mxc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX27_CODA) += platform-imx27-coda.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX27_CODA) += platform-imx27-coda.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o
obj-y += platform-imx-dma.o obj-y += platform-imx-dma.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
......
...@@ -19,11 +19,6 @@ ...@@ -19,11 +19,6 @@
.irq = soc ## _INT_FEC, \ .irq = soc ## _INT_FEC, \
} }
#ifdef CONFIG_SOC_IMX25
const struct imx_fec_data imx25_fec_data __initconst =
imx_fec_data_entry_single(MX25, "imx25-fec");
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_fec_data imx27_fec_data __initconst = const struct imx_fec_data imx27_fec_data __initconst =
imx_fec_data_entry_single(MX27, "imx27-fec"); imx_fec_data_entry_single(MX27, "imx27-fec");
......
...@@ -18,11 +18,6 @@ ...@@ -18,11 +18,6 @@
.irq = soc ## _INT_USB_OTG, \ .irq = soc ## _INT_USB_OTG, \
} }
#ifdef CONFIG_SOC_IMX25
const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst = const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27"); imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
......
...@@ -29,11 +29,6 @@ const struct imx_imx_fb_data imx21_imx_fb_data __initconst = ...@@ -29,11 +29,6 @@ const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K); imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx_fb_data imx27_imx_fb_data __initconst = const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K); imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
......
...@@ -31,16 +31,6 @@ const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = ...@@ -31,16 +31,6 @@ const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K); imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
#define imx25_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
imx25_imx_i2c_data_entry(0, 1),
imx25_imx_i2c_data_entry(1, 2),
imx25_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#define imx27_imx_i2c_data_entry(_id, _hwid) \ #define imx27_imx_i2c_data_entry(_id, _hwid) \
......
...@@ -21,11 +21,6 @@ const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst = ...@@ -21,11 +21,6 @@ const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX21, SZ_16); imx_imx_keypad_data_entry_single(MX21, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_keypad_data imx25_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX25, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst = const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX27, SZ_16); imx_imx_keypad_data_entry_single(MX27, SZ_16);
......
...@@ -30,15 +30,6 @@ const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = { ...@@ -30,15 +30,6 @@ const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = {
}; };
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_ssi_data imx25_imx_ssi_data[] __initconst = {
#define imx25_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX25, _id, _hwid, SZ_4K)
imx25_imx_ssi_data_entry(0, 1),
imx25_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = { const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = {
#define imx27_imx_ssi_data_entry(_id, _hwid) \ #define imx27_imx_ssi_data_entry(_id, _hwid) \
......
...@@ -47,18 +47,6 @@ const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = { ...@@ -47,18 +47,6 @@ const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
}; };
#endif #endif
#ifdef CONFIG_SOC_IMX25
const struct imx_imx_uart_1irq_data imx25_imx_uart_data[] __initconst = {
#define imx25_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX25, _id, _hwid, SZ_16K)
imx25_imx_uart_data_entry(0, 1),
imx25_imx_uart_data_entry(1, 2),
imx25_imx_uart_data_entry(2, 3),
imx25_imx_uart_data_entry(3, 4),
imx25_imx_uart_data_entry(4, 5),
};
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = { const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
#define imx27_imx_uart_data_entry(_id, _hwid) \ #define imx27_imx_uart_data_entry(_id, _hwid) \
......
...@@ -25,11 +25,6 @@ const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst = ...@@ -25,11 +25,6 @@ const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K); imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_imx2_wdt_data imx25_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX25, 0, , SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst = const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K); imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K);
......
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <asm/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imxdi_rtc_data_entry_single(soc) \
{ \
.iobase = soc ## _DRYICE_BASE_ADDR, \
.irq = soc ## _INT_DRYICE, \
}
#ifdef CONFIG_SOC_IMX25
const struct imx_imxdi_rtc_data imx25_imxdi_rtc_data __initconst =
imx_imxdi_rtc_data_entry_single(MX25);
#endif /* ifdef CONFIG_SOC_IMX25 */
struct platform_device *__init imx_add_imxdi_rtc(
const struct imx_imxdi_rtc_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("imxdi_rtc", 0,
res, ARRAY_SIZE(res), NULL, 0);
}
...@@ -27,11 +27,6 @@ ...@@ -27,11 +27,6 @@
.irqemmaprp = soc ## _INT_EMMAPRP, \ .irqemmaprp = soc ## _INT_EMMAPRP, \
} }
#ifdef CONFIG_SOC_IMX25
const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera"); imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
......
...@@ -18,13 +18,6 @@ ...@@ -18,13 +18,6 @@
.irq = soc ## _INT_USB_ ## hs, \ .irq = soc ## _INT_USB_ ## hs, \
} }
#ifdef CONFIG_SOC_IMX25
const struct imx_mxc_ehci_data imx25_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX25, 0, OTG);
const struct imx_mxc_ehci_data imx25_mxc_ehci_hs_data __initconst =
imx_mxc_ehci_data_entry_single(MX25, 1, HS);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst = const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX27, 0, OTG); imx_mxc_ehci_data_entry_single(MX27, 0, OTG);
......
...@@ -34,11 +34,6 @@ const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = ...@@ -34,11 +34,6 @@ const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K); imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */ #endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX25
const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K); imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
......
...@@ -39,17 +39,6 @@ const struct imx_spi_imx_data imx21_cspi_data[] __initconst = { ...@@ -39,17 +39,6 @@ const struct imx_spi_imx_data imx21_cspi_data[] __initconst = {
}; };
#endif #endif
#ifdef CONFIG_SOC_IMX25
/* i.mx25 has the i.mx35 type cspi */
const struct imx_spi_imx_data imx25_cspi_data[] __initconst = {
#define imx25_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX25, CSPI, "imx35-cspi", _id, _hwid, SZ_16K)
imx25_cspi_data_entry(0, 1),
imx25_cspi_data_entry(1, 2),
imx25_cspi_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX25 */
#ifdef CONFIG_SOC_IMX27 #ifdef CONFIG_SOC_IMX27
const struct imx_spi_imx_data imx27_cspi_data[] __initconst = { const struct imx_spi_imx_data imx27_cspi_data[] __initconst = {
#define imx27_cspi_data_entry(_id, _hwid) \ #define imx27_cspi_data_entry(_id, _hwid) \
......
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX25_OTG_SIC_SHIFT 29
#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
#define MX25_OTG_PM_BIT (1 << 24)
#define MX25_OTG_PP_BIT (1 << 11)
#define MX25_OTG_OCPOL_BIT (1 << 3)
#define MX25_H1_SIC_SHIFT 21
#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
#define MX25_H1_PP_BIT (1 << 18)
#define MX25_H1_PM_BIT (1 << 16)
#define MX25_H1_IPPUE_UP_BIT (1 << 7)
#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
#define MX25_H1_TLL_BIT (1 << 5)
#define MX25_H1_USBTE_BIT (1 << 4)
#define MX25_H1_OCPOL_BIT (1 << 2)
int mx25_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX25_IO_ADDRESS(MX25_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT |
MX25_OTG_OCPOL_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX25_OTG_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX25_OTG_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX25_OTG_OCPOL_BIT;
break;
case 1: /* H1 port */
v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT |
MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | MX25_H1_USBTE_BIT |
MX25_H1_IPPUE_DOWN_BIT | MX25_H1_IPPUE_UP_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX25_H1_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX25_H1_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX25_H1_OCPOL_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX25_H1_TLL_BIT;
if (flags & MXC_EHCI_INTERNAL_PHY)
v |= MX25_H1_USBTE_BIT;
if (flags & MXC_EHCI_IPPUE_DOWN)
v |= MX25_H1_IPPUE_DOWN_BIT;
if (flags & MXC_EHCI_IPPUE_UP)
v |= MX25_H1_IPPUE_UP_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX25_IO_ADDRESS(MX25_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
/*
* Copyright (C) 2010 Eric Benard - eric@eukrea.com
*
* Based on pcm970-baseboard.c which is :
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <video/platform_lcd.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "devices-imx25.h"
#include "hardware.h"
#include "iomux-mx25.h"
#include "mx25.h"
static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
/* LCD */
MX25_PAD_LD0__LD0,
MX25_PAD_LD1__LD1,
MX25_PAD_LD2__LD2,
MX25_PAD_LD3__LD3,
MX25_PAD_LD4__LD4,
MX25_PAD_LD5__LD5,
MX25_PAD_LD6__LD6,
MX25_PAD_LD7__LD7,
MX25_PAD_LD8__LD8,
MX25_PAD_LD9__LD9,
MX25_PAD_LD10__LD10,
MX25_PAD_LD11__LD11,
MX25_PAD_LD12__LD12,
MX25_PAD_LD13__LD13,
MX25_PAD_LD14__LD14,
MX25_PAD_LD15__LD15,
MX25_PAD_GPIO_E__LD16,
MX25_PAD_GPIO_F__LD17,
MX25_PAD_HSYNC__HSYNC,
MX25_PAD_VSYNC__VSYNC,
MX25_PAD_LSCLK__LSCLK,
MX25_PAD_OE_ACD__OE_ACD,
MX25_PAD_CONTRAST__CONTRAST,
/* LCD_PWR */
MX25_PAD_PWM__GPIO_1_26,
/* LED */
MX25_PAD_POWER_FAIL__GPIO_3_19,
/* SWITCH */
MX25_PAD_VSTBY_ACK__GPIO_3_18,
/* UART2 */
MX25_PAD_UART2_RTS__UART2_RTS,
MX25_PAD_UART2_CTS__UART2_CTS,
MX25_PAD_UART2_TXD__UART2_TXD,
MX25_PAD_UART2_RXD__UART2_RXD,
/* SD1 */
MX25_PAD_SD1_CMD__SD1_CMD,
MX25_PAD_SD1_CLK__SD1_CLK,
MX25_PAD_SD1_DATA0__SD1_DATA0,
MX25_PAD_SD1_DATA1__SD1_DATA1,
MX25_PAD_SD1_DATA2__SD1_DATA2,
MX25_PAD_SD1_DATA3__SD1_DATA3,
/* SD1 CD */
MX25_PAD_DE_B__GPIO_2_20,
/* I2S */
MX25_PAD_KPP_COL3__AUD5_TXFS,
MX25_PAD_KPP_COL2__AUD5_TXC,
MX25_PAD_KPP_COL1__AUD5_RXD,
MX25_PAD_KPP_COL0__AUD5_TXD,
/* CAN */
MX25_PAD_GPIO_D__CAN2_RX,
MX25_PAD_GPIO_C__CAN2_TX,
/* SPI1 */
MX25_PAD_CSPI1_MOSI__CSPI1_MOSI,
MX25_PAD_CSPI1_MISO__CSPI1_MISO,
MX25_PAD_CSPI1_SS0__GPIO_1_16,
MX25_PAD_CSPI1_SS1__GPIO_1_17,
MX25_PAD_CSPI1_SCLK__CSPI1_SCLK,
MX25_PAD_CSPI1_RDY__GPIO_2_22,
};
#define GPIO_LED1 IMX_GPIO_NR(3, 19)
#define GPIO_SWITCH1 IMX_GPIO_NR(3, 18)
#define GPIO_SD1CD IMX_GPIO_NR(2, 20)
#define GPIO_LCDPWR IMX_GPIO_NR(1, 26)
#define GPIO_SPI1_SS0 IMX_GPIO_NR(1, 16)
#define GPIO_SPI1_SS1 IMX_GPIO_NR(1, 17)
#define GPIO_SPI1_IRQ IMX_GPIO_NR(2, 22)
static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
{
.mode = {
.name = "CMO-QVGA",
.refresh = 60,
.xres = 320,
.yres = 240,
.pixclock = KHZ2PICOS(6500),
.left_margin = 30,
.right_margin = 38,
.upper_margin = 20,
.lower_margin = 3,
.hsync_len = 15,
.vsync_len = 4,
},
.bpp = 16,
.pcr = 0xCAD08B80,
}, {
.mode = {
.name = "DVI-VGA",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 32000,
.hsync_len = 7,
.left_margin = 100,
.right_margin = 100,
.vsync_len = 7,
.upper_margin = 7,
.lower_margin = 100,
},
.pcr = 0xFA208B80,
.bpp = 16,
}, {
.mode = {
.name = "DVI-SVGA",
.refresh = 60,
.xres = 800,
.yres = 600,
.pixclock = 25000,
.hsync_len = 7,
.left_margin = 75,
.right_margin = 75,
.vsync_len = 7,
.upper_margin = 7,
.lower_margin = 75,
},
.pcr = 0xFA208B80,
.bpp = 16,
},
};
static const struct imx_fb_platform_data eukrea_mximxsd_fb_pdata __initconst = {
.mode = eukrea_mximxsd_modes,
.num_modes = ARRAY_SIZE(eukrea_mximxsd_modes),
.pwmr = 0x00A903FF,
.lscr1 = 0x00120300,
.dmacr = 0x00040060,
};
static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
unsigned int power)
{
if (power)
gpio_direction_output(GPIO_LCDPWR, 1);
else
gpio_direction_output(GPIO_LCDPWR, 0);
}
static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
.set_power = eukrea_mbimxsd_lcd_power_set,
};
static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
.name = "platform-lcd",
.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
};
static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
{
.name = "led1",
.default_trigger = "heartbeat",
.active_low = 1,
.gpio = GPIO_LED1,
},
};
static const struct gpio_led_platform_data
eukrea_mbimxsd_led_info __initconst = {
.leds = eukrea_mbimxsd_leds,
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
};
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
{
.gpio = GPIO_SWITCH1,
.code = BTN_0,
.desc = "BP1",
.active_low = 1,
.wakeup = 1,
},
};
static const struct gpio_keys_platform_data
eukrea_mbimxsd_button_data __initconst = {
.buttons = eukrea_mbimxsd_gpio_buttons,
.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
};
static struct platform_device *platform_devices[] __initdata = {
&eukrea_mbimxsd_lcd_powerdev,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
{
I2C_BOARD_INFO("tlv320aic23", 0x1a),
},
};
static const
struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
};
static struct esdhc_platform_data sd1_pdata = {
.cd_gpio = GPIO_SD1CD,
.cd_type = ESDHC_CD_GPIO,
.wp_type = ESDHC_WP_NONE,
};
static struct spi_board_info eukrea_mbimxsd25_spi_board_info[] __initdata = {
{
.modalias = "spidev",
.max_speed_hz = 20000000,
.bus_num = 0,
.chip_select = 0,
.mode = SPI_MODE_0,
},
{
.modalias = "spidev",
.max_speed_hz = 20000000,
.bus_num = 0,
.chip_select = 1,
.mode = SPI_MODE_0,
},
};
static int eukrea_mbimxsd25_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
static const struct spi_imx_master eukrea_mbimxsd25_spi0_data __initconst = {
.chipselect = eukrea_mbimxsd25_spi_cs,
.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd25_spi_cs),
};
/*
* system init for baseboard usage. Will be called by cpuimx25 init.
*
* Add platform devices present on this baseboard and init
* them from CPU side as far as required to use them later on
*/
void __init eukrea_mbimxsd25_baseboard_init(void)
{
if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
ARRAY_SIZE(eukrea_mbimxsd_pads)))
printk(KERN_ERR "error setting mbimxsd pads !\n");
imx25_add_imx_uart1(&uart_pdata);
imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);
imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
imx25_add_flexcan1();
imx25_add_sdhci_esdhc_imx(0, &sd1_pdata);
gpio_request(GPIO_LED1, "LED1");
gpio_direction_output(GPIO_LED1, 1);
gpio_free(GPIO_LED1);
gpio_request(GPIO_SWITCH1, "SWITCH1");
gpio_direction_input(GPIO_SWITCH1);
gpio_free(GPIO_SWITCH1);
gpio_request(GPIO_LCDPWR, "LCDPWR");
gpio_direction_output(GPIO_LCDPWR, 1);
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
gpio_direction_input(GPIO_SPI1_IRQ);
gpio_free(GPIO_SPI1_IRQ);
imx25_add_spi_imx0(&eukrea_mbimxsd25_spi0_data);
spi_register_board_info(eukrea_mbimxsd25_spi_board_info,
ARRAY_SIZE(eukrea_mbimxsd25_spi_board_info));
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
}
...@@ -100,7 +100,7 @@ static struct mx3fb_platform_data mx3fb_pdata __initdata = { ...@@ -100,7 +100,7 @@ static struct mx3fb_platform_data mx3fb_pdata __initdata = {
.num_modes = ARRAY_SIZE(fb_modedb), .num_modes = ARRAY_SIZE(fb_modedb),
}; };
static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { static const iomux_v3_cfg_t eukrea_mbimxsd_pads[] __initconst = {
/* LCD */ /* LCD */
MX35_PAD_LD0__IPU_DISPB_DAT_0, MX35_PAD_LD0__IPU_DISPB_DAT_0,
MX35_PAD_LD1__IPU_DISPB_DAT_1, MX35_PAD_LD1__IPU_DISPB_DAT_1,
......
...@@ -112,7 +112,6 @@ ...@@ -112,7 +112,6 @@
#include "mx21.h" #include "mx21.h"
#include "mx27.h" #include "mx27.h"
#include "mx1.h" #include "mx1.h"
#include "mx25.h"
#define imx_map_entry(soc, name, _type) { \ #define imx_map_entry(soc, name, _type) { \
.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
......
This diff is collapsed.
...@@ -114,7 +114,7 @@ enum iomux_gp_func { ...@@ -114,7 +114,7 @@ enum iomux_gp_func {
*/ */
int mxc_iomux_alloc_pin(unsigned int pin, const char *label); int mxc_iomux_alloc_pin(unsigned int pin, const char *label);
/* /*
* setups mutliple pins * setups multiple pins
* convenient way to call the above function with tables * convenient way to call the above function with tables
*/ */
int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count, int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count,
......
...@@ -56,9 +56,10 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad) ...@@ -56,9 +56,10 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
return 0; return 0;
} }
int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count) int mxc_iomux_v3_setup_multiple_pads(const iomux_v3_cfg_t *pad_list,
unsigned count)
{ {
iomux_v3_cfg_t *p = pad_list; const iomux_v3_cfg_t *p = pad_list;
int i; int i;
int ret; int ret;
......
...@@ -128,10 +128,11 @@ typedef u64 iomux_v3_cfg_t; ...@@ -128,10 +128,11 @@ typedef u64 iomux_v3_cfg_t;
int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad); int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
/* /*
* setups mutliple pads * setups multiple pads
* convenient way to call the above function with tables * convenient way to call the above function with tables
*/ */
int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count); int mxc_iomux_v3_setup_multiple_pads(const iomux_v3_cfg_t *pad_list,
unsigned count);
/* /*
* Initialise the iomux controller * Initialise the iomux controller
......
...@@ -75,7 +75,7 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = { ...@@ -75,7 +75,7 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
}, },
}; };
static iomux_v3_cfg_t eukrea_cpuimx35_pads[] = { static const iomux_v3_cfg_t eukrea_cpuimx35_pads[] __initconst = {
/* UART1 */ /* UART1 */
MX35_PAD_CTS1__UART1_CTS, MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS, MX35_PAD_RTS1__UART1_RTS,
......
/*
* Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
* Copyright 2010 Eric Bénard - Eukréa Electromatique, <eric@eukrea.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices-imx25.h"
#include "ehci.h"
#include "eukrea-baseboards.h"
#include "hardware.h"
#include "iomux-mx25.h"
#include "mx25.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static iomux_v3_cfg_t eukrea_cpuimx25_pads[] = {
/* FEC - RMII */
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_TDATA0__FEC_TDATA0,
MX25_PAD_FEC_TDATA1__FEC_TDATA1,
MX25_PAD_FEC_TX_EN__FEC_TX_EN,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,
MX25_PAD_FEC_RDATA1__FEC_RDATA1,
MX25_PAD_FEC_RX_DV__FEC_RX_DV,
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
/* I2C1 */
MX25_PAD_I2C1_CLK__I2C1_CLK,
MX25_PAD_I2C1_DAT__I2C1_DAT,
};
static const struct fec_platform_data mx25_fec_pdata __initconst = {
.phy = PHY_INTERFACE_MODE_RMII,
};
static const struct mxc_nand_platform_data
eukrea_cpuimx25_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
static const struct imxi2c_platform_data
eukrea_cpuimx25_i2c0_data __initconst = {
.bitrate = 100000,
};
static struct i2c_board_info eukrea_cpuimx25_i2c_devices[] = {
{
I2C_BOARD_INFO("pcf8563", 0x51),
},
};
static int eukrea_cpuimx25_otg_init(struct platform_device *pdev)
{
return mx25_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}
static const struct mxc_usbh_platform_data otg_pdata __initconst = {
.init = eukrea_cpuimx25_otg_init,
.portsc = MXC_EHCI_MODE_UTMI,
};
static int eukrea_cpuimx25_usbh2_init(struct platform_device *pdev)
{
return mx25_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN);
}
static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
.init = eukrea_cpuimx25_usbh2_init,
.portsc = MXC_EHCI_MODE_SERIAL,
};
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
};
static bool otg_mode_host __initdata;
static int __init eukrea_cpuimx25_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = true;
else if (!strcmp(options, "device"))
otg_mode_host = false;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 1;
}
__setup("otg_mode=", eukrea_cpuimx25_otg_mode);
static void __init eukrea_cpuimx25_init(void)
{
imx25_soc_init();
if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
ARRAY_SIZE(eukrea_cpuimx25_pads)))
printk(KERN_ERR "error setting cpuimx25 pads !\n");
imx25_add_imx_uart0(&uart_pdata);
imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
imx25_add_imxdi_rtc();
imx25_add_fec(&mx25_fec_pdata);
imx25_add_imx2_wdt();
i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
if (otg_mode_host)
imx25_add_mxc_ehci_otg(&otg_pdata);
else
imx25_add_fsl_usb2_udc(&otg_device_pdata);
imx25_add_mxc_ehci_hs(&usbh2_pdata);
#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
eukrea_mbimxsd25_baseboard_init();
#endif
}
static void __init eukrea_cpuimx25_timer_init(void)
{
mx25_clocks_init();
}
MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
/* Maintainer: Eukrea Electromatique */
.atag_offset = 0x100,
.map_io = mx25_map_io,
.init_early = imx25_init_early,
.init_irq = mx25_init_irq,
.init_time = eukrea_cpuimx25_timer_init,
.init_machine = eukrea_cpuimx25_init,
.restart = mxc_restart,
MACHINE_END
...@@ -10,12 +10,29 @@ ...@@ -10,12 +10,29 @@
*/ */
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/of_address.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include "common.h" #include "common.h"
#include "mx25.h" #include "hardware.h"
static void __init imx25_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX25);
}
static void __init mx25_init_irq(void)
{
struct device_node *np;
void __iomem *avic_base;
np = of_find_compatible_node(NULL, NULL, "fsl,avic");
avic_base = of_iomap(np, 0);
BUG_ON(!avic_base);
mxc_init_irq(avic_base);
}
static const char * const imx25_dt_board_compat[] __initconst = { static const char * const imx25_dt_board_compat[] __initconst = {
"fsl,imx25", "fsl,imx25",
...@@ -23,7 +40,6 @@ static const char * const imx25_dt_board_compat[] __initconst = { ...@@ -23,7 +40,6 @@ static const char * const imx25_dt_board_compat[] __initconst = {
}; };
DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)") DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
.map_io = mx25_map_io,
.init_early = imx25_init_early, .init_early = imx25_init_early,
.init_irq = mx25_init_irq, .init_irq = mx25_init_irq,
.dt_compat = imx25_dt_board_compat, .dt_compat = imx25_dt_board_compat,
......
/*
* Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
/*
* This machine is known as:
* - i.MX25 3-Stack Development System
* - i.MX25 Platform Development Kit (i.MX25 PDK)
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/usb/otg.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices-imx25.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx25.h"
#include "mx25.h"
#define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6)
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static iomux_v3_cfg_t mx25pdk_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_TDATA0__FEC_TDATA0,
MX25_PAD_FEC_TDATA1__FEC_TDATA1,
MX25_PAD_FEC_TX_EN__FEC_TX_EN,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,
MX25_PAD_FEC_RDATA1__FEC_RDATA1,
MX25_PAD_FEC_RX_DV__FEC_RX_DV,
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
/* LCD */
MX25_PAD_LD0__LD0,
MX25_PAD_LD1__LD1,
MX25_PAD_LD2__LD2,
MX25_PAD_LD3__LD3,
MX25_PAD_LD4__LD4,
MX25_PAD_LD5__LD5,
MX25_PAD_LD6__LD6,
MX25_PAD_LD7__LD7,
MX25_PAD_LD8__LD8,
MX25_PAD_LD9__LD9,
MX25_PAD_LD10__LD10,
MX25_PAD_LD11__LD11,
MX25_PAD_LD12__LD12,
MX25_PAD_LD13__LD13,
MX25_PAD_LD14__LD14,
MX25_PAD_LD15__LD15,
MX25_PAD_GPIO_E__LD16,
MX25_PAD_GPIO_F__LD17,
MX25_PAD_HSYNC__HSYNC,
MX25_PAD_VSYNC__VSYNC,
MX25_PAD_LSCLK__LSCLK,
MX25_PAD_OE_ACD__OE_ACD,
MX25_PAD_CONTRAST__CONTRAST,
/* Keypad */
MX25_PAD_KPP_ROW0__KPP_ROW0,
MX25_PAD_KPP_ROW1__KPP_ROW1,
MX25_PAD_KPP_ROW2__KPP_ROW2,
MX25_PAD_KPP_ROW3__KPP_ROW3,
MX25_PAD_KPP_COL0__KPP_COL0,
MX25_PAD_KPP_COL1__KPP_COL1,
MX25_PAD_KPP_COL2__KPP_COL2,
MX25_PAD_KPP_COL3__KPP_COL3,
/* SD1 */
MX25_PAD_SD1_CMD__SD1_CMD,
MX25_PAD_SD1_CLK__SD1_CLK,
MX25_PAD_SD1_DATA0__SD1_DATA0,
MX25_PAD_SD1_DATA1__SD1_DATA1,
MX25_PAD_SD1_DATA2__SD1_DATA2,
MX25_PAD_SD1_DATA3__SD1_DATA3,
MX25_PAD_A14__GPIO_2_0, /* WriteProtect */
MX25_PAD_A15__GPIO_2_1, /* CardDetect */
/* I2C1 */
MX25_PAD_I2C1_CLK__I2C1_CLK,
MX25_PAD_I2C1_DAT__I2C1_DAT,
/* CAN1 */
MX25_PAD_GPIO_A__CAN1_TX,
MX25_PAD_GPIO_B__CAN1_RX,
MX25_PAD_D14__GPIO_4_6, /* CAN_PWDN */
};
static const struct fec_platform_data mx25_fec_pdata __initconst = {
.phy = PHY_INTERFACE_MODE_RMII,
};
#define FEC_ENABLE_GPIO IMX_GPIO_NR(2, 3)
#define FEC_RESET_B_GPIO IMX_GPIO_NR(4, 8)
static void __init mx25pdk_fec_reset(void)
{
gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
udelay(2);
/* turn on PHY power and lift reset */
gpio_set_value(FEC_ENABLE_GPIO, 1);
gpio_set_value(FEC_RESET_B_GPIO, 1);
}
static const struct mxc_nand_platform_data
mx25pdk_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
static struct imx_fb_videomode mx25pdk_modes[] = {
{
.mode = {
.name = "CRT-VGA",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 39683,
.left_margin = 45,
.right_margin = 114,
.upper_margin = 33,
.lower_margin = 11,
.hsync_len = 1,
.vsync_len = 1,
},
.bpp = 16,
.pcr = 0xFA208B80,
},
};
static const struct imx_fb_platform_data mx25pdk_fb_pdata __initconst = {
.mode = mx25pdk_modes,
.num_modes = ARRAY_SIZE(mx25pdk_modes),
.pwmr = 0x00A903FF,
.lscr1 = 0x00120300,
.dmacr = 0x00020010,
};
static const uint32_t mx25pdk_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_DOWN),
KEY(0, 2, KEY_VOLUMEDOWN),
KEY(0, 3, KEY_HOME),
KEY(1, 0, KEY_RIGHT),
KEY(1, 1, KEY_LEFT),
KEY(1, 2, KEY_ENTER),
KEY(1, 3, KEY_VOLUMEUP),
KEY(2, 0, KEY_F6),
KEY(2, 1, KEY_F8),
KEY(2, 2, KEY_F9),
KEY(2, 3, KEY_F10),
KEY(3, 0, KEY_F1),
KEY(3, 1, KEY_F2),
KEY(3, 2, KEY_F3),
KEY(3, 3, KEY_POWER),
};
static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
.keymap = mx25pdk_keymap,
.keymap_size = ARRAY_SIZE(mx25pdk_keymap),
};
static int mx25pdk_usbh2_init(struct platform_device *pdev)
{
return mx25_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
}
static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
.init = mx25pdk_usbh2_init,
.portsc = MXC_EHCI_MODE_SERIAL,
};
static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
};
static const struct imxi2c_platform_data mx25_3ds_i2c0_data __initconst = {
.bitrate = 100000,
};
#define SD1_GPIO_WP IMX_GPIO_NR(2, 0)
#define SD1_GPIO_CD IMX_GPIO_NR(2, 1)
static const struct esdhc_platform_data mx25pdk_esdhc_pdata __initconst = {
.wp_gpio = SD1_GPIO_WP,
.cd_gpio = SD1_GPIO_CD,
.wp_type = ESDHC_WP_GPIO,
.cd_type = ESDHC_CD_GPIO,
};
static void __init mx25pdk_init(void)
{
imx25_soc_init();
mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
ARRAY_SIZE(mx25pdk_pads));
imx25_add_imx_uart0(&uart_pdata);
imx25_add_fsl_usb2_udc(&otg_device_pdata);
imx25_add_mxc_ehci_hs(&usbh2_pdata);
imx25_add_mxc_nand(&mx25pdk_nand_board_info);
imx25_add_imxdi_rtc();
imx25_add_imx_fb(&mx25pdk_fb_pdata);
imx25_add_imx2_wdt();
mx25pdk_fec_reset();
imx25_add_fec(&mx25_fec_pdata);
imx25_add_imx_keypad(&mx25pdk_keymap_data);
imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata);
imx25_add_imx_i2c0(&mx25_3ds_i2c0_data);
gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn");
imx25_add_flexcan0();
}
static void __init mx25pdk_timer_init(void)
{
mx25_clocks_init();
}
MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
/* Maintainer: Freescale Semiconductor, Inc. */
.atag_offset = 0x100,
.map_io = mx25_map_io,
.init_early = imx25_init_early,
.init_irq = mx25_init_irq,
.init_time = mx25pdk_timer_init,
.init_machine = mx25pdk_init,
.restart = mxc_restart,
MACHINE_END
...@@ -166,7 +166,7 @@ static struct platform_device *devices[] __initdata = { ...@@ -166,7 +166,7 @@ static struct platform_device *devices[] __initdata = {
&mx35pdk_flash, &mx35pdk_flash,
}; };
static iomux_v3_cfg_t mx35pdk_pads[] = { static const iomux_v3_cfg_t mx35pdk_pads[] __initconst = {
/* UART1 */ /* UART1 */
MX35_PAD_CTS1__UART1_CTS, MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS, MX35_PAD_RTS1__UART1_RTS,
......
...@@ -129,7 +129,7 @@ static struct platform_device *devices[] __initdata = { ...@@ -129,7 +129,7 @@ static struct platform_device *devices[] __initdata = {
&pcm043_flash, &pcm043_flash,
}; };
static iomux_v3_cfg_t pcm043_pads[] = { static const iomux_v3_cfg_t pcm043_pads[] __initconst = {
/* UART1 */ /* UART1 */
MX35_PAD_CTS1__UART1_CTS, MX35_PAD_CTS1__UART1_CTS,
MX35_PAD_RTS1__UART1_RTS, MX35_PAD_RTS1__UART1_RTS,
......
...@@ -161,7 +161,7 @@ static struct i2c_board_info vpr200_i2c_devices[] = { ...@@ -161,7 +161,7 @@ static struct i2c_board_info vpr200_i2c_devices[] = {
} }
}; };
static iomux_v3_cfg_t vpr200_pads[] = { static const iomux_v3_cfg_t vpr200_pads[] __initconst = {
/* UART1 */ /* UART1 */
MX35_PAD_TXD1__UART1_TXD_MUX, MX35_PAD_TXD1__UART1_TXD_MUX,
MX35_PAD_RXD1__UART1_RXD_MUX, MX35_PAD_RXD1__UART1_RXD_MUX,
......
/*
* Copyright (C) 1999,2000 Arm Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
* Copyright (C) 2002 Shane Nay (shane@minirl.com)
* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* - add MX31 specific definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/pinctrl/machine.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include "common.h"
#include "devices/devices-common.h"
#include "hardware.h"
#include "iomux-v3.h"
#include "mx25.h"
/*
* This table defines static virtual address mappings for I/O regions.
* These are the mappings common across all MX25 boards.
*/
static struct map_desc mx25_io_desc[] __initdata = {
imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED),
imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED),
imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED),
};
/*
* This function initializes the memory map. It is called during the
* system startup to create static physical to virtual memory mappings
* for the IO modules.
*/
void __init mx25_map_io(void)
{
iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc));
}
void __init imx25_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX25);
mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR));
}
void __init mx25_init_irq(void)
{
mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR));
}
static struct sdma_platform_data imx25_sdma_pdata __initdata = {
.fw_name = "sdma-imx25.bin",
};
static const struct resource imx25_audmux_res[] __initconst = {
DEFINE_RES_MEM(MX25_AUDMUX_BASE_ADDR, SZ_16K),
};
void __init imx25_soc_init(void)
{
mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR));
mxc_device_init();
/* i.mx25 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
mxc_register_gpio("imx35-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0);
mxc_register_gpio("imx35-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0);
pinctrl_provide_dummies();
/* i.mx25 has the i.mx35 type sdma */
imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata);
/* i.mx25 has the i.mx31 type audmux */
platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res,
ARRAY_SIZE(imx25_audmux_res));
}
#ifndef __MACH_MX25_H__
#define __MACH_MX25_H__
#define MX25_AIPS1_BASE_ADDR 0x43f00000
#define MX25_AIPS1_SIZE SZ_1M
#define MX25_AIPS2_BASE_ADDR 0x53f00000
#define MX25_AIPS2_SIZE SZ_1M
#define MX25_AVIC_BASE_ADDR 0x68000000
#define MX25_AVIC_SIZE SZ_1M
#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
#define MX25_CAN1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x88000)
#define MX25_CAN2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x8c000)
#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
#define MX25_GPIO4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x9c000)
#define MX25_PWM2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa0000)
#define MX25_GPIO3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa4000)
#define MX25_PWM3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa8000)
#define MX25_PWM4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xc8000)
#define MX25_GPIO1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xcc000)
#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000)
#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
#define MX25_PWM1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xe0000)
#define MX25_UART1_BASE_ADDR 0x43f90000
#define MX25_UART2_BASE_ADDR 0x43f94000
#define MX25_AUDMUX_BASE_ADDR 0x43fb0000
#define MX25_UART3_BASE_ADDR 0x5000c000
#define MX25_UART4_BASE_ADDR 0x50008000
#define MX25_UART5_BASE_ADDR 0x5002c000
#define MX25_CSPI3_BASE_ADDR 0x50004000
#define MX25_CSPI2_BASE_ADDR 0x50010000
#define MX25_FEC_BASE_ADDR 0x50038000
#define MX25_SSI2_BASE_ADDR 0x50014000
#define MX25_SSI1_BASE_ADDR 0x50034000
#define MX25_NFC_BASE_ADDR 0xbb000000
#define MX25_IIM_BASE_ADDR 0x53ff0000
#define MX25_DRYICE_BASE_ADDR 0x53ffc000
#define MX25_ESDHC1_BASE_ADDR 0x53fb4000
#define MX25_ESDHC2_BASE_ADDR 0x53fb8000
#define MX25_LCDC_BASE_ADDR 0x53fbc000
#define MX25_KPP_BASE_ADDR 0x43fa8000
#define MX25_SDMA_BASE_ADDR 0x53fd4000
#define MX25_USB_BASE_ADDR 0x53ff4000
#define MX25_USB_OTG_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0000)
/*
* The reference manual (IMX25RM, Rev. 1, 06/2009) specifies an offset of 0x200
* for the host controller. Early documentation drafts specified 0x400 and
* Freescale internal sources confirm only the latter value to work.
*/
#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0400)
#define MX25_CSI_BASE_ADDR 0x53ff8000
#define MX25_IO_P2V(x) IMX_IO_P2V(x)
#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x))
/*
* Interrupt numbers
*/
#include <asm/irq.h>
#define MX25_INT_CSPI3 (NR_IRQS_LEGACY + 0)
#define MX25_INT_I2C1 (NR_IRQS_LEGACY + 3)
#define MX25_INT_I2C2 (NR_IRQS_LEGACY + 4)
#define MX25_INT_UART4 (NR_IRQS_LEGACY + 5)
#define MX25_INT_ESDHC2 (NR_IRQS_LEGACY + 8)
#define MX25_INT_ESDHC1 (NR_IRQS_LEGACY + 9)
#define MX25_INT_I2C3 (NR_IRQS_LEGACY + 10)
#define MX25_INT_SSI2 (NR_IRQS_LEGACY + 11)
#define MX25_INT_SSI1 (NR_IRQS_LEGACY + 12)
#define MX25_INT_CSPI2 (NR_IRQS_LEGACY + 13)
#define MX25_INT_CSPI1 (NR_IRQS_LEGACY + 14)
#define MX25_INT_GPIO3 (NR_IRQS_LEGACY + 16)
#define MX25_INT_CSI (NR_IRQS_LEGACY + 17)
#define MX25_INT_UART3 (NR_IRQS_LEGACY + 18)
#define MX25_INT_GPIO4 (NR_IRQS_LEGACY + 23)
#define MX25_INT_KPP (NR_IRQS_LEGACY + 24)
#define MX25_INT_DRYICE (NR_IRQS_LEGACY + 25)
#define MX25_INT_PWM1 (NR_IRQS_LEGACY + 26)
#define MX25_INT_UART2 (NR_IRQS_LEGACY + 32)
#define MX25_INT_NFC (NR_IRQS_LEGACY + 33)
#define MX25_INT_SDMA (NR_IRQS_LEGACY + 34)
#define MX25_INT_USB_HS (NR_IRQS_LEGACY + 35)
#define MX25_INT_PWM2 (NR_IRQS_LEGACY + 36)
#define MX25_INT_USB_OTG (NR_IRQS_LEGACY + 37)
#define MX25_INT_LCDC (NR_IRQS_LEGACY + 39)
#define MX25_INT_UART5 (NR_IRQS_LEGACY + 40)
#define MX25_INT_PWM3 (NR_IRQS_LEGACY + 41)
#define MX25_INT_PWM4 (NR_IRQS_LEGACY + 42)
#define MX25_INT_CAN1 (NR_IRQS_LEGACY + 43)
#define MX25_INT_CAN2 (NR_IRQS_LEGACY + 44)
#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
#define MX25_DMA_REQ_SSI2_RX1 22
#define MX25_DMA_REQ_SSI2_TX1 23
#define MX25_DMA_REQ_SSI2_RX0 24
#define MX25_DMA_REQ_SSI2_TX0 25
#define MX25_DMA_REQ_SSI1_RX1 26
#define MX25_DMA_REQ_SSI1_TX1 27
#define MX25_DMA_REQ_SSI1_RX0 28
#define MX25_DMA_REQ_SSI1_TX0 29
#ifndef __ASSEMBLY__
extern int mx25_revision(void);
#endif
#endif /* ifndef __MACH_MX25_H__ */
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