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Commit c6a2a080 authored by Armin Schindler's avatar Armin Schindler Committed by Linus Torvalds
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[PATCH] eicon ISDN driver: memory attach 

Access to cards memory now uses macros to attach
to the correct memory area of the card.
parent 6f4d1d80
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Showing with 637 additions and 317 deletions
drivers/isdn/hardware/eicon/io.c
View file @ c6a2a080
...@@ -72,10 +72,10 @@ IDI_CALL Requests[MAX_ADAPTER] = ...@@ -72,10 +72,10 @@ IDI_CALL Requests[MAX_ADAPTER] =
*/ */
static byte extended_xdi_features[DIVA_XDI_EXTENDED_FEATURES_MAX_SZ+1] = { static byte extended_xdi_features[DIVA_XDI_EXTENDED_FEATURES_MAX_SZ+1] = {
(DIVA_XDI_EXTENDED_FEATURES_VALID | (DIVA_XDI_EXTENDED_FEATURES_VALID |
DIVA_XDI_EXTENDED_FEATURE_CMA |
DIVA_XDI_EXTENDED_FEATURE_SDRAM_BAR | DIVA_XDI_EXTENDED_FEATURE_SDRAM_BAR |
DIVA_XDI_EXTENDED_FEATURE_CAPI_PRMS | DIVA_XDI_EXTENDED_FEATURE_CAPI_PRMS |
#if defined(DIVA_IDI_RX_DMA) #if defined(DIVA_IDI_RX_DMA)
DIVA_XDI_EXTENDED_FEATURE_CMA |
DIVA_XDI_EXTENDED_FEATURE_RX_DMA | DIVA_XDI_EXTENDED_FEATURE_RX_DMA |
#endif #endif
DIVA_XDI_EXTENDED_FEATURE_NO_CANCEL_RC), DIVA_XDI_EXTENDED_FEATURE_NO_CANCEL_RC),
...@@ -156,7 +156,8 @@ void ...@@ -156,7 +156,8 @@ void
dump_trap_frame (PISDN_ADAPTER IoAdapter, byte *exceptionFrame) dump_trap_frame (PISDN_ADAPTER IoAdapter, byte *exceptionFrame)
{ {
MP_XCPTC *xcept = (MP_XCPTC *)exceptionFrame ; MP_XCPTC *xcept = (MP_XCPTC *)exceptionFrame ;
dword *regs = &xcept->regs[0] ; dword *regs;
regs = &xcept->regs[0] ;
DBG_FTL(("%s: ***************** CPU TRAPPED *****************", DBG_FTL(("%s: ***************** CPU TRAPPED *****************",
&IoAdapter->Name[0])) &IoAdapter->Name[0]))
DBG_FTL(("Microcode: %s", &IoAdapter->ProtocolIdString[0])) DBG_FTL(("Microcode: %s", &IoAdapter->ProtocolIdString[0]))
...@@ -567,26 +568,38 @@ pcm_req (PISDN_ADAPTER IoAdapter, ENTITY *e) ...@@ -567,26 +568,38 @@ pcm_req (PISDN_ADAPTER IoAdapter, ENTITY *e)
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
byte mem_in (ADAPTER *a, void *addr) byte mem_in (ADAPTER *a, void *addr)
{ {
byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; byte val;
return (*Base) ; volatile byte* Base;
Base = (volatile byte *)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
val = *(Base + (unsigned long)addr);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
return (val);
} }
word mem_inw (ADAPTER *a, void *addr) word mem_inw (ADAPTER *a, void *addr)
{ {
word* Base = (word*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; word val;
return (READ_WORD(Base)) ; volatile byte* Base;
Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
val = READ_WORD((Base + (unsigned long)addr));
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
return (val);
} }
void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords) void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords)
{ {
volatile dword* Base = (dword*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
while (dwords--) { while (dwords--) {
*data++ = READ_DWORD(Base); *data++ = READ_DWORD((Base + (unsigned long)addr));
Base++; addr+=4;
} }
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_in_buffer (ADAPTER *a, void *addr, void *buffer, word length) void mem_in_buffer (ADAPTER *a, void *addr, void *buffer, word length)
{ {
byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
memcpy (buffer, Base, length) ; memcpy (buffer, (void *)(Base + (unsigned long)addr), length);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e) void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e)
{ {
...@@ -598,99 +611,130 @@ void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e) ...@@ -598,99 +611,130 @@ void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e)
} }
void mem_out (ADAPTER *a, void *addr, byte data) void mem_out (ADAPTER *a, void *addr, byte data)
{ {
byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
*Base = data ; *(Base + (unsigned long)addr) = data ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_outw (ADAPTER *a, void *addr, word data) void mem_outw (ADAPTER *a, void *addr, word data)
{ {
word* Base = (word*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
WRITE_WORD(Base, data); WRITE_WORD((Base + (unsigned long)addr), data);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords) void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords)
{ {
volatile dword* Base = (dword*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
while (dwords--) { while (dwords--) {
WRITE_DWORD(Base, *data); WRITE_DWORD((Base + (unsigned long)addr), *data);
Base++; addr+=4;
data++; data++;
} }
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_out_buffer (ADAPTER *a, void *addr, void *buffer, word length) void mem_out_buffer (ADAPTER *a, void *addr, void *buffer, word length)
{ {
byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
memcpy (Base, buffer, length) ; memcpy ((void *)(Base + (unsigned long)addr), buffer, length) ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
void mem_inc (ADAPTER *a, void *addr) void mem_inc (ADAPTER *a, void *addr)
{ {
byte* Base = (byte*)&((PISDN_ADAPTER)a->io)->ram[(unsigned long)addr] ; volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
byte x = *Base ; byte x = *(Base + (unsigned long)addr);
*Base = x + 1 ; *(Base + (unsigned long)addr) = x + 1 ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
} }
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* ram access functions for io-mapped cards */ /* ram access functions for io-mapped cards */
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
byte io_in(ADAPTER * a, void * adr) byte io_in(ADAPTER * a, void * adr)
{ {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); byte val;
return inpp(((PISDN_ADAPTER)a->io)->port); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port + 4, (word)(unsigned long)adr);
val = inpp(Port);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
return(val);
} }
word io_inw(ADAPTER * a, void * adr) word io_inw(ADAPTER * a, void * adr)
{ {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); word val;
return inppw(((PISDN_ADAPTER)a->io)->port); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port + 4, (word)(unsigned long)adr);
val = inppw(Port);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
return(val);
} }
void io_in_buffer(ADAPTER * a, void * adr, void * buffer, word len) void io_in_buffer(ADAPTER * a, void * adr, void * buffer, word len)
{ {
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte* P = (byte*)buffer; byte* P = (byte*)buffer;
if ((long)adr & 1) { if ((long)adr & 1) {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); outppw(Port+4, (word)(unsigned long)adr);
*P = inpp(((PISDN_ADAPTER)a->io)->port); *P = inpp(Port);
P++; P++;
adr = ((byte *) adr) + 1; adr = ((byte *) adr) + 1;
len--; len--;
if (!len) return; if (!len) {
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
return;
} }
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); }
inppw_buffer (((PISDN_ADAPTER)a->io)->port, P, len+1); outppw(Port+4, (word)(unsigned long)adr);
inppw_buffer (Port, P, len+1);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
void io_look_ahead(ADAPTER * a, PBUFFER * RBuffer, ENTITY * e) void io_look_ahead(ADAPTER * a, PBUFFER * RBuffer, ENTITY * e)
{ {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)RBuffer); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
((PISDN_ADAPTER)a->io)->RBuffer.length = inppw(((PISDN_ADAPTER)a->io)->port); outppw(Port+4, (word)(unsigned long)RBuffer);
inppw_buffer (((PISDN_ADAPTER)a->io)->port, ((PISDN_ADAPTER)a->io)->RBuffer.P, ((PISDN_ADAPTER)a->io)->RBuffer.length + 1); ((PISDN_ADAPTER)a->io)->RBuffer.length = inppw(Port);
inppw_buffer (Port, ((PISDN_ADAPTER)a->io)->RBuffer.P, ((PISDN_ADAPTER)a->io)->RBuffer.length + 1);
e->RBuffer = (DBUFFER *) &(((PISDN_ADAPTER)a->io)->RBuffer); e->RBuffer = (DBUFFER *) &(((PISDN_ADAPTER)a->io)->RBuffer);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
void io_out(ADAPTER * a, void * adr, byte data) void io_out(ADAPTER * a, void * adr, byte data)
{ {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outpp(((PISDN_ADAPTER)a->io)->port, data); outppw(Port+4, (word)(unsigned long)adr);
outpp(Port, data);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
void io_outw(ADAPTER * a, void * adr, word data) void io_outw(ADAPTER * a, void * adr, word data)
{ {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(((PISDN_ADAPTER)a->io)->port, data); outppw(Port+4, (word)(unsigned long)adr);
outppw(Port, data);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
void io_out_buffer(ADAPTER * a, void * adr, void * buffer, word len) void io_out_buffer(ADAPTER * a, void * adr, void * buffer, word len)
{ {
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte* P = (byte*)buffer; byte* P = (byte*)buffer;
if ((long)adr & 1) { if ((long)adr & 1) {
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); outppw(Port+4, (word)(unsigned long)adr);
outpp(((PISDN_ADAPTER)a->io)->port, *P); outpp(Port, *P);
P++; P++;
adr = ((byte *) adr) + 1; adr = ((byte *) adr) + 1;
len--; len--;
if (!len) return; if (!len) {
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
return;
}
} }
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); outppw(Port+4, (word)(unsigned long)adr);
outppw_buffer (((PISDN_ADAPTER)a->io)->port, P, len+1); outppw_buffer (Port, P, len+1);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
void io_inc(ADAPTER * a, void * adr) void io_inc(ADAPTER * a, void * adr)
{ {
byte x; byte x;
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
x = inpp(((PISDN_ADAPTER)a->io)->port); outppw(Port+4, (word)(unsigned long)adr);
outppw(((PISDN_ADAPTER)a->io)->port+4, (word)(unsigned long)adr); x = inpp(Port);
outpp(((PISDN_ADAPTER)a->io)->port, x+1); outppw(Port+4, (word)(unsigned long)adr);
outpp(Port, x+1);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
} }
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* OS specific functions related to queuing of entities */ /* OS specific functions related to queuing of entities */
......
drivers/isdn/hardware/eicon/io.h
View file @ c6a2a080
...@@ -39,14 +39,6 @@ typedef struct { ...@@ -39,14 +39,6 @@ typedef struct {
DEVICE_NAME DeviceName[4] ; DEVICE_NAME DeviceName[4] ;
PISDN_ADAPTER QuadroAdapter[4] ; PISDN_ADAPTER QuadroAdapter[4] ;
} ADAPTER_LIST_ENTRY, *PADAPTER_LIST_ENTRY ; } ADAPTER_LIST_ENTRY, *PADAPTER_LIST_ENTRY ;
/* --------------------------------------------------------------------------
Special OS memory support structures
-------------------------------------------------------------------------- */
#define MAX_MAPPED_ENTRIES 8
typedef struct {
void * Address;
dword Length;
} ADAPTER_MEMORY ;
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
Configuration of XDI clients carried by XDI Configuration of XDI clients carried by XDI
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
...@@ -71,7 +63,6 @@ struct _ISDN_ADAPTER { ...@@ -71,7 +63,6 @@ struct _ISDN_ADAPTER {
/* /*
remember mapped memory areas remember mapped memory areas
*/ */
ADAPTER_MEMORY MappedMemory[MAX_MAPPED_ENTRIES] ;
CARD_PROPERTIES Properties ; CARD_PROPERTIES Properties ;
dword cardType ; dword cardType ;
dword protocol_id ; /* configured protocol identifier */ dword protocol_id ; /* configured protocol identifier */
...@@ -97,6 +88,8 @@ struct _ISDN_ADAPTER { ...@@ -97,6 +88,8 @@ struct _ISDN_ADAPTER {
dword MemoryBase ; dword MemoryBase ;
dword MemorySize ; dword MemorySize ;
byte *Address ; byte *Address ;
byte *Config ;
byte *Control ;
byte *reset ; byte *reset ;
byte *port ; byte *port ;
byte *ram ; byte *ram ;
......
drivers/isdn/hardware/eicon/os_4bri.c
View file @ c6a2a080
/* $Id: os_4bri.c,v 1.1.2.3 2001/02/14 21:10:19 armin Exp $ */ /* $Id: os_4bri.c,v 1.25 2003/06/21 17:08:44 schindler Exp $ */
#include "platform.h" #include "platform.h"
#include "debuglib.h" #include "debuglib.h"
...@@ -99,6 +99,40 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal) ...@@ -99,6 +99,40 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal)
return (0); return (0);
} }
static void diva_4bri_set_addresses(diva_os_xdi_adapter_t *a)
{
dword offset = a->resources.pci.qoffset;
dword c_offset = offset * a->xdi_adapter.ControllerNumber;
a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 0;
a->resources.pci.mem_type_id[MEM_TYPE_CTLREG] = 3;
a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 0;
/*
Set up hardware related pointers
*/
a->xdi_adapter.Address = a->resources.pci.addr[2]; /* BAR2 SDRAM */
a->xdi_adapter.Address += c_offset;
a->xdi_adapter.Control = a->resources.pci.addr[2]; /* BAR2 SDRAM */
a->xdi_adapter.ram = a->resources.pci.addr[2]; /* BAR2 SDRAM */
a->xdi_adapter.ram += c_offset + (offset - MQ_SHARED_RAM_SIZE);
a->xdi_adapter.reset = a->resources.pci.addr[0]; /* BAR0 CONFIG */
/*
ctlReg contains the register address for the MIPS CPU reset control
*/
a->xdi_adapter.ctlReg = a->resources.pci.addr[3]; /* BAR3 CNTRL */
/*
prom contains the register address for FPGA and EEPROM programming
*/
a->xdi_adapter.prom = &a->xdi_adapter.reset[0x6E];
}
/* /*
** BAR0 - MEM - 0x100 - CONFIG MEM ** BAR0 - MEM - 0x100 - CONFIG MEM
** BAR1 - I/O - 0x100 - UNUSED ** BAR1 - I/O - 0x100 - UNUSED
...@@ -110,11 +144,11 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal) ...@@ -110,11 +144,11 @@ static int _4bri_is_rev_2_bri_card(int card_ordinal)
int diva_4bri_init_card(diva_os_xdi_adapter_t * a) int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
{ {
int bar, i; int bar, i;
byte *p;
PADAPTER_LIST_ENTRY quadro_list; PADAPTER_LIST_ENTRY quadro_list;
diva_os_xdi_adapter_t *diva_current; diva_os_xdi_adapter_t *diva_current;
diva_os_xdi_adapter_t *adapter_list[4]; diva_os_xdi_adapter_t *adapter_list[4];
PISDN_ADAPTER Slave; PISDN_ADAPTER Slave;
dword offset;
unsigned long bar_length[sizeof(_4bri_bar_length) / unsigned long bar_length[sizeof(_4bri_bar_length) /
sizeof(_4bri_bar_length[0])]; sizeof(_4bri_bar_length[0])];
int v2 = _4bri_is_rev_2_card(a->CardOrdinal); int v2 = _4bri_is_rev_2_card(a->CardOrdinal);
...@@ -142,7 +176,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -142,7 +176,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
have to map any BAR before we can access it have to map any BAR before we can access it
*/ */
if (!_4bri_get_serial_number(a)) { if (!_4bri_get_serial_number(a)) {
DBG_ERR(("A: 4BRI can't ger Serial Number")) DBG_ERR(("A: 4BRI can't get Serial Number"))
diva_4bri_cleanup_adapter(a); diva_4bri_cleanup_adapter(a);
return (-1); return (-1);
} }
...@@ -190,7 +224,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -190,7 +224,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
for (bar = 0; bar < 4; bar++) { for (bar = 0; bar < 4; bar++) {
if (bar != 1) { /* ignore I/O */ if (bar != 1) { /* ignore I/O */
a->resources.pci.addr[bar] = a->resources.pci.addr[bar] =
divasa_remap_pci_bar(a->resources.pci.bar[bar], divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar],
bar_length[bar]); bar_length[bar]);
if (!a->resources.pci.addr[bar]) { if (!a->resources.pci.addr[bar]) {
DBG_ERR(("A: 4BRI: can't map bar[%d]", bar)) DBG_ERR(("A: 4BRI: can't map bar[%d]", bar))
...@@ -205,14 +239,15 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -205,14 +239,15 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
*/ */
sprintf(&a->port_name[0], "DIVA 4BRI %ld", (long) a->xdi_adapter.serialNo); sprintf(&a->port_name[0], "DIVA 4BRI %ld", (long) a->xdi_adapter.serialNo);
if (diva_os_register_io_port(1, a->resources.pci.bar[1], if (diva_os_register_io_port(a, 1, a->resources.pci.bar[1],
bar_length[1], &a->port_name[0])) { bar_length[1], &a->port_name[0], 1)) {
DBG_ERR(("A: 4BRI: can't register bar[1]")) DBG_ERR(("A: 4BRI: can't register bar[1]"))
diva_4bri_cleanup_adapter(a); diva_4bri_cleanup_adapter(a);
return (-1); return (-1);
} }
a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1]; a->resources.pci.addr[1] =
(void *) (unsigned long) a->resources.pci.bar[1];
/* /*
Set cleanup pointer for base adapter only, so slave adapter Set cleanup pointer for base adapter only, so slave adapter
...@@ -265,8 +300,8 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -265,8 +300,8 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
(PADAPTER_LIST_ENTRY) diva_os_malloc(0, sizeof(*quadro_list)); (PADAPTER_LIST_ENTRY) diva_os_malloc(0, sizeof(*quadro_list));
if (!(a->slave_list = quadro_list)) { if (!(a->slave_list = quadro_list)) {
for (i = 0; i < (tasks - 1); i++) { for (i = 0; i < (tasks - 1); i++) {
diva_os_free(0, a->slave_adapters[bar]); diva_os_free(0, a->slave_adapters[i]);
a->slave_adapters[bar] = 0; a->slave_adapters[i] = 0;
} }
diva_4bri_cleanup_adapter(a); diva_4bri_cleanup_adapter(a);
return (-1); return (-1);
...@@ -359,60 +394,39 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -359,60 +394,39 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
prepare_qBri_functions(&a->xdi_adapter); prepare_qBri_functions(&a->xdi_adapter);
} }
for (i = 0; i < tasks; i++) {
diva_current = adapter_list[i];
if (i)
memcpy(&diva_current->resources, &a->resources, sizeof(divas_card_resources_t));
diva_current->resources.pci.qoffset = (a->xdi_adapter.MemorySize >> factor);
}
/* /*
Set up hardware related pointers Set up hardware related pointers
*/ */
a->xdi_adapter.cfg = (void *) (unsigned long) a->resources.pci.bar[0]; /* BAR0 CONFIG */ a->xdi_adapter.cfg = (void *) (unsigned long) a->resources.pci.bar[0]; /* BAR0 CONFIG */
a->xdi_adapter.port = (void *) (unsigned long) a->resources.pci.bar[1]; /* BAR1 */ a->xdi_adapter.port = (void *) (unsigned long) a->resources.pci.bar[1]; /* BAR1 */
a->xdi_adapter.Address = a->resources.pci.addr[2]; /* BAR2 SDRAM */ a->xdi_adapter.ctlReg = (void *) (unsigned long) a->resources.pci.bar[3]; /* BAR3 CNTRL */
a->xdi_adapter.ctlReg =
(void *) (unsigned long) a->resources.pci.bar[3]; /* BAR3 CNTRL */
a->xdi_adapter.reset = a->resources.pci.addr[0]; /* BAR0 CONFIG */
a->xdi_adapter.ram = a->resources.pci.addr[2]; /* BAR2 SDRAM */
/*
ctlReg contains the register address for the MIPS CPU reset control
*/
a->xdi_adapter.ctlReg = a->resources.pci.addr[3]; /* BAR3 CNTRL */
/*
prom contains the register address for FPGA and EEPROM programming
*/
a->xdi_adapter.prom = &a->xdi_adapter.reset[0x6E];
/*
reset contains the base address for the PLX 9054 register set
*/
a->xdi_adapter.reset[PLX9054_INTCSR] = 0x00; /* disable PCI interrupts */
/*
Replicate addresses to all instances, set shared memory
address for all instances
*/
for (i = 0; i < tasks; i++) { for (i = 0; i < tasks; i++) {
diva_current = adapter_list[i];
diva_4bri_set_addresses(diva_current);
Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i]; Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i];
offset = Slave->MultiMaster = &a->xdi_adapter;
Slave->ControllerNumber *
(a->xdi_adapter.MemorySize >> factor);
Slave->Address = &a->xdi_adapter.Address[offset];
Slave->ram = &a->xdi_adapter.ram[offset];
Slave->reset = a->xdi_adapter.reset;
Slave->ctlReg = a->xdi_adapter.ctlReg;
Slave->prom = a->xdi_adapter.prom;
Slave->reset = a->xdi_adapter.reset;
Slave->sdram_bar = a->xdi_adapter.sdram_bar; Slave->sdram_bar = a->xdi_adapter.sdram_bar;
} if (i) {
for (i = 0; i < tasks; i++) { Slave->serialNo = ((dword) (Slave->ControllerNumber << 24)) |
Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i]; a->xdi_adapter.serialNo;
Slave->ram +=
((a->xdi_adapter.MemorySize >> factor) -
MQ_SHARED_RAM_SIZE);
}
for (i = 1; i < tasks; i++) {
Slave = a->xdi_adapter.QuadroList->QuadroAdapter[i];
Slave->serialNo =
((dword) (Slave->ControllerNumber << 24)) | a->
xdi_adapter.serialNo;
Slave->cardType = a->xdi_adapter.cardType; Slave->cardType = a->xdi_adapter.cardType;
} }
}
/*
reset contains the base address for the PLX 9054 register set
*/
p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
p[PLX9054_INTCSR] = 0x00; /* disable PCI interrupts */
DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
/* /*
Set IRQ handler Set IRQ handler
...@@ -484,8 +498,7 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a) ...@@ -484,8 +498,7 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
if (bar != 1) { if (bar != 1) {
if (a->resources.pci.bar[bar] if (a->resources.pci.bar[bar]
&& a->resources.pci.addr[bar]) { && a->resources.pci.addr[bar]) {
divasa_unmap_pci_bar(a->resources.pci. divasa_unmap_pci_bar(a->resources.pci.addr[bar]);
addr[bar]);
a->resources.pci.bar[bar] = 0; a->resources.pci.bar[bar] = 0;
a->resources.pci.addr[bar] = 0; a->resources.pci.addr[bar] = 0;
} }
...@@ -496,12 +509,12 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a) ...@@ -496,12 +509,12 @@ static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
Unregister I/O Unregister I/O
*/ */
if (a->resources.pci.bar[1] && a->resources.pci.addr[1]) { if (a->resources.pci.bar[1] && a->resources.pci.addr[1]) {
diva_os_register_io_port(0, a->resources.pci.bar[1], diva_os_register_io_port(a, 0, a->resources.pci.bar[1],
_4bri_is_rev_2_card(a-> _4bri_is_rev_2_card(a->
CardOrdinal) ? CardOrdinal) ?
_4bri_v2_bar_length[1] : _4bri_v2_bar_length[1] :
_4bri_bar_length[1], _4bri_bar_length[1],
&a->port_name[0]); &a->port_name[0], 1);
a->resources.pci.bar[1] = 0; a->resources.pci.bar[1] = 0;
a->resources.pci.addr[1] = 0; a->resources.pci.addr[1] = 0;
} }
...@@ -776,23 +789,18 @@ diva_4bri_cmd_card_proc(struct _diva_os_xdi_adapter *a, ...@@ -776,23 +789,18 @@ diva_4bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
a->xdi_mbox. a->xdi_mbox.
data_length); data_length);
if (a->xdi_mbox.data) { if (a->xdi_mbox.data) {
byte *src = byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
a->xdi_adapter.Address; byte *src = p;
byte *dst = byte *dst = a->xdi_mbox.data;
a->xdi_mbox.data; dword len = a->xdi_mbox.data_length;
dword len =
a->xdi_mbox. src += cmd->command_data.read_sdram.offset;
data_length;
src +=
cmd->command_data.
read_sdram.offset;
while (len--) { while (len--) {
*dst++ = *src++; *dst++ = *src++;
} }
a->xdi_mbox.status = DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
DIVA_XDI_MBOX_BUSY; a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
ret = 0; ret = 0;
} }
} }
...@@ -903,10 +911,12 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -903,10 +911,12 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address, dword address,
const byte * data, dword length, dword limit) const byte * data, dword length, dword limit)
{ {
byte *mem = IoAdapter->Address; byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte *mem = p;
if (((address + length) >= limit) || !mem) { if (((address + length) >= limit) || !mem) {
DBG_ERR(("A: A(%d) write PRI address=0x%08lx", DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
DBG_ERR(("A: A(%d) write 4BRI address=0x%08lx",
IoAdapter->ANum, address + length)) IoAdapter->ANum, address + length))
return (-1); return (-1);
} }
...@@ -916,6 +926,7 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -916,6 +926,7 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
*mem++ = *data++; *mem++ = *data++;
} }
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
return (0); return (0);
} }
...@@ -926,16 +937,18 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -926,16 +937,18 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter,
volatile word *signature; volatile word *signature;
int started = 0; int started = 0;
int i; int i;
byte *p;
/* /*
start adapter start adapter
*/ */
start_qBri_hardware(IoAdapter); start_qBri_hardware(IoAdapter);
p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
/* /*
wait for signature in shared memory (max. 3 seconds) wait for signature in shared memory (max. 3 seconds)
*/ */
signature = (volatile word *) (&IoAdapter->ram[0x1E]); signature = (volatile word *) (&p[0x1E]);
for (i = 0; i < 300; ++i) { for (i = 0; i < 300; ++i) {
diva_os_wait(10); diva_os_wait(10);
...@@ -958,10 +971,12 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -958,10 +971,12 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter,
DBG_FTL(("%s: Adapter selftest failed, signature=%04x", DBG_FTL(("%s: Adapter selftest failed, signature=%04x",
IoAdapter->Properties.Name, IoAdapter->Properties.Name,
READ_WORD(&signature[0]))) READ_WORD(&signature[0])))
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
(*(IoAdapter->trapFnc)) (IoAdapter); (*(IoAdapter->trapFnc)) (IoAdapter);
IoAdapter->stop(IoAdapter); IoAdapter->stop(IoAdapter);
return (-1); return (-1);
} }
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
for (i = 0; i < IoAdapter->tasks; i++) { for (i = 0; i < IoAdapter->tasks; i++) {
IoAdapter->QuadroList->QuadroAdapter[i]->Initialized = 1; IoAdapter->QuadroList->QuadroAdapter[i]->Initialized = 1;
...@@ -997,13 +1012,16 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter) ...@@ -997,13 +1012,16 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
#ifdef SUPPORT_INTERRUPT_TEST_ON_4BRI #ifdef SUPPORT_INTERRUPT_TEST_ON_4BRI
int i; int i;
ADAPTER *a = &IoAdapter->a; ADAPTER *a = &IoAdapter->a;
byte *p;
IoAdapter->IrqCount = 0; IoAdapter->IrqCount = 0;
if (IoAdapter->ControllerNumber > 0) if (IoAdapter->ControllerNumber > 0)
return (-1); return (-1);
IoAdapter->reset[PLX9054_INTCSR] = PLX9054_INT_ENABLE; p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p[PLX9054_INTCSR] = PLX9054_INT_ENABLE;
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
/* /*
interrupt test interrupt test
*/ */
...@@ -1015,20 +1033,23 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter) ...@@ -1015,20 +1033,23 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
return ((IoAdapter->IrqCount > 0) ? 0 : -1); return ((IoAdapter->IrqCount > 0) ? 0 : -1);
#else #else
dword volatile *qBriIrq; dword volatile *qBriIrq;
byte *p;
/* /*
Reset on-board interrupt register Reset on-board interrupt register
*/ */
IoAdapter->IrqCount = 0; IoAdapter->IrqCount = 0;
qBriIrq = p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
(dword volatile *) (&IoAdapter-> qBriIrq = (dword volatile *) (&p[_4bri_is_rev_2_card
ctlReg[_4bri_is_rev_2_card
(IoAdapter-> (IoAdapter->
cardType) ? (MQ2_BREG_IRQ_TEST) cardType) ? (MQ2_BREG_IRQ_TEST)
: (MQ_BREG_IRQ_TEST)]); : (MQ_BREG_IRQ_TEST)]);
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF); WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF);
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
IoAdapter->reset[PLX9054_INTCSR] = PLX9054_INT_ENABLE; p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p[PLX9054_INTCSR] = PLX9054_INT_ENABLE;
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
diva_os_wait(100); diva_os_wait(100);
......
drivers/isdn/hardware/eicon/os_bri.c
View file @ c6a2a080
/* $Id: os_bri.c,v 1.1.2.2 2001/02/12 20:23:46 armin Exp $ */ /* $Id: os_bri.c,v 1.18 2003/06/21 17:10:29 schindler Exp $ */
#include "platform.h" #include "platform.h"
#include "debuglib.h" #include "debuglib.h"
...@@ -46,6 +46,27 @@ static int diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -46,6 +46,27 @@ static int diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
dword start_address, dword features); dword start_address, dword features);
static int diva_bri_stop_adapter(diva_os_xdi_adapter_t * a); static int diva_bri_stop_adapter(diva_os_xdi_adapter_t * a);
static void diva_bri_set_addresses(diva_os_xdi_adapter_t * a)
{
a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 1;
a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 1;
a->resources.pci.mem_type_id[MEM_TYPE_PORT] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_CTLREG] = 2;
a->xdi_adapter.ram = a->resources.pci.addr[0];
a->xdi_adapter.cfg = a->resources.pci.addr[1];
a->xdi_adapter.Address = a->resources.pci.addr[2];
a->xdi_adapter.reset = a->xdi_adapter.cfg;
a->xdi_adapter.port = a->xdi_adapter.Address;
a->xdi_adapter.ctlReg = a->xdi_adapter.port + M_PCI_RESET;
a->xdi_adapter.reset += 0x4C; /* PLX 9050 !! */
}
/* /*
** BAR0 - MEM Addr - 0x80 - NOT USED ** BAR0 - MEM Addr - 0x80 - NOT USED
** BAR1 - I/O Addr - 0x80 ** BAR1 - I/O Addr - 0x80
...@@ -58,6 +79,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -58,6 +79,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
word cmd = 0, cmd_org; word cmd = 0, cmd_org;
byte Bus, Slot; byte Bus, Slot;
void *hdev; void *hdev;
byte *p;
/* /*
Set properties Set properties
...@@ -123,7 +145,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -123,7 +145,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
Map and register resources Map and register resources
*/ */
if (!(a->resources.pci.addr[0] = if (!(a->resources.pci.addr[0] =
divasa_remap_pci_bar(a->resources.pci.bar[0], divasa_remap_pci_bar(a, 0, a->resources.pci.bar[0],
bri_bar_length[0]))) { bri_bar_length[0]))) {
DBG_ERR(("A: BRI, can't map BAR[0]")) DBG_ERR(("A: BRI, can't map BAR[0]"))
diva_bri_cleanup_adapter(a); diva_bri_cleanup_adapter(a);
...@@ -133,8 +155,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -133,8 +155,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
sprintf(&a->port_name[0], "BRI %02x:%02x", sprintf(&a->port_name[0], "BRI %02x:%02x",
a->resources.pci.bus, a->resources.pci.func); a->resources.pci.bus, a->resources.pci.func);
if (diva_os_register_io_port(1, a->resources.pci.bar[1], if (diva_os_register_io_port(a, 1, a->resources.pci.bar[1],
bri_bar_length[1], &a->port_name[0])) { bri_bar_length[1], &a->port_name[0], 1)) {
DBG_ERR(("A: BRI, can't register BAR[1]")) DBG_ERR(("A: BRI, can't register BAR[1]"))
diva_bri_cleanup_adapter(a); diva_bri_cleanup_adapter(a);
return (-1); return (-1);
...@@ -142,8 +164,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -142,8 +164,8 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1]; a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1];
a->resources.pci.length[1] = bri_bar_length[1]; a->resources.pci.length[1] = bri_bar_length[1];
if (diva_os_register_io_port(1, a->resources.pci.bar[2], if (diva_os_register_io_port(a, 1, a->resources.pci.bar[2],
bar2_length, &a->port_name[0])) { bar2_length, &a->port_name[0], 2)) {
DBG_ERR(("A: BRI, can't register BAR[2]")) DBG_ERR(("A: BRI, can't register BAR[2]"))
diva_bri_cleanup_adapter(a); diva_bri_cleanup_adapter(a);
return (-1); return (-1);
...@@ -151,6 +173,11 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -151,6 +173,11 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
a->resources.pci.addr[2] = (void *) (unsigned long) a->resources.pci.bar[2]; a->resources.pci.addr[2] = (void *) (unsigned long) a->resources.pci.bar[2];
a->resources.pci.length[2] = bar2_length; a->resources.pci.length[2] = bar2_length;
/*
Set all memory areas
*/
diva_bri_set_addresses(a);
/* /*
Get Serial Number Get Serial Number
*/ */
...@@ -210,15 +237,9 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a) ...@@ -210,15 +237,9 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
a->interface.cleanup_adapter_proc = diva_bri_cleanup_adapter; a->interface.cleanup_adapter_proc = diva_bri_cleanup_adapter;
a->interface.cmd_proc = diva_bri_cmd_card_proc; a->interface.cmd_proc = diva_bri_cmd_card_proc;
a->xdi_adapter.cfg = a->resources.pci.addr[1]; p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
a->xdi_adapter.Address = a->resources.pci.addr[2]; outpp(p, 0x41);
DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
a->xdi_adapter.reset = a->xdi_adapter.cfg;
a->xdi_adapter.port = a->xdi_adapter.Address;
a->xdi_adapter.ctlReg = a->xdi_adapter.port + M_PCI_RESET;
a->xdi_adapter.reset += 0x4C; /* PLX 9050 !! */
outpp(a->xdi_adapter.reset, 0x41);
prepare_maestra_functions(&a->xdi_adapter); prepare_maestra_functions(&a->xdi_adapter);
...@@ -268,11 +289,11 @@ static int diva_bri_cleanup_adapter(diva_os_xdi_adapter_t * a) ...@@ -268,11 +289,11 @@ static int diva_bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
for (i = 1; i < 3; i++) { for (i = 1; i < 3; i++) {
if (a->resources.pci.addr[i] && a->resources.pci.bar[i]) { if (a->resources.pci.addr[i] && a->resources.pci.bar[i]) {
diva_os_register_io_port(0, diva_os_register_io_port(a, 0,
a->resources.pci.bar[i], a->resources.pci.bar[i],
a->resources.pci. a->resources.pci.
length[i], length[i],
&a->port_name[0]); &a->port_name[0], i);
a->resources.pci.addr[i] = 0; a->resources.pci.addr[i] = 0;
a->resources.pci.bar[i] = 0; a->resources.pci.bar[i] = 0;
} }
...@@ -314,18 +335,20 @@ static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a) ...@@ -314,18 +335,20 @@ static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a)
byte *confIO; byte *confIO;
word serHi, serLo, *confMem; word serHi, serLo, *confMem;
confIO = (byte *) a->resources.pci.addr[1]; confIO = (byte *) DIVA_OS_MEM_ATTACH_CFG(&a->xdi_adapter);
serHi = (word) (inppw(&confIO[0x22]) & 0x0FFF); serHi = (word) (inppw(&confIO[0x22]) & 0x0FFF);
serLo = (word) (inppw(&confIO[0x26]) & 0x0FFF); serLo = (word) (inppw(&confIO[0x26]) & 0x0FFF);
serNo = ((dword) serHi << 16) | (dword) serLo; serNo = ((dword) serHi << 16) | (dword) serLo;
DIVA_OS_MEM_DETACH_CFG(&a->xdi_adapter, confIO);
if ((serNo == 0) || (serNo == 0xFFFFFFFF)) { if ((serNo == 0) || (serNo == 0xFFFFFFFF)) {
DBG_FTL(("W: BRI use BAR[0] to get card serial number")) DBG_FTL(("W: BRI use BAR[0] to get card serial number"))
confMem = (word *) a->resources.pci.addr[0]; confMem = (word *) DIVA_OS_MEM_ATTACH_RAM(&a->xdi_adapter);
serHi = (word) (READ_WORD(&confMem[0x11]) & 0x0FFF); serHi = (word) (READ_WORD(&confMem[0x11]) & 0x0FFF);
serLo = (word) (READ_WORD(&confMem[0x13]) & 0x0FFF); serLo = (word) (READ_WORD(&confMem[0x13]) & 0x0FFF);
serNo = (((dword) serHi) << 16) | ((dword) serLo); serNo = (((dword) serHi) << 16) | ((dword) serLo);
DIVA_OS_MEM_DETACH_RAM(&a->xdi_adapter, confMem);
} }
DBG_LOG(("Serial Number=%ld", serNo)) DBG_LOG(("Serial Number=%ld", serNo))
...@@ -342,9 +365,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a) ...@@ -342,9 +365,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a)
int i; int i;
for (i = 1; i < 3; i++) { for (i = 1; i < 3; i++) {
diva_os_register_io_port(0, a->resources.pci.bar[i], diva_os_register_io_port(a, 0, a->resources.pci.bar[i],
a->resources.pci.length[i], a->resources.pci.length[i],
&a->port_name[0]); &a->port_name[0], i);
a->resources.pci.addr[i] = 0; a->resources.pci.addr[i] = 0;
} }
...@@ -352,9 +375,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a) ...@@ -352,9 +375,9 @@ static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a)
(long) a->xdi_adapter.serialNo); (long) a->xdi_adapter.serialNo);
for (i = 1; i < 3; i++) { for (i = 1; i < 3; i++) {
if (diva_os_register_io_port(1, a->resources.pci.bar[i], if (diva_os_register_io_port(a, 1, a->resources.pci.bar[i],
a->resources.pci.length[i], a->resources.pci.length[i],
&a->port_name[0])) { &a->port_name[0], i)) {
DBG_ERR(("A: failed to reregister BAR[%d]", i)) DBG_ERR(("A: failed to reregister BAR[%d]", i))
return (-1); return (-1);
} }
...@@ -493,6 +516,7 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) ...@@ -493,6 +516,7 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter)
{ {
byte *addrHi, *addrLo, *ioaddr; byte *addrHi, *addrLo, *ioaddr;
dword i; dword i;
byte *Port;
if (!IoAdapter->port) { if (!IoAdapter->port) {
return (-1); return (-1);
...@@ -501,13 +525,13 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) ...@@ -501,13 +525,13 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter)
DBG_ERR(("A: A(%d) can't reset BRI adapter - please stop first", DBG_ERR(("A: A(%d) can't reset BRI adapter - please stop first",
IoAdapter->ANum)) return (-1); IoAdapter->ANum)) return (-1);
} }
addrHi =
IoAdapter->port +
((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = IoAdapter->port + ADDR;
ioaddr = IoAdapter->port + DATA;
(*(IoAdapter->rstFnc)) (IoAdapter); (*(IoAdapter->rstFnc)) (IoAdapter);
diva_os_wait(100); diva_os_wait(100);
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
addrHi = Port +
((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = Port + ADDR;
ioaddr = Port + DATA;
/* /*
recover recover
*/ */
...@@ -540,6 +564,8 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter) ...@@ -540,6 +564,8 @@ static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter)
outppw(addrLo, (word) 0); outppw(addrLo, (word) 0);
outppw(ioaddr, (word) 0); outppw(ioaddr, (word) 0);
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
/* /*
Forget all outstanding entities Forget all outstanding entities
*/ */
...@@ -578,16 +604,17 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -578,16 +604,17 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address, const byte * data, dword length) dword address, const byte * data, dword length)
{ {
byte *addrHi, *addrLo, *ioaddr; byte *addrHi, *addrLo, *ioaddr;
byte *Port;
if (!IoAdapter->port) { if (!IoAdapter->port) {
return (-1); return (-1);
} }
addrHi = Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
IoAdapter->port + addrHi = Port +
((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = IoAdapter->port + ADDR; addrLo = Port + ADDR;
ioaddr = IoAdapter->port + DATA; ioaddr = Port + DATA;
while (length--) { while (length--) {
outpp(addrHi, (word) (address >> 16)); outpp(addrHi, (word) (address >> 16));
...@@ -596,6 +623,7 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -596,6 +623,7 @@ diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
address++; address++;
} }
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
return (0); return (0);
} }
...@@ -603,6 +631,7 @@ static int ...@@ -603,6 +631,7 @@ static int
diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
dword start_address, dword features) dword start_address, dword features)
{ {
byte *Port;
dword i, test; dword i, test;
byte *addrHi, *addrLo, *ioaddr; byte *addrHi, *addrLo, *ioaddr;
int started = 0; int started = 0;
...@@ -621,11 +650,11 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -621,11 +650,11 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum); sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
DBG_LOG(("A(%d) start BRI", IoAdapter->ANum)) DBG_LOG(("A(%d) start BRI", IoAdapter->ANum))
addrHi = Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
IoAdapter->port + addrHi = Port +
((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH); ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = IoAdapter->port + ADDR; addrLo = Port + ADDR;
ioaddr = IoAdapter->port + DATA; ioaddr = Port + DATA;
outpp(addrHi, outpp(addrHi,
(byte) ( (byte) (
...@@ -633,12 +662,20 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -633,12 +662,20 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
BRI_SHARED_RAM_SIZE) >> 16)); BRI_SHARED_RAM_SIZE) >> 16));
outppw(addrLo, 0x1e); outppw(addrLo, 0x1e);
outppw(ioaddr, 0x00); outppw(ioaddr, 0x00);
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
/* /*
start the protocol code start the protocol code
*/ */
outpp(IoAdapter->ctlReg, 0x08); Port = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp(Port, 0x08);
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, Port);
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
addrHi = Port +
((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = Port + ADDR;
ioaddr = Port + DATA;
/* /*
wait for signature (max. 3 seconds) wait for signature (max. 3 seconds)
*/ */
...@@ -659,6 +696,7 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -659,6 +696,7 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
break; break;
} }
} }
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
if (!started) { if (!started) {
DBG_FTL(("A: A(%d) %s: Adapter selftest failed 0x%04X", DBG_FTL(("A: A(%d) %s: Adapter selftest failed 0x%04X",
...@@ -677,7 +715,9 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -677,7 +715,9 @@ diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
a->ReadyInt = 1; a->ReadyInt = 1;
if (IoAdapter->reset) { if (IoAdapter->reset) {
outpp(IoAdapter->reset, 0x41); Port = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
outpp(Port, 0x41);
DIVA_OS_MEM_DETACH_RESET(IoAdapter, Port);
} }
a->ram_out(a, &PR_RAM->ReadyInt, 1); a->ram_out(a, &PR_RAM->ReadyInt, 1);
......
drivers/isdn/hardware/eicon/os_pri.c
View file @ c6a2a080
/* $Id: os_pri.c,v 1.1.2.3 2001/02/14 21:10:19 armin Exp $ */ /* $Id: os_pri.c,v 1.29 2003/08/25 13:41:27 schindler Exp $ */
#include "platform.h" #include "platform.h"
#include "debuglib.h" #include "debuglib.h"
...@@ -57,6 +57,34 @@ static int pri_is_rev_2_card(int card_ordinal) ...@@ -57,6 +57,34 @@ static int pri_is_rev_2_card(int card_ordinal)
return (0); return (0);
} }
static void diva_pri_set_addresses(diva_os_xdi_adapter_t * a)
{
a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0;
a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4;
a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2;
a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4;
a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3;
a->xdi_adapter.Address = a->resources.pci.addr[0];
a->xdi_adapter.Control = a->resources.pci.addr[2];
a->xdi_adapter.Config = a->resources.pci.addr[4];
a->xdi_adapter.ram = a->resources.pci.addr[0];
a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
a->xdi_adapter.reset = a->resources.pci.addr[2];
a->xdi_adapter.reset += MP_RESET;
a->xdi_adapter.cfg = a->resources.pci.addr[4];
a->xdi_adapter.cfg += MP_IRQ_RESET;
a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
a->xdi_adapter.prom = a->resources.pci.addr[3];
}
/* /*
** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2 ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2
** BAR1 - DEVICES, 0x1000 ** BAR1 - DEVICES, 0x1000
...@@ -117,7 +145,7 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) ...@@ -117,7 +145,7 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a)
*/ */
for (bar = 0; bar < 5; bar++) { for (bar = 0; bar < 5; bar++) {
a->resources.pci.addr[bar] = a->resources.pci.addr[bar] =
divasa_remap_pci_bar(a->resources.pci.bar[bar], divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar],
bar_length[bar]); bar_length[bar]);
if (!a->resources.pci.addr[bar]) { if (!a->resources.pci.addr[bar]) {
DBG_ERR(("A: A(%d), can't map bar[%d]", DBG_ERR(("A: A(%d), can't map bar[%d]",
...@@ -127,6 +155,11 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) ...@@ -127,6 +155,11 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a)
} }
} }
/*
Set all memory areas
*/
diva_pri_set_addresses(a);
/* /*
Get Serial Number of this adapter Get Serial Number of this adapter
*/ */
...@@ -194,23 +227,6 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a) ...@@ -194,23 +227,6 @@ int diva_pri_init_card(diva_os_xdi_adapter_t * a)
prepare_pri_functions(&a->xdi_adapter); prepare_pri_functions(&a->xdi_adapter);
} }
/*
Set all memory areas
*/
a->xdi_adapter.Address = a->resources.pci.addr[0];
a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
a->xdi_adapter.ram = a->resources.pci.addr[0];
a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
a->xdi_adapter.reset = a->resources.pci.addr[2];
a->xdi_adapter.reset += MP_RESET;
a->xdi_adapter.prom =
(byte *) (unsigned long) a->resources.pci.bar[3];
a->xdi_adapter.cfg = a->resources.pci.addr[4];
a->xdi_adapter.cfg += MP_IRQ_RESET;
a->dsp_mask = diva_pri_detect_dsps(a); a->dsp_mask = diva_pri_detect_dsps(a);
/* /*
...@@ -317,7 +333,7 @@ static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a) ...@@ -317,7 +333,7 @@ static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a)
static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
{ {
dword i; dword i;
struct mp_load *boot = (struct mp_load *) IoAdapter->Address; struct mp_load *boot;
if (!IoAdapter->Address || !IoAdapter->reset) { if (!IoAdapter->Address || !IoAdapter->reset) {
return (-1); return (-1);
...@@ -328,12 +344,20 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) ...@@ -328,12 +344,20 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
return (-1); return (-1);
} }
boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
WRITE_DWORD(&boot->err, 0); WRITE_DWORD(&boot->err, 0);
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
IoAdapter->rstFnc(IoAdapter); IoAdapter->rstFnc(IoAdapter);
diva_os_wait(10); diva_os_wait(10);
boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
i = READ_DWORD(&boot->live); i = READ_DWORD(&boot->live);
diva_os_wait(10); diva_os_wait(10);
if (i == READ_DWORD(&boot->live)) { if (i == READ_DWORD(&boot->live)) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!", DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!",
IoAdapter->ANum, IoAdapter->serialNo)) IoAdapter->ANum, IoAdapter->serialNo))
return (-1); return (-1);
...@@ -342,8 +366,10 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter) ...@@ -342,8 +366,10 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx", DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx",
IoAdapter->ANum, IoAdapter->serialNo, IoAdapter->ANum, IoAdapter->serialNo,
READ_DWORD(&boot->err))) READ_DWORD(&boot->err)))
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
return (-1); return (-1);
} }
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
/* /*
Forget all outstanding entities Forget all outstanding entities
...@@ -383,9 +409,11 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -383,9 +409,11 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address, dword address,
const byte * data, dword length, dword limit) const byte * data, dword length, dword limit)
{ {
byte *mem = IoAdapter->Address; byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte *mem = p;
if (((address + length) >= limit) || !mem) { if (((address + length) >= limit) || !mem) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
DBG_ERR(("A: A(%d) write PRI address=0x%08lx", DBG_ERR(("A: A(%d) write PRI address=0x%08lx",
IoAdapter->ANum, address + length)) IoAdapter->ANum, address + length))
return (-1); return (-1);
...@@ -396,6 +424,7 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter, ...@@ -396,6 +424,7 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
*mem++ = *data++; *mem++ = *data++;
} }
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
return (0); return (0);
} }
...@@ -405,15 +434,18 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -405,15 +434,18 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
{ {
dword i; dword i;
int started = 0; int started = 0;
struct mp_load *boot = (struct mp_load *) IoAdapter->Address; byte *p;
struct mp_load *boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
ADAPTER *a = &IoAdapter->a; ADAPTER *a = &IoAdapter->a;
if (IoAdapter->Initialized) { if (IoAdapter->Initialized) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running", DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running",
IoAdapter->ANum)) IoAdapter->ANum))
return (-1); return (-1);
} }
if (!boot) { if (!boot) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
DBG_ERR(("A: PRI %ld can't start, adapter not mapped", DBG_ERR(("A: PRI %ld can't start, adapter not mapped",
IoAdapter->serialNo)) IoAdapter->serialNo))
return (-1); return (-1);
...@@ -437,17 +469,22 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -437,17 +469,22 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
} }
if (!started) { if (!started) {
dword TrapId = READ_DWORD(&IoAdapter->Address[0x80]); byte *p = (byte *)boot;
dword debug = READ_DWORD(&IoAdapter->Address[0x1c]); dword TrapId;
dword debug;
TrapId = READ_DWORD(&p[0x80]);
debug = READ_DWORD(&p[0x1c]);
DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx", DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx",
IoAdapter->ANum, READ_DWORD(&boot->signature), IoAdapter->ANum, READ_DWORD(&boot->signature),
TrapId, debug)) TrapId, debug))
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
if (IoAdapter->trapFnc) { if (IoAdapter->trapFnc) {
(*(IoAdapter->trapFnc)) (IoAdapter); (*(IoAdapter->trapFnc)) (IoAdapter);
} }
IoAdapter->stop(IoAdapter); IoAdapter->stop(IoAdapter);
return (-1); return (-1);
} }
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
IoAdapter->Initialized = TRUE; IoAdapter->Initialized = TRUE;
...@@ -455,8 +492,9 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, ...@@ -455,8 +492,9 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
Check Interrupt Check Interrupt
*/ */
IoAdapter->IrqCount = 0; IoAdapter->IrqCount = 0;
WRITE_DWORD(((dword volatile *) IoAdapter->cfg), p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
(dword) ~ 0x03E00000); WRITE_DWORD(((dword volatile *) p), (dword) ~ 0x03E00000);
DIVA_OS_MEM_DETACH_CFG(IoAdapter, p);
a->ReadyInt = 1; a->ReadyInt = 1;
a->ram_out(a, &PR_RAM->ReadyInt, 1); a->ram_out(a, &PR_RAM->ReadyInt, 1);
...@@ -658,7 +696,8 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, ...@@ -658,7 +696,8 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
diva_os_malloc(0, a->xdi_mbox.data_length); diva_os_malloc(0, a->xdi_mbox.data_length);
if (a->xdi_mbox.data) { if (a->xdi_mbox.data) {
dword *data = (dword *) a->xdi_mbox.data; dword *data = (dword *) a->xdi_mbox.data;
if (!a->xdi_adapter.ram || !a->xdi_adapter.reset || if (!a->xdi_adapter.ram ||
!a->xdi_adapter.reset ||
!a->xdi_adapter.cfg) { !a->xdi_adapter.cfg) {
*data = 3; *data = 3;
} else if (a->xdi_adapter.trapped) { } else if (a->xdi_adapter.trapped) {
...@@ -691,23 +730,18 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a, ...@@ -691,23 +730,18 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
a->xdi_mbox. a->xdi_mbox.
data_length); data_length);
if (a->xdi_mbox.data) { if (a->xdi_mbox.data) {
byte *src = byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
a->xdi_adapter.Address; byte *src = p;
byte *dst = byte *dst = a->xdi_mbox.data;
a->xdi_mbox.data; dword len = a->xdi_mbox.data_length;
dword len =
a->xdi_mbox. src += cmd->command_data.read_sdram.offset;
data_length;
src +=
cmd->command_data.
read_sdram.offset;
while (len--) { while (len--) {
*dst++ = *src++; *dst++ = *src++;
} }
a->xdi_mbox.status = a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
DIVA_XDI_MBOX_BUSY; DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
ret = 0; ret = 0;
} }
} }
...@@ -731,27 +765,33 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a) ...@@ -731,27 +765,33 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
byte data[64]; byte data[64];
int i; int i;
dword len = sizeof(data); dword len = sizeof(data);
volatile byte *config = (byte *) a->resources.pci.addr[4]; volatile byte *config;
volatile byte *flash = (byte *) a->resources.pci.addr[3]; volatile byte *flash;
/* /*
* First set some GT6401x config registers before accessing the BOOT-ROM * First set some GT6401x config registers before accessing the BOOT-ROM
*/ */
config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
if (!(config[0xc3c] & 0x08)) { if (!(config[0xc3c] & 0x08)) {
config[0xc3c] |= 0x08; /* Base Address enable register */ config[0xc3c] |= 0x08; /* Base Address enable register */
} }
config[LOW_BOOTCS_DREG] = 0x00; config[LOW_BOOTCS_DREG] = 0x00;
config[HI_BOOTCS_DREG] = 0xFF; config[HI_BOOTCS_DREG] = 0xFF;
DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
/* /*
* Read only the last 64 bytes of manufacturing data * Read only the last 64 bytes of manufacturing data
*/ */
memset(data, '\0', len); memset(data, '\0', len);
flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
data[i] = flash[0x8000 - len + i]; data[i] = flash[0x8000 - len + i];
} }
DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash);
config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
config[LOW_BOOTCS_DREG] = 0xFC; /* Disable FLASH EPROM access */ config[LOW_BOOTCS_DREG] = 0xFC; /* Disable FLASH EPROM access */
config[HI_BOOTCS_DREG] = 0xFF; config[HI_BOOTCS_DREG] = 0xFF;
DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
if (memcmp(&data[48], "DIVAserverPR", 12)) { if (memcmp(&data[48], "DIVAserverPR", 12)) {
#if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */ #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */
...@@ -791,22 +831,26 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a) ...@@ -791,22 +831,26 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
/* /*
Try to read Flash again Try to read Flash again
*/ */
config = (byte *) a->resources.pci.addr[4];
flash = (byte *) a->resources.pci.addr[3];
len = sizeof(data); len = sizeof(data);
config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
if (!(config[0xc3c] & 0x08)) { if (!(config[0xc3c] & 0x08)) {
config[0xc3c] |= 0x08; /* Base Address enable register */ config[0xc3c] |= 0x08; /* Base Address enable register */
} }
config[LOW_BOOTCS_DREG] = 0x00; config[LOW_BOOTCS_DREG] = 0x00;
config[HI_BOOTCS_DREG] = 0xFF; config[HI_BOOTCS_DREG] = 0xFF;
DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
memset(data, '\0', len); memset(data, '\0', len);
flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
data[i] = flash[0x8000 - len + i]; data[i] = flash[0x8000 - len + i];
} }
DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash);
config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
config[LOW_BOOTCS_DREG] = 0xFC; config[LOW_BOOTCS_DREG] = 0xFC;
config[HI_BOOTCS_DREG] = 0xFF; config[HI_BOOTCS_DREG] = 0xFF;
DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
if (memcmp(&data[48], "DIVAserverPR", 12)) { if (memcmp(&data[48], "DIVAserverPR", 12)) {
DBG_ERR(("A: failed to read serial number")) DBG_ERR(("A: failed to read serial number"))
...@@ -907,7 +951,8 @@ dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp) ...@@ -907,7 +951,8 @@ dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp)
*/ */
static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
{ {
byte *base = a->resources.pci.addr[2]; byte *base;
byte *p;
dword ret = 0; dword ret = 0;
dword row_offset[7] = { dword row_offset[7] = {
0x00000000, 0x00000000,
...@@ -921,14 +966,17 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) ...@@ -921,14 +966,17 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
byte *dsp_addr_port, *dsp_data_port, row_state; byte *dsp_addr_port, *dsp_data_port, row_state;
int dsp_row = 0, dsp_index, dsp_num; int dsp_row = 0, dsp_index, dsp_num;
if (!base || !a->xdi_adapter.reset) { if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) {
return (0); return (0);
} }
*(volatile byte *) (a->xdi_adapter.reset) = p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
_MP_RISC_RESET | _MP_DSP_RESET; *(volatile byte *) p = _MP_RISC_RESET | _MP_DSP_RESET;
DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
diva_os_wait(5); diva_os_wait(5);
base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter);
for (dsp_num = 0; dsp_num < 30; dsp_num++) { for (dsp_num = 0; dsp_num < 30; dsp_num++) {
dsp_row = dsp_num / 7 + 1; dsp_row = dsp_num / 7 + 1;
dsp_index = dsp_num % 7; dsp_index = dsp_num % 7;
...@@ -947,9 +995,11 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a) ...@@ -947,9 +995,11 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
ret |= (1 << dsp_num); ret |= (1 << dsp_num);
} }
} }
DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base);
*(volatile byte *) (a->xdi_adapter.reset) = p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
_MP_RISC_RESET | _MP_LED1 | _MP_LED2; *(volatile byte *) p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
diva_os_wait(5); diva_os_wait(5);
/* /*
......
drivers/isdn/hardware/eicon/platform.h
View file @ c6a2a080
...@@ -106,6 +106,36 @@ ...@@ -106,6 +106,36 @@
#define _cdecl #define _cdecl
#endif #endif
#define MEM_TYPE_RAM 0
#define MEM_TYPE_PORT 1
#define MEM_TYPE_PROM 2
#define MEM_TYPE_CTLREG 3
#define MEM_TYPE_RESET 4
#define MEM_TYPE_CFG 5
#define MEM_TYPE_ADDRESS 6
#define MEM_TYPE_CONFIG 7
#define MEM_TYPE_CONTROL 8
#define DIVA_OS_MEM_ATTACH_RAM(a) ((a)->ram)
#define DIVA_OS_MEM_ATTACH_PORT(a) ((a)->port)
#define DIVA_OS_MEM_ATTACH_PROM(a) ((a)->prom)
#define DIVA_OS_MEM_ATTACH_CTLREG(a) ((a)->ctlReg)
#define DIVA_OS_MEM_ATTACH_RESET(a) ((a)->reset)
#define DIVA_OS_MEM_ATTACH_CFG(a) ((a)->cfg)
#define DIVA_OS_MEM_ATTACH_ADDRESS(a) ((a)->Address)
#define DIVA_OS_MEM_ATTACH_CONFIG(a) ((a)->Config)
#define DIVA_OS_MEM_ATTACH_CONTROL(a) ((a)->Control)
#define DIVA_OS_MEM_DETACH_RAM(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_PORT(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_PROM(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_CTLREG(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_RESET(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_CFG(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_ADDRESS(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_CONFIG(a, x) do { } while(0)
#define DIVA_OS_MEM_DETACH_CONTROL(a, x) do { } while(0)
#if !defined(DIM) #if !defined(DIM)
#define DIM(array) (sizeof (array)/sizeof ((array)[0])) #define DIM(array) (sizeof (array)/sizeof ((array)[0]))
#endif #endif
......
drivers/isdn/hardware/eicon/s_4bri.c
View file @ c6a2a080
...@@ -55,8 +55,8 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -55,8 +55,8 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
* check for trapped MIPS 46xx CPU, dump exception frame * check for trapped MIPS 46xx CPU, dump exception frame
*/ */
base = DIVA_OS_MEM_ATTACH_CONTROL(IoAdapter);
offset = IoAdapter->ControllerNumber * (IoAdapter->MemorySize >> factor) ; offset = IoAdapter->ControllerNumber * (IoAdapter->MemorySize >> factor) ;
base = IoAdapter->ram - offset - ((IoAdapter->MemorySize >> factor) - MQ_SHARED_RAM_SIZE) ;
TrapID = READ_DWORD(&base[0x80]) ; TrapID = READ_DWORD(&base[0x80]) ;
...@@ -75,8 +75,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -75,8 +75,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
if ( (regs[0] >= offset) if ( (regs[0] >= offset)
&& (regs[0] < offset + (IoAdapter->MemorySize >> factor) - 1) ) && (regs[0] < offset + (IoAdapter->MemorySize >> factor) - 1) )
{ {
if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) {
DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base);
return ; return ;
}
size = offset + (IoAdapter->MemorySize >> factor) - regs[0] ; size = offset + (IoAdapter->MemorySize >> factor) - regs[0] ;
if ( size > MAX_XLOG_SIZE ) if ( size > MAX_XLOG_SIZE )
...@@ -89,7 +91,7 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -89,7 +91,7 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
diva_os_free (0, Xlog) ; diva_os_free (0, Xlog) ;
IoAdapter->trapped = 2 ; IoAdapter->trapped = 2 ;
} }
DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base);
} }
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
...@@ -97,10 +99,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -97,10 +99,10 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) { static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) {
word volatile *qBriReset ; word volatile *qBriReset ;
dword volatile *qBriCntrl ; byte volatile *qBriCntrl ;
byte volatile *p ;
qBriReset = (word volatile *)IoAdapter->prom ; qBriReset = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
qBriCntrl = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]);
WRITE_WORD(qBriReset, READ_WORD(qBriReset) | PLX9054_SOFT_RESET) ; WRITE_WORD(qBriReset, READ_WORD(qBriReset) | PLX9054_SOFT_RESET) ;
diva_os_wait (1) ; diva_os_wait (1) ;
WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_SOFT_RESET) ; WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_SOFT_RESET) ;
...@@ -109,34 +111,40 @@ static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -109,34 +111,40 @@ static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) {
diva_os_wait (1) ; diva_os_wait (1) ;
WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_RELOAD_EEPROM) ; WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_RELOAD_EEPROM) ;
diva_os_wait (1); diva_os_wait (1);
DIVA_OS_MEM_DETACH_PROM(IoAdapter, qBriReset);
WRITE_DWORD(qBriCntrl, 0) ; qBriCntrl = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
p = &qBriCntrl[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)];
WRITE_DWORD(p, 0) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, qBriCntrl);
DBG_TRC(("resetted board @ reset addr 0x%08lx", qBriReset)) DBG_TRC(("resetted board @ reset addr 0x%08lx", qBriReset))
DBG_TRC(("resetted board @ cntrl addr 0x%08lx", qBriCntrl)) DBG_TRC(("resetted board @ cntrl addr 0x%08lx", p))
} }
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
Start Card CPU Start Card CPU
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
void start_qBri_hardware (PISDN_ADAPTER IoAdapter) { void start_qBri_hardware (PISDN_ADAPTER IoAdapter) {
dword volatile *qBriReset ; byte volatile *qBriReset ;
byte volatile *p ;
qBriReset = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)]); p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriReset = &p[(DIVA_4BRI_REVISION(IoAdapter)) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)];
WRITE_DWORD(qBriReset, MQ_RISC_COLD_RESET_MASK) ; WRITE_DWORD(qBriReset, MQ_RISC_COLD_RESET_MASK) ;
diva_os_wait (2) ; diva_os_wait (2) ;
WRITE_DWORD(qBriReset, MQ_RISC_WARM_RESET_MASK | MQ_RISC_COLD_RESET_MASK) ; WRITE_DWORD(qBriReset, MQ_RISC_WARM_RESET_MASK | MQ_RISC_COLD_RESET_MASK) ;
diva_os_wait (10) ; diva_os_wait (10) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
DBG_TRC(("started processor @ addr 0x%08lx", qBriReset)) DBG_TRC(("started processor @ addr 0x%08lx", qBriReset))
} }
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
Stop Card CPU Stop Card CPU
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) { static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
byte volatile *p ;
dword volatile *qBriReset ; dword volatile *qBriReset ;
dword volatile *qBriIrq ; dword volatile *qBriIrq ;
dword volatile *qBriIsacDspReset ; dword volatile *qBriIsacDspReset ;
...@@ -147,16 +155,24 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -147,16 +155,24 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
if ( IoAdapter->ControllerNumber > 0 ) if ( IoAdapter->ControllerNumber > 0 )
return ; return ;
qBriReset = (dword volatile *)(&IoAdapter->ctlReg[reset_offset]) ; p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[irq_offset]) ; qBriReset = (dword volatile *)&p[reset_offset];
qBriIsacDspReset = (dword volatile *)(&IoAdapter->ctlReg[hw_offset]); qBriIsacDspReset = (dword volatile *)&p[hw_offset];
/* /*
* clear interrupt line (reset Local Interrupt Test Register) * clear interrupt line (reset Local Interrupt Test Register)
*/ */
WRITE_DWORD(qBriReset, 0) ; WRITE_DWORD(qBriReset, 0) ;
WRITE_DWORD(qBriIsacDspReset, 0) ; WRITE_DWORD(qBriIsacDspReset, 0) ;
IoAdapter->reset[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
p = (byte volatile *)DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)&p[irq_offset];
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
DBG_TRC(("stopped processor @ addr 0x%08lx", qBriReset)) DBG_TRC(("stopped processor @ addr 0x%08lx", qBriReset))
...@@ -260,7 +276,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { ...@@ -260,7 +276,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
int bit ; int bit ;
byte *File ; byte *File ;
dword code, FileLength ; dword code, FileLength ;
word volatile *addr = (word volatile *)IoAdapter->prom ; word volatile *addr = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
word val, baseval = FPGA_CS | FPGA_PROG ; word val, baseval = FPGA_CS | FPGA_PROG ;
...@@ -291,8 +307,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { ...@@ -291,8 +307,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
File = qBri_check_FPGAsrc (IoAdapter, "ds4bri.bit", File = qBri_check_FPGAsrc (IoAdapter, "ds4bri.bit",
&FileLength, &code) ; &FileLength, &code) ;
} }
if ( !File ) if ( !File ) {
DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr);
return (0) ; return (0) ;
}
/* /*
* prepare download, pulse PROGRAM pin down. * prepare download, pulse PROGRAM pin down.
*/ */
...@@ -306,6 +324,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { ...@@ -306,6 +324,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
{ {
DBG_FTL(("FPGA download: acknowledge for FPGA memory clear missing")) DBG_FTL(("FPGA download: acknowledge for FPGA memory clear missing"))
xdiFreeFile (File) ; xdiFreeFile (File) ;
DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr);
return (0) ; return (0) ;
} }
/* /*
...@@ -329,6 +348,8 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { ...@@ -329,6 +348,8 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
diva_os_wait (100) ; diva_os_wait (100) ;
val = READ_WORD(addr) ; val = READ_WORD(addr) ;
DIVA_OS_MEM_DETACH_PROM(IoAdapter, addr);
if ( !(val & FPGA_BUSY) ) if ( !(val & FPGA_BUSY) )
{ {
DBG_FTL(("FPGA download: chip remains in busy state (0x%04x)", val)) DBG_FTL(("FPGA download: chip remains in busy state (0x%04x)", val))
...@@ -343,12 +364,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) { ...@@ -343,12 +364,10 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
Download protocol code to the adapter Download protocol code to the adapter
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
#define DOWNLOAD_ADDR(IoAdapter) (&IoAdapter->ram[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)])
static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdapter) { static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdapter) {
PISDN_ADAPTER HighIoAdapter; PISDN_ADAPTER HighIoAdapter;
byte *p;
dword FileLength ; dword FileLength ;
dword *sharedRam, *File; dword *sharedRam, *File;
dword Addr, ProtOffset, SharedRamOffset, i; dword Addr, ProtOffset, SharedRamOffset, i;
...@@ -436,7 +455,8 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap ...@@ -436,7 +455,8 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap
return (0) ; return (0) ;
} }
IoAdapter->downloadAddr = 0 ; IoAdapter->downloadAddr = 0 ;
sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
sharedRam = (dword *)&p[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)];
memcpy (sharedRam, File, FileLength) ; memcpy (sharedRam, File, FileLength) ;
DBG_TRC(("Download addr 0x%08x len %ld - virtual 0x%08x", DBG_TRC(("Download addr 0x%08x len %ld - virtual 0x%08x",
...@@ -449,10 +469,12 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap ...@@ -449,10 +469,12 @@ static int qBri_protocol_load (PISDN_ADAPTER BaseIoAdapter, PISDN_ADAPTER IoAdap
DBG_FTL(("File=0x%x, sharedRam=0x%x", File, sharedRam)) DBG_FTL(("File=0x%x, sharedRam=0x%x", File, sharedRam))
DBG_BLK(( (char *)File, 256)) DBG_BLK(( (char *)File, 256))
DBG_BLK(( (char *)sharedRam, 256)) DBG_BLK(( (char *)sharedRam, 256))
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
xdiFreeFile (File) ; xdiFreeFile (File) ;
return (0) ; return (0) ;
} }
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
xdiFreeFile (File) ; xdiFreeFile (File) ;
return (1) ; return (1) ;
...@@ -466,6 +488,7 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) { ...@@ -466,6 +488,7 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) {
PISDN_ADAPTER IoAdapter; PISDN_ADAPTER IoAdapter;
word i ; word i ;
dword *sharedRam ; dword *sharedRam ;
byte *p;
i = 0 ; i = 0 ;
...@@ -485,12 +508,14 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) { ...@@ -485,12 +508,14 @@ static long qBri_download_buffer (OsFileHandle *fp, long length, void **addr) {
IoAdapter->downloadAddr + length)) IoAdapter->downloadAddr + length))
return (-1) ; return (-1) ;
} }
sharedRam = (dword*)(&BaseIoAdapter->ram[IoAdapter->downloadAddr & p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter);
(IoAdapter->MemorySize - 1)]) ; sharedRam = (dword*)&p[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)];
if ( fp->sysFileRead (fp, sharedRam, length) != length ) if ( fp->sysFileRead (fp, sharedRam, length) != length ) {
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
return (-1) ; return (-1) ;
}
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
IoAdapter->downloadAddr += length ; IoAdapter->downloadAddr += length ;
IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ; IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ;
...@@ -509,6 +534,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { ...@@ -509,6 +534,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) {
word download_count, i ; word download_count, i ;
dword *sharedRam ; dword *sharedRam ;
dword FileLength ; dword FileLength ;
byte *p;
if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) ) { if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) ) {
DBG_FTL(("qBri_telindus_load: %s not found!", DSP_TELINDUS_FILE)) DBG_FTL(("qBri_telindus_load: %s not found!", DSP_TELINDUS_FILE))
...@@ -553,8 +579,8 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { ...@@ -553,8 +579,8 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) {
* store # of download files extracted from the archive and download table * store # of download files extracted from the archive and download table
*/ */
HighIoAdapter->downloadAddr = HighIoAdapter->DspCodeBaseAddr ; HighIoAdapter->downloadAddr = HighIoAdapter->DspCodeBaseAddr ;
sharedRam = (dword *)(&BaseIoAdapter->ram[HighIoAdapter->downloadAddr & p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter);
(IoAdapter->MemorySize - 1)]) ; sharedRam = (dword *)&p[HighIoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)];
WRITE_DWORD(&(sharedRam[0]), (dword)download_count); WRITE_DWORD(&(sharedRam[0]), (dword)download_count);
memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ; memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ;
...@@ -563,6 +589,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) { ...@@ -563,6 +589,7 @@ static dword qBri_telindus_load (PISDN_ADAPTER BaseIoAdapter) {
if ( memcmp (&sharedRam[1], &download_table, download_count) ) { if ( memcmp (&sharedRam[1], &download_table, download_count) ) {
DBG_FTL(("%s: Dsp Memory test failed!", IoAdapter->Properties.Name)) DBG_FTL(("%s: Dsp Memory test failed!", IoAdapter->Properties.Name))
} }
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
return (FileLength) ; return (FileLength) ;
} }
...@@ -588,6 +615,7 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, ...@@ -588,6 +615,7 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter,
dword phys_start_addr; dword phys_start_addr;
dword end_addr; dword end_addr;
byte* sharedRam = 0; byte* sharedRam = 0;
byte *p;
if (task) { if (task) {
if (!(fp = OsOpenFile (task))) { if (!(fp = OsOpenFile (task))) {
...@@ -657,18 +685,22 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, ...@@ -657,18 +685,22 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter,
} }
fp->sysFileSeek (fp, 0, OS_SEEK_SET); fp->sysFileSeek (fp, 0, OS_SEEK_SET);
sharedRam = &BaseIoAdapter->ram[phys_start_addr]; p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter);
sharedRam = &p[phys_start_addr];
if ((dword)fp->sysFileRead (fp, sharedRam, FileLength) != FileLength) { if ((dword)fp->sysFileRead (fp, sharedRam, FileLength) != FileLength) {
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
OsCloseFile (fp) ; OsCloseFile (fp) ;
DBG_ERR(("Can't read image [%s]", task)) DBG_ERR(("Can't read image [%s]", task))
return (0); return (0);
} }
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
OsCloseFile (fp) ; OsCloseFile (fp) ;
} }
p = DIVA_OS_MEM_ATTACH_RAM(BaseIoAdapter);
if (!link_addr) { if (!link_addr) {
link_addr = &BaseIoAdapter->ram[OFFS_DSP_CODE_BASE_ADDR]; link_addr = &p[OFFS_DSP_CODE_BASE_ADDR];
} }
DBG_TRC(("Write task [%s] link %08lx at %08lx", DBG_TRC(("Write task [%s] link %08lx at %08lx",
...@@ -681,6 +713,8 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter, ...@@ -681,6 +713,8 @@ static byte* qBri_sdp_load (PISDN_ADAPTER BaseIoAdapter,
link_addr[2] = (byte)((start_addr >> 16) & 0xff); link_addr[2] = (byte)((start_addr >> 16) & 0xff);
link_addr[3] = (byte)((start_addr >> 24) & 0xff); link_addr[3] = (byte)((start_addr >> 24) & 0xff);
DIVA_OS_MEM_DETACH_RAM(BaseIoAdapter, p);
return (task ? &sharedRam[DIVA_MIPS_TASK_IMAGE_LINK_OFFS] : 0); return (task ? &sharedRam[DIVA_MIPS_TASK_IMAGE_LINK_OFFS] : 0);
} }
...@@ -691,6 +725,7 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -691,6 +725,7 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
dword i, offset, controller ; dword i, offset, controller ;
word *signature ; word *signature ;
int factor = (IoAdapter->tasks == 1) ? 1 : 2; int factor = (IoAdapter->tasks == 1) ? 1 : 2;
byte *p;
PISDN_ADAPTER Slave ; PISDN_ADAPTER Slave ;
...@@ -751,7 +786,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -751,7 +786,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
Slave->reset = IoAdapter->reset ; Slave->reset = IoAdapter->reset ;
Slave->ctlReg = IoAdapter->ctlReg ; Slave->ctlReg = IoAdapter->ctlReg ;
Slave->prom = IoAdapter->prom ; Slave->prom = IoAdapter->prom ;
Slave->reset = IoAdapter->reset ; Slave->Config = IoAdapter->Config ;
Slave->Control = IoAdapter->Control ;
if ( !qBri_protocol_load (IoAdapter, Slave) ) if ( !qBri_protocol_load (IoAdapter, Slave) )
return (0) ; return (0) ;
...@@ -782,9 +818,11 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -782,9 +818,11 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
{ {
Slave = IoAdapter->QuadroList->QuadroAdapter[i] ; Slave = IoAdapter->QuadroList->QuadroAdapter[i] ;
Slave->ram += (IoAdapter->MemorySize >> factor) - MQ_SHARED_RAM_SIZE ; Slave->ram += (IoAdapter->MemorySize >> factor) - MQ_SHARED_RAM_SIZE ;
p = DIVA_OS_MEM_ATTACH_RAM(Slave);
DBG_TRC(("Configure instance %d shared memory @ 0x%08lx", DBG_TRC(("Configure instance %d shared memory @ 0x%08lx",
Slave->ControllerNumber, Slave->ram)) Slave->ControllerNumber, p))
memset (Slave->ram, '\0', 256) ; memset (p, '\0', 256) ;
DIVA_OS_MEM_DETACH_RAM(Slave, p);
diva_configure_protocol (Slave); diva_configure_protocol (Slave);
} }
...@@ -792,7 +830,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -792,7 +830,8 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
* start adapter * start adapter
*/ */
start_qBri_hardware (IoAdapter) ; start_qBri_hardware (IoAdapter) ;
signature = (word *)(&IoAdapter->ram[0x1E]) ; p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
signature = (word *)(&p[0x1E]) ;
/* /*
* wait for signature in shared memory (max. 3 seconds) * wait for signature in shared memory (max. 3 seconds)
*/ */
...@@ -802,12 +841,14 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -802,12 +841,14 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
if ( signature[0] == 0x4447 ) if ( signature[0] == 0x4447 )
{ {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
DBG_TRC(("Protocol startup time %d.%02d seconds", DBG_TRC(("Protocol startup time %d.%02d seconds",
(i / 100), (i % 100) )) (i / 100), (i % 100) ))
return (1) ; return (1) ;
} }
} }
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", DBG_FTL(("%s: Adapter selftest failed (0x%04X)!",
IoAdapter->Properties.Name, signature[0] >> 16)) IoAdapter->Properties.Name, signature[0] >> 16))
qBri_cpu_trapped (IoAdapter) ; qBri_cpu_trapped (IoAdapter) ;
...@@ -829,16 +870,23 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) { ...@@ -829,16 +870,23 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
word i ; word i ;
int serviced = 0 ; int serviced = 0 ;
byte *p;
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
if ( !(IoAdapter->reset[PLX9054_INTCSR] & 0x80) ) if ( !(p[PLX9054_INTCSR] & 0x80) ) {
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
return (0) ; return (0) ;
}
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
/* /*
* clear interrupt line (reset Local Interrupt Test Register) * clear interrupt line (reset Local Interrupt Test Register)
*/ */
qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]); p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
for ( i = 0 ; i < IoAdapter->tasks; ++i ) for ( i = 0 ; i < IoAdapter->tasks; ++i )
{ {
...@@ -861,15 +909,21 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) { ...@@ -861,15 +909,21 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) { static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) {
dword volatile *qBriIrq ; dword volatile *qBriIrq ;
byte *p;
if ( IoAdapter->ControllerNumber > 0 ) if ( IoAdapter->ControllerNumber > 0 )
return ; return ;
qBriIrq = (dword volatile *)(&IoAdapter->ctlReg[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
/* /*
* clear interrupt line (reset Local Interrupt Test Register) * clear interrupt line (reset Local Interrupt Test Register)
*/ */
IoAdapter->reset[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */ p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ; WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
} }
/* -------------------------------------------------------------------------- /* --------------------------------------------------------------------------
......
drivers/isdn/hardware/eicon/s_bri.c
View file @ c6a2a080
...@@ -45,15 +45,16 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -45,15 +45,16 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
word *Xlog ; word *Xlog ;
dword regs[4], i, size ; dword regs[4], i, size ;
Xdesc xlogDesc ; Xdesc xlogDesc ;
byte *Port;
/* /*
* first read pointers and trap frame * first read pointers and trap frame
*/ */
if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) )
return ; return ;
addrHi = IoAdapter->port Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
+ ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ;
addrLo = IoAdapter->port + ADDR ; addrLo = Port + ADDR ;
ioaddr = IoAdapter->port + DATA ; ioaddr = Port + DATA ;
outpp (addrHi, 0) ; outpp (addrHi, 0) ;
outppw (addrLo, 0) ; outppw (addrLo, 0) ;
for ( i = 0 ; i < 0x100 ; Xlog[i++] = inppw(ioaddr) ) ; for ( i = 0 ; i < 0x100 ; Xlog[i++] = inppw(ioaddr) ) ;
...@@ -95,21 +96,28 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -95,21 +96,28 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
outpp (addrHi, (byte)((BRI_UNCACHED_ADDR (IoAdapter->MemoryBase + IoAdapter->MemorySize - outpp (addrHi, (byte)((BRI_UNCACHED_ADDR (IoAdapter->MemoryBase + IoAdapter->MemorySize -
BRI_SHARED_RAM_SIZE)) >> 16)) ; BRI_SHARED_RAM_SIZE)) >> 16)) ;
outppw (addrLo, 0x00) ; outppw (addrLo, 0x00) ;
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
} }
/* --------------------------------------------------------------------- /* ---------------------------------------------------------------------
Reset hardware Reset hardware
--------------------------------------------------------------------- */ --------------------------------------------------------------------- */
static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) { static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) {
outpp (IoAdapter->ctlReg, 0x00) ; byte *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp (p, 0x00) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
} }
/* --------------------------------------------------------------------- /* ---------------------------------------------------------------------
Halt system Halt system
--------------------------------------------------------------------- */ --------------------------------------------------------------------- */
static void stop_bri_hardware (PISDN_ADAPTER IoAdapter) { static void stop_bri_hardware (PISDN_ADAPTER IoAdapter) {
if (IoAdapter->reset) { byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
outpp (IoAdapter->reset, 0x00) ; /* disable interrupts ! */ if (p) {
outpp (p, 0x00) ; /* disable interrupts ! */
} }
outpp (IoAdapter->ctlReg, 0x00) ; /* clear int, halt cpu */ DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp (p, 0x00) ; /* clear int, halt cpu */
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
} }
#if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */ #if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */
/* --------------------------------------------------------------------- /* ---------------------------------------------------------------------
...@@ -121,6 +129,7 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { ...@@ -121,6 +129,7 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) {
byte* addrHi, *addrLo, *ioaddr ; byte* addrHi, *addrLo, *ioaddr ;
char *FileName = &IoAdapter->Protocol[0] ; char *FileName = &IoAdapter->Protocol[0] ;
dword Addr, i ; dword Addr, i ;
byte *Port;
/* ------------------------------------------------------------------- /* -------------------------------------------------------------------
Try to load protocol code. 'File' points to memory location Try to load protocol code. 'File' points to memory location
that does contain entire protocol code that does contain entire protocol code
...@@ -173,10 +182,10 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { ...@@ -173,10 +182,10 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) {
DBG_FTL(("Protocol code '%s' too big (%ld)", FileName, FileLength)) DBG_FTL(("Protocol code '%s' too big (%ld)", FileName, FileLength))
return (0) ; return (0) ;
} }
addrHi = IoAdapter->port Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
+ ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ; addrHi = Port + ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH) ;
addrLo = IoAdapter->port + ADDR ; addrLo = Port + ADDR ;
ioaddr = IoAdapter->port + DATA ; ioaddr = Port + DATA ;
/* /*
* set start address for download (use autoincrement mode !) * set start address for download (use autoincrement mode !)
*/ */
...@@ -204,12 +213,14 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) { ...@@ -204,12 +213,14 @@ static dword bri_protocol_load (PISDN_ADAPTER IoAdapter) {
test = inppw (ioaddr) ; test = inppw (ioaddr) ;
if ( test != File[i/2] ) if ( test != File[i/2] )
{ {
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
DBG_FTL(("%s: Memory test failed! (%d - 0x%04X/0x%04X)", DBG_FTL(("%s: Memory test failed! (%d - 0x%04X/0x%04X)",
IoAdapter->Properties.Name, i, test, File[i/2])) IoAdapter->Properties.Name, i, test, File[i/2]))
xdiFreeFile (File); xdiFreeFile (File);
return (0) ; return (0) ;
} }
} }
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
xdiFreeFile (File); xdiFreeFile (File);
return (FileLength) ; return (FileLength) ;
} }
...@@ -290,6 +301,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) ...@@ -290,6 +301,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile)
t_dsp_portable_desc download_table[DSP_MAX_DOWNLOAD_COUNT] ; t_dsp_portable_desc download_table[DSP_MAX_DOWNLOAD_COUNT] ;
word download_count ; word download_count ;
dword FileLength ; dword FileLength ;
byte *Port;
if (!pinfo) { if (!pinfo) {
DBG_ERR (("A: out of memory s_bri at %d", __LINE__)) DBG_ERR (("A: out of memory s_bri at %d", __LINE__))
return (0); return (0);
...@@ -299,11 +311,11 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) ...@@ -299,11 +311,11 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile)
return (0) ; return (0) ;
} }
FileLength = fp->sysFileSize ; FileLength = fp->sysFileSize ;
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
pinfo->IoAdapter = IoAdapter ; pinfo->IoAdapter = IoAdapter ;
pinfo->AddrLo = IoAdapter->port + ADDR ; pinfo->AddrLo = Port + ADDR ;
pinfo->AddrHi = IoAdapter->port +\ pinfo->AddrHi = Port + (IoAdapter->Properties.Bus == BUS_PCI ? M_PCI_ADDRH : ADDRH);
(IoAdapter->Properties.Bus == BUS_PCI ? M_PCI_ADDRH : ADDRH); pinfo->Data = (word*)(Port + DATA) ;
pinfo->Data = (word*)(IoAdapter->port + DATA) ;
pinfo->DownloadPos = (IoAdapter->DspCodeBaseAddr +\ pinfo->DownloadPos = (IoAdapter->DspCodeBaseAddr +\
sizeof(dword) + sizeof(download_table) + 3) & (~3) ; sizeof(dword) + sizeof(download_table) + 3) & (~3) ;
fp->sysLoadDesc = (void *)pinfo; fp->sysLoadDesc = (void *)pinfo;
...@@ -317,6 +329,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) ...@@ -317,6 +329,7 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile)
&download_count, NULL, &download_table[0]) ; &download_count, NULL, &download_table[0]) ;
if ( error ) if ( error )
{ {
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
DBG_FTL(("download file error: %s", error)) DBG_FTL(("download file error: %s", error))
OsCloseFile (fp) ; OsCloseFile (fp) ;
diva_os_free (0, pinfo); diva_os_free (0, pinfo);
...@@ -335,23 +348,25 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile) ...@@ -335,23 +348,25 @@ static dword bri_telindus_load (PISDN_ADAPTER IoAdapter, char *DspTelindusFile)
* copy download table to board * copy download table to board
*/ */
outppw_buffer (pinfo->Data, &download_table[0], sizeof(download_table)) ; outppw_buffer (pinfo->Data, &download_table[0], sizeof(download_table)) ;
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
diva_os_free (0, pinfo); diva_os_free (0, pinfo);
return (FileLength) ; return (FileLength) ;
} }
/******************************************************************************/ /******************************************************************************/
static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
dword i ; dword i ;
byte* addrHi, *addrLo, *ioaddr ; byte* addrHi, *addrLo, *ioaddr, *p ;
dword test ; dword test ;
byte *Port;
if ( IoAdapter->Properties.Card != CARD_MAE ) if ( IoAdapter->Properties.Card != CARD_MAE )
{ {
return (FALSE) ; return (FALSE) ;
} }
addrHi = IoAdapter->port \
+ ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = IoAdapter->port + ADDR ;
ioaddr = IoAdapter->port + DATA ;
reset_bri_hardware (IoAdapter) ; reset_bri_hardware (IoAdapter) ;
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = Port + ADDR ;
ioaddr = Port + DATA ;
diva_os_wait (100); diva_os_wait (100);
/* /*
* recover * recover
...@@ -366,6 +381,7 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -366,6 +381,7 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
IoAdapter->MemorySize - BRI_SHARED_RAM_SIZE)) >> 16)) ; IoAdapter->MemorySize - BRI_SHARED_RAM_SIZE)) >> 16)) ;
outppw (addrLo, 0) ; outppw (addrLo, 0) ;
for ( i = 0 ; i < 0x8000 ; outppw (ioaddr, 0), ++i ) ; for ( i = 0 ; i < 0x8000 ; outppw (ioaddr, 0), ++i ) ;
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
diva_os_wait (100) ; diva_os_wait (100) ;
/* /*
* download protocol and dsp files * download protocol and dsp files
...@@ -396,6 +412,11 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -396,6 +412,11 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
return (FALSE) ; return (FALSE) ;
break ; break ;
} }
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = Port + ADDR ;
ioaddr = Port + DATA ;
/* /*
* clear signature * clear signature
*/ */
...@@ -408,13 +429,20 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -408,13 +429,20 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
* copy parameters * copy parameters
*/ */
diva_configure_protocol (IoAdapter); diva_configure_protocol (IoAdapter);
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
/* /*
* start the protocol code * start the protocol code
*/ */
outpp (IoAdapter->ctlReg, 0x08) ; p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp (p, 0x08) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
/* /*
* wait for signature (max. 3 seconds) * wait for signature (max. 3 seconds)
*/ */
Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
addrHi = Port + ((IoAdapter->Properties.Bus==BUS_PCI) ? M_PCI_ADDRH : ADDRH);
addrLo = Port + ADDR ;
ioaddr = Port + DATA ;
for ( i = 0 ; i < 300 ; ++i ) for ( i = 0 ; i < 300 ; ++i )
{ {
diva_os_wait (10) ; diva_os_wait (10) ;
...@@ -424,11 +452,13 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -424,11 +452,13 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
test = (dword)inppw (ioaddr) ; test = (dword)inppw (ioaddr) ;
if ( test == 0x4447 ) if ( test == 0x4447 )
{ {
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
DBG_TRC(("Protocol startup time %d.%02d seconds", DBG_TRC(("Protocol startup time %d.%02d seconds",
(i / 100), (i % 100) )) (i / 100), (i % 100) ))
return (TRUE) ; return (TRUE) ;
} }
} }
DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", DBG_FTL(("%s: Adapter selftest failed (0x%04X)!",
IoAdapter->Properties.Name, test)) IoAdapter->Properties.Name, test))
bri_cpu_trapped (IoAdapter) ; bri_cpu_trapped (IoAdapter) ;
...@@ -441,12 +471,18 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -441,12 +471,18 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
#endif /* } */ #endif /* } */
/******************************************************************************/ /******************************************************************************/
static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) { static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
if ( !(inpp (IoAdapter->ctlReg) & 0x01) ) byte *p;
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
if ( !(inpp (p) & 0x01) ) {
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
return (0) ; return (0) ;
}
/* /*
clear interrupt line clear interrupt line
*/ */
outpp (IoAdapter->ctlReg, 0x08) ; outpp (p, 0x08) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
IoAdapter->IrqCount++ ; IoAdapter->IrqCount++ ;
if ( IoAdapter->Initialized ) { if ( IoAdapter->Initialized ) {
diva_os_schedule_soft_isr (&IoAdapter->isr_soft_isr); diva_os_schedule_soft_isr (&IoAdapter->isr_soft_isr);
...@@ -457,11 +493,16 @@ static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) { ...@@ -457,11 +493,16 @@ static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
Disable IRQ in the card hardware Disable IRQ in the card hardware
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
static void disable_bri_interrupt (PISDN_ADAPTER IoAdapter) { static void disable_bri_interrupt (PISDN_ADAPTER IoAdapter) {
if ( IoAdapter->reset ) byte *p;
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
if ( p )
{ {
outpp (IoAdapter->reset, 0x00) ; /* disable interrupts ! */ outpp (p, 0x00) ; /* disable interrupts ! */
} }
outpp (IoAdapter->ctlReg, 0x00) ; /* clear int, halt cpu */ DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp (p, 0x00) ; /* clear int, halt cpu */
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
Fill card entry points Fill card entry points
......
drivers/isdn/hardware/eicon/s_pri.c
View file @ c6a2a080
...@@ -54,7 +54,7 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -54,7 +54,7 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
/* /*
* check for trapped MIPS 46xx CPU, dump exception frame * check for trapped MIPS 46xx CPU, dump exception frame
*/ */
base = IoAdapter->ram - MP_SHARED_RAM_OFFSET ; base = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
TrapID = READ_DWORD(&base[0x80]) ; TrapID = READ_DWORD(&base[0x80]) ;
if ( (TrapID == 0x99999999) || (TrapID == 0x99999901) ) if ( (TrapID == 0x99999999) || (TrapID == 0x99999901) )
{ {
...@@ -68,8 +68,10 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -68,8 +68,10 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
regs[0] &= IoAdapter->MemorySize - 1 ; regs[0] &= IoAdapter->MemorySize - 1 ;
if ( (regs[0] < IoAdapter->MemorySize - 1) ) if ( (regs[0] < IoAdapter->MemorySize - 1) )
{ {
if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) if ( !(Xlog = (word *)diva_os_malloc (0, MAX_XLOG_SIZE)) ) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, base);
return ; return ;
}
size = IoAdapter->MemorySize - regs[0] ; size = IoAdapter->MemorySize - regs[0] ;
if ( size > MAX_XLOG_SIZE ) if ( size > MAX_XLOG_SIZE )
size = MAX_XLOG_SIZE ; size = MAX_XLOG_SIZE ;
...@@ -81,24 +83,29 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) { ...@@ -81,24 +83,29 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
diva_os_free (0, Xlog) ; diva_os_free (0, Xlog) ;
IoAdapter->trapped = 2 ; IoAdapter->trapped = 2 ;
} }
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, base);
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
Hardware reset of PRI card Hardware reset of PRI card
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) { static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) {
*IoAdapter->reset = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
*p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ;
diva_os_wait (50) ; diva_os_wait (50) ;
*IoAdapter->reset = 0x00 ; *p = 0x00 ;
diva_os_wait (50) ; diva_os_wait (50) ;
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
Stop Card Hardware Stop Card Hardware
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) { static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
dword i; dword i;
dword volatile *cfgReg = (dword volatile *)IoAdapter->cfg ; byte *p;
dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
cfgReg[3] = 0x00000000 ; cfgReg[3] = 0x00000000 ;
cfgReg[1] = 0x00000000 ; cfgReg[1] = 0x00000000 ;
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
IoAdapter->a.ram_out (&IoAdapter->a, &RAM->SWReg, SWREG_HALT_CPU) ; IoAdapter->a.ram_out (&IoAdapter->a, &RAM->SWReg, SWREG_HALT_CPU) ;
i = 0 ; i = 0 ;
while ( (i < 100) && (IoAdapter->a.ram_in (&IoAdapter->a, &RAM->SWReg) != 0) ) while ( (i < 100) && (IoAdapter->a.ram_in (&IoAdapter->a, &RAM->SWReg) != 0) )
...@@ -107,21 +114,25 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -107,21 +114,25 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
i++ ; i++ ;
} }
DBG_TRC(("%s: PRI stopped (%d)", IoAdapter->Name, i)) DBG_TRC(("%s: PRI stopped (%d)", IoAdapter->Name, i))
cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
WRITE_DWORD(&cfgReg[0],((dword)(~0x03E00000))); WRITE_DWORD(&cfgReg[0],((dword)(~0x03E00000)));
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
diva_os_wait (1) ; diva_os_wait (1) ;
*IoAdapter->reset = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ; p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
*p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ;
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
} }
#if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */ #if !defined(DIVA_USER_MODE_CARD_CONFIG) /* { */
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
Load protocol code to the PRI Card Load protocol code to the PRI Card
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
#define DOWNLOAD_ADDR(IoAdapter) \ #define DOWNLOAD_ADDR(IoAdapter) (IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1))
(&IoAdapter->ram[IoAdapter->downloadAddr & (IoAdapter->MemorySize - 1)])
static int pri_protocol_load (PISDN_ADAPTER IoAdapter) { static int pri_protocol_load (PISDN_ADAPTER IoAdapter) {
dword FileLength ; dword FileLength ;
dword *File ; dword *File ;
dword *sharedRam ; dword *sharedRam ;
dword Addr ; dword Addr ;
byte *p;
if (!(File = (dword *)xdiLoadArchive (IoAdapter, &FileLength, 0))) { if (!(File = (dword *)xdiLoadArchive (IoAdapter, &FileLength, 0))) {
return (0) ; return (0) ;
} }
...@@ -172,14 +183,17 @@ static int pri_protocol_load (PISDN_ADAPTER IoAdapter) { ...@@ -172,14 +183,17 @@ static int pri_protocol_load (PISDN_ADAPTER IoAdapter) {
return (0) ; return (0) ;
} }
IoAdapter->downloadAddr = MP_UNCACHED_ADDR (MP_PROTOCOL_OFFSET) ; IoAdapter->downloadAddr = MP_UNCACHED_ADDR (MP_PROTOCOL_OFFSET) ;
sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]);
memcpy (sharedRam, File, FileLength) ; memcpy (sharedRam, File, FileLength) ;
if ( memcmp (sharedRam, File, FileLength) ) if ( memcmp (sharedRam, File, FileLength) )
{ {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
DBG_FTL(("%s: Memory test failed!", IoAdapter->Properties.Name)) DBG_FTL(("%s: Memory test failed!", IoAdapter->Properties.Name))
xdiFreeFile (File); xdiFreeFile (File);
return (0) ; return (0) ;
} }
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
xdiFreeFile (File); xdiFreeFile (File);
return (1) ; return (1) ;
} }
...@@ -228,8 +242,8 @@ dsp_check_presence (volatile byte* addr, volatile byte* data, int dsp) ...@@ -228,8 +242,8 @@ dsp_check_presence (volatile byte* addr, volatile byte* data, int dsp)
static dword static dword
diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter)
{ {
/* byte* base = a->resources.pci.addr[2]; */ byte* base;
byte* base = IoAdapter->reset - MP_RESET ; byte* p;
dword ret = 0, DspCount = 0 ; dword ret = 0, DspCount = 0 ;
dword row_offset[] = { dword row_offset[] = {
0x00000000, 0x00000000,
...@@ -242,14 +256,18 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) ...@@ -242,14 +256,18 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter)
byte *dsp_addr_port, *dsp_data_port, row_state; byte *dsp_addr_port, *dsp_data_port, row_state;
int dsp_row = 0, dsp_index, dsp_num; int dsp_row = 0, dsp_index, dsp_num;
IoAdapter->InitialDspInfo &= 0xffff ; IoAdapter->InitialDspInfo &= 0xffff ;
/* if (!base || !a->xdi_adapter.reset) */ p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
if (!base || !IoAdapter->reset) if (!p)
{ {
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
return (0); return (0);
} }
/* *(volatile byte*)(a->xdi_adapter.reset) = _MP_RISC_RESET | _MP_DSP_RESET; */ *(volatile byte*)(p) = _MP_RISC_RESET | _MP_DSP_RESET;
*(volatile byte*)(IoAdapter->reset) = _MP_RISC_RESET | _MP_DSP_RESET; DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
diva_os_wait (5) ; diva_os_wait (5) ;
base = DIVA_OS_MEM_ATTACH_CONTROL(IoAdapter);
for (dsp_num = 0; dsp_num < 30; dsp_num++) { for (dsp_num = 0; dsp_num < 30; dsp_num++) {
dsp_row = dsp_num / 7 + 1; dsp_row = dsp_num / 7 + 1;
dsp_index = dsp_num % 7; dsp_index = dsp_num % 7;
...@@ -264,8 +282,10 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) ...@@ -264,8 +282,10 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter)
DspCount++ ; DspCount++ ;
} }
} }
/* *(volatile byte*)(a->xdi_adapter.reset) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2; */ DIVA_OS_MEM_DETACH_CONTROL(IoAdapter, base);
*(volatile byte*)(IoAdapter->reset) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
*(volatile byte*)(p) = _MP_RISC_RESET | _MP_LED1 | _MP_LED2;
diva_os_wait (50) ; diva_os_wait (50) ;
/* /*
Verify modules Verify modules
...@@ -301,7 +321,8 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) ...@@ -301,7 +321,8 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter)
((ret >> (3*7)) & 0x7F) ? "Y" : "N")) ((ret >> (3*7)) & 0x7F) ? "Y" : "N"))
DBG_LOG(("+-----------------------+")) DBG_LOG(("+-----------------------+"))
DBG_LOG(("DSP's(present-absent):%08x-%08x", ret, ~ret & 0x3fffffff)) DBG_LOG(("DSP's(present-absent):%08x-%08x", ret, ~ret & 0x3fffffff))
*(volatile byte*)(IoAdapter->reset) = 0 ; *(volatile byte*)(p) = 0 ;
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
diva_os_wait (50) ; diva_os_wait (50) ;
IoAdapter->InitialDspInfo |= DspCount << 16 ; IoAdapter->InitialDspInfo |= DspCount << 16 ;
return (ret); return (ret);
...@@ -312,6 +333,7 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter) ...@@ -312,6 +333,7 @@ diva_pri_detect_dsps (PISDN_ADAPTER IoAdapter)
static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) { static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) {
PISDN_ADAPTER IoAdapter = (PISDN_ADAPTER)fp->sysLoadDesc ; PISDN_ADAPTER IoAdapter = (PISDN_ADAPTER)fp->sysLoadDesc ;
dword *sharedRam ; dword *sharedRam ;
byte *p;
*addr = (void *)IoAdapter->downloadAddr ; *addr = (void *)IoAdapter->downloadAddr ;
if ( ((dword) length) > IoAdapter->DspCodeBaseAddr + if ( ((dword) length) > IoAdapter->DspCodeBaseAddr +
IoAdapter->MaxDspCodeSize - IoAdapter->downloadAddr ) IoAdapter->MaxDspCodeSize - IoAdapter->downloadAddr )
...@@ -321,11 +343,15 @@ static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) { ...@@ -321,11 +343,15 @@ static long pri_download_buffer (OsFileHandle *fp, long length, void **addr) {
IoAdapter->downloadAddr + length)) IoAdapter->downloadAddr + length))
return (-1) ; return (-1) ;
} }
sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
if ( fp->sysFileRead (fp, sharedRam, length) != length ) sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]);
if ( fp->sysFileRead (fp, sharedRam, length) != length ) {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
return (-1) ; return (-1) ;
}
IoAdapter->downloadAddr += length ; IoAdapter->downloadAddr += length ;
IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ; IoAdapter->downloadAddr = (IoAdapter->downloadAddr + 3) & (~3) ;
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
return (0) ; return (0) ;
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
...@@ -338,6 +364,7 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { ...@@ -338,6 +364,7 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) {
word download_count ; word download_count ;
dword *sharedRam ; dword *sharedRam ;
dword FileLength ; dword FileLength ;
byte *p;
if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) ) if ( !(fp = OsOpenFile (DSP_TELINDUS_FILE)) )
return (0) ; return (0) ;
IoAdapter->downloadAddr = (IoAdapter->DspCodeBaseAddr IoAdapter->downloadAddr = (IoAdapter->DspCodeBaseAddr
...@@ -363,9 +390,11 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { ...@@ -363,9 +390,11 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) {
* store # of separate download files extracted from archive * store # of separate download files extracted from archive
*/ */
IoAdapter->downloadAddr = IoAdapter->DspCodeBaseAddr ; IoAdapter->downloadAddr = IoAdapter->DspCodeBaseAddr ;
sharedRam = (dword *)DOWNLOAD_ADDR(IoAdapter) ; p = DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
sharedRam = (dword *)(&p[DOWNLOAD_ADDR(IoAdapter)]);
WRITE_DWORD(&(sharedRam[0]), (dword)download_count); WRITE_DWORD(&(sharedRam[0]), (dword)download_count);
memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ; memcpy (&sharedRam[1], &download_table[0], sizeof(download_table)) ;
DIVA_OS_MEM_DETACH_RAM(IoAdapter, p);
return (FileLength) ; return (FileLength) ;
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
...@@ -374,14 +403,17 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) { ...@@ -374,14 +403,17 @@ static dword pri_telindus_load (PISDN_ADAPTER IoAdapter) {
#define MIN_DSPS 0x30000000 #define MIN_DSPS 0x30000000
static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { static int load_pri_hardware (PISDN_ADAPTER IoAdapter) {
dword i ; dword i ;
struct mp_load *boot = (struct mp_load *)IoAdapter->ram ; struct mp_load *boot = (struct mp_load *)DIVA_OS_MEM_ATTACH_RAM(IoAdapter);
if ( IoAdapter->Properties.Card != CARD_MAEP ) if ( IoAdapter->Properties.Card != CARD_MAEP ) {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
return (0) ; return (0) ;
}
boot->err = 0 ; boot->err = 0 ;
#if 0 #if 0
IoAdapter->rstFnc (IoAdapter) ; IoAdapter->rstFnc (IoAdapter) ;
#else #else
if ( MIN_DSPS != (MIN_DSPS & diva_pri_detect_dsps(IoAdapter)) ) { /* makes reset */ if ( MIN_DSPS != (MIN_DSPS & diva_pri_detect_dsps(IoAdapter)) ) { /* makes reset */
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
DBG_FTL(("%s: DSP error!", IoAdapter->Properties.Name)) DBG_FTL(("%s: DSP error!", IoAdapter->Properties.Name))
return (0) ; return (0) ;
} }
...@@ -394,28 +426,36 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -394,28 +426,36 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) {
diva_os_wait (10) ; diva_os_wait (10) ;
if ( i == boot->live ) if ( i == boot->live )
{ {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
DBG_FTL(("%s: CPU is not alive!", IoAdapter->Properties.Name)) DBG_FTL(("%s: CPU is not alive!", IoAdapter->Properties.Name))
return (0) ; return (0) ;
} }
if ( boot->err ) if ( boot->err )
{ {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
DBG_FTL(("%s: Board Selftest failed!", IoAdapter->Properties.Name)) DBG_FTL(("%s: Board Selftest failed!", IoAdapter->Properties.Name))
return (0) ; return (0) ;
} }
/* /*
* download protocol and dsp files * download protocol and dsp files
*/ */
if ( !xdiSetProtocol (IoAdapter, IoAdapter->ProtocolSuffix) ) if ( !xdiSetProtocol (IoAdapter, IoAdapter->ProtocolSuffix) ) {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
return (0) ; return (0) ;
if ( !pri_protocol_load (IoAdapter) ) }
if ( !pri_protocol_load (IoAdapter) ) {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
return (0) ; return (0) ;
if ( !pri_telindus_load (IoAdapter) ) }
if ( !pri_telindus_load (IoAdapter) ) {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
return (0) ; return (0) ;
}
/* /*
* copy configuration parameters * copy configuration parameters
*/ */
IoAdapter->ram += MP_SHARED_RAM_OFFSET ; IoAdapter->ram += MP_SHARED_RAM_OFFSET ;
memset (IoAdapter->ram, '\0', 256) ; memset (boot + MP_SHARED_RAM_OFFSET, '\0', 256) ;
diva_configure_protocol (IoAdapter); diva_configure_protocol (IoAdapter);
/* /*
* start adapter * start adapter
...@@ -430,11 +470,13 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -430,11 +470,13 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) {
diva_os_wait (10) ; diva_os_wait (10) ;
if ( (boot->signature >> 16) == 0x4447 ) if ( (boot->signature >> 16) == 0x4447 )
{ {
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
DBG_TRC(("Protocol startup time %d.%02d seconds", DBG_TRC(("Protocol startup time %d.%02d seconds",
(i / 100), (i % 100) )) (i / 100), (i % 100) ))
return (1) ; return (1) ;
} }
} }
DIVA_OS_MEM_DETACH_RAM(IoAdapter, boot);
DBG_FTL(("%s: Adapter selftest failed (0x%04X)!", DBG_FTL(("%s: Adapter selftest failed (0x%04X)!",
IoAdapter->Properties.Name, boot->signature >> 16)) IoAdapter->Properties.Name, boot->signature >> 16))
pri_cpu_trapped (IoAdapter) ; pri_cpu_trapped (IoAdapter) ;
...@@ -449,12 +491,16 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) { ...@@ -449,12 +491,16 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) {
PRI Adapter interrupt Service Routine PRI Adapter interrupt Service Routine
-------------------------------------------------------------------------- */ -------------------------------------------------------------------------- */
static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) { static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
if ( !((READ_DWORD((dword *)IoAdapter->cfg)) & 0x80000000) ) byte *cfg = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
if ( !((READ_DWORD((dword *)cfg)) & 0x80000000) ) {
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
return (0) ; return (0) ;
}
/* /*
clear interrupt line clear interrupt line
*/ */
WRITE_DWORD(((dword *)IoAdapter->cfg), (dword)~0x03E00000) ; WRITE_DWORD(((dword *)cfg), (dword)~0x03E00000) ;
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
IoAdapter->IrqCount++ ; IoAdapter->IrqCount++ ;
if ( IoAdapter->Initialized ) if ( IoAdapter->Initialized )
{ {
...@@ -466,10 +512,11 @@ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) { ...@@ -466,10 +512,11 @@ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
Disable interrupt in the card hardware Disable interrupt in the card hardware
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) { static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) {
dword volatile *cfgReg = (dword volatile *)IoAdapter->cfg ; dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ;
cfgReg[3] = 0x00000000 ; cfgReg[3] = 0x00000000 ;
cfgReg[1] = 0x00000000 ; cfgReg[1] = 0x00000000 ;
WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ; WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ;
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
} }
/* ------------------------------------------------------------------------- /* -------------------------------------------------------------------------
Install entry points for PRI Adapter Install entry points for PRI Adapter
......
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