Commit c9a392ea authored by Slava Grigorev's avatar Slava Grigorev Committed by Alex Deucher

drm/radeon: cleaned up VCO output settings for DP audio

This is preparation for the fixes in the following patches.
Signed-off-by: default avatarSlava Grigorev <slava.grigorev@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 08b21d30
...@@ -315,7 +315,7 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev, ...@@ -315,7 +315,7 @@ void dce6_dp_audio_set_dto(struct radeon_device *rdev,
div = 0; div = 0;
if (div) if (div)
clock = rdev->clock.gpupll_outputfreq * 10 / div; clock /= div;
WREG32(DCE8_DCCG_AUDIO_DTO1_PHASE, 24000); WREG32(DCE8_DCCG_AUDIO_DTO1_PHASE, 24000);
WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock); WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock);
......
...@@ -268,7 +268,7 @@ struct radeon_clock { ...@@ -268,7 +268,7 @@ struct radeon_clock {
uint32_t current_dispclk; uint32_t current_dispclk;
uint32_t dp_extclk; uint32_t dp_extclk;
uint32_t max_pixel_clock; uint32_t max_pixel_clock;
uint32_t gpupll_outputfreq; uint32_t vco_freq;
}; };
/* /*
......
...@@ -1257,12 +1257,14 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) ...@@ -1257,12 +1257,14 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
rdev->mode_info.firmware_flags = rdev->mode_info.firmware_flags =
le16_to_cpu(firmware_info->info.usFirmwareCapability.susAccess); le16_to_cpu(firmware_info->info.usFirmwareCapability.susAccess);
if (ASIC_IS_DCE8(rdev)) { if (ASIC_IS_DCE8(rdev))
rdev->clock.gpupll_outputfreq = rdev->clock.vco_freq =
le32_to_cpu(firmware_info->info_22.ulGPUPLL_OutputFreq); le32_to_cpu(firmware_info->info_22.ulGPUPLL_OutputFreq);
if (rdev->clock.gpupll_outputfreq == 0) else
rdev->clock.gpupll_outputfreq = 360000; /* 3.6 GHz */ rdev->clock.vco_freq = rdev->clock.current_dispclk;
}
if (rdev->clock.vco_freq == 0)
rdev->clock.vco_freq = 360000; /* 3.6 GHz */
return true; return true;
} }
......
...@@ -739,9 +739,6 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, ...@@ -739,9 +739,6 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
struct radeon_connector_atom_dig *dig_connector =
radeon_connector->con_priv;
if (!dig || !dig->afmt) if (!dig || !dig->afmt)
return; return;
...@@ -753,10 +750,7 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, ...@@ -753,10 +750,7 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
radeon_audio_write_speaker_allocation(encoder); radeon_audio_write_speaker_allocation(encoder);
radeon_audio_write_sad_regs(encoder); radeon_audio_write_sad_regs(encoder);
radeon_audio_write_latency_fields(encoder, mode); radeon_audio_write_latency_fields(encoder, mode);
if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev)) radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
else
radeon_audio_set_dto(encoder, dig_connector->dp_clock);
radeon_audio_set_audio_packet(encoder); radeon_audio_set_audio_packet(encoder);
radeon_audio_select_pin(encoder); radeon_audio_select_pin(encoder);
......
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