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Commit c9aece04 authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Jakub Kicinski
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dt-bindings: net: dsa: mediatek,mt7530: update examples 

Update the examples on the binding.

- Add examples which include a wide variation of configurations.
- Make example comments YAML comment instead of DT binding comment.
- Add interrupt controller to the examples. Include header file for
interrupt.
- Change reset line for MT7621 examples.
- Pretty formatting for the examples.
- Change switch reg to 0.
- Change port labels to fit the example, change port 4 label to wan.
Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent f565c54e
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Showing with 347 additions and 55 deletions
Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml
View file @ c9aece04
...@@ -208,42 +208,111 @@ allOf: ...@@ -208,42 +208,111 @@ allOf:
unevaluatedProperties: false unevaluatedProperties: false
examples: examples:
# Example 1: Standalone MT7530
- | - |
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
mdio { mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
switch@0 { switch@0 {
compatible = "mediatek,mt7530"; compatible = "mediatek,mt7530";
reg = <0>; reg = <0>;
reset-gpios = <&pio 33 0>;
core-supply = <&mt6323_vpa_reg>; core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>; io-supply = <&mt6323_vemc3v3_reg>;
reset-gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
ethernet-ports { ethernet-ports {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
port@0 { port@0 {
reg = <0>; reg = <0>;
label = "lan0"; label = "lan1";
}; };
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan1"; label = "lan2";
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan2"; label = "lan3";
}; };
port@3 { port@3 {
reg = <3>; reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
};
};
# Example 2: MT7530 in MT7623AI SoC
- |
#include <dt-bindings/reset/mt2701-resets.h>
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7530";
reg = <0>;
mediatek,mcm;
resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
reset-names = "mcm";
core-supply = <&mt6323_vpa_reg>;
io-supply = <&mt6323_vemc3v3_reg>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3"; label = "lan3";
}; };
port@3 {
reg = <3>;
label = "lan4";
};
port@4 { port@4 {
reg = <4>; reg = <4>;
label = "wan"; label = "wan";
...@@ -254,85 +323,219 @@ examples: ...@@ -254,85 +323,219 @@ examples:
label = "cpu"; label = "cpu";
ethernet = <&gmac0>; ethernet = <&gmac0>;
phy-mode = "trgmii"; phy-mode = "trgmii";
fixed-link { fixed-link {
speed = <1000>; speed = <1000>;
full-duplex; full-duplex;
pause;
}; };
}; };
}; };
}; };
}; };
# Example 3: Standalone MT7531
- | - |
//Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4. #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
ethernet { mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac"; switch@0 {
compatible = "mediatek,mt7531";
reg = <0>; reg = <0>;
phy-mode = "rgmii";
fixed-link { reset-gpios = <&pio 54 0>;
speed = <1000>;
full-duplex; interrupt-controller;
pause; #interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
}; };
}; };
};
# Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/reset/mt7621-reset.h>
gmac1: mac@1 { mdio {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7621";
reg = <0>;
mediatek,mcm;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
};
};
# Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/reset/mt7621-reset.h>
ethernet {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins>;
mac@1 {
compatible = "mediatek,eth-mac"; compatible = "mediatek,eth-mac";
reg = <1>; reg = <1>;
phy-mode = "rgmii-txid";
phy-handle = <&phy4>; phy-mode = "rgmii";
phy-handle = <&example5_ethphy4>;
}; };
mdio: mdio-bus { mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
/* Internal phy */ /* MT7530's phy4 */
phy4: ethernet-phy@4 { example5_ethphy4: ethernet-phy@4 {
reg = <4>; reg = <4>;
}; };
mt7530: switch@1f { switch@0 {
compatible = "mediatek,mt7621"; compatible = "mediatek,mt7621";
reg = <0x1f>; reg = <0>;
mediatek,mcm;
resets = <&rstctrl 2>; mediatek,mcm;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm"; reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
ethernet-ports { ethernet-ports {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
port@0 { port@0 {
reg = <0>; reg = <0>;
label = "lan0"; label = "lan1";
}; };
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan1"; label = "lan2";
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan2"; label = "lan3";
}; };
port@3 { port@3 {
reg = <3>; reg = <3>;
label = "lan3"; label = "lan4";
}; };
/* Commented out. Port 4 is handled by 2nd GMAC. /* Commented out, phy4 is muxed to gmac1.
port@4 { port@4 {
reg = <4>; reg = <4>;
label = "lan4"; label = "wan";
}; };
*/ */
...@@ -340,7 +543,7 @@ examples: ...@@ -340,7 +543,7 @@ examples:
reg = <6>; reg = <6>;
label = "cpu"; label = "cpu";
ethernet = <&gmac0>; ethernet = <&gmac0>;
phy-mode = "rgmii"; phy-mode = "trgmii";
fixed-link { fixed-link {
speed = <1000>; speed = <1000>;
...@@ -353,82 +556,171 @@ examples: ...@@ -353,82 +556,171 @@ examples:
}; };
}; };
# Example 6: MT7621: mux external phy to SoC's gmac1
- | - |
//Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY. #include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/reset/mt7621-reset.h>
ethernet { ethernet {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
gmac_0: mac@0 {
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins>;
mac@1 {
compatible = "mediatek,eth-mac"; compatible = "mediatek,eth-mac";
reg = <0>; reg = <1>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&example6_ethphy7>;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* External PHY */
example6_ethphy7: ethernet-phy@7 {
reg = <7>;
phy-mode = "rgmii";
};
switch@0 {
compatible = "mediatek,mt7621";
reg = <0>;
mediatek,mcm;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "wan";
};
fixed-link { port@6 {
speed = <1000>; reg = <6>;
full-duplex; label = "cpu";
pause; ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
}; };
}; };
};
mdio0: mdio-bus { # Example 7: MT7621: mux external phy to MT7530's port 5
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/reset/mt7621-reset.h>
ethernet {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins>;
mdio {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
/* External phy */ /* External PHY */
ephy5: ethernet-phy@7 { example7_ethphy7: ethernet-phy@7 {
reg = <7>; reg = <7>;
phy-mode = "rgmii";
}; };
switch@1f { switch@0 {
compatible = "mediatek,mt7621"; compatible = "mediatek,mt7621";
reg = <0x1f>; reg = <0>;
mediatek,mcm;
resets = <&rstctrl 2>; mediatek,mcm;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm"; reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
ethernet-ports { ethernet-ports {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
port@0 { port@0 {
reg = <0>; reg = <0>;
label = "lan0"; label = "lan1";
}; };
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan1"; label = "lan2";
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan2"; label = "lan3";
}; };
port@3 { port@3 {
reg = <3>; reg = <3>;
label = "lan3"; label = "lan4";
}; };
port@4 { port@4 {
reg = <4>; reg = <4>;
label = "lan4"; label = "wan";
}; };
port@5 { port@5 {
reg = <5>; reg = <5>;
label = "lan5"; label = "extphy";
phy-mode = "rgmii"; phy-mode = "rgmii-txid";
phy-handle = <&ephy5>; phy-handle = <&example7_ethphy7>;
}; };
cpu_port0: port@6 { port@6 {
reg = <6>; reg = <6>;
label = "cpu"; label = "cpu";
ethernet = <&gmac_0>; ethernet = <&gmac0>;
phy-mode = "rgmii"; phy-mode = "trgmii";
fixed-link { fixed-link {
speed = <1000>; speed = <1000>;
......
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