[netdrvr ixgb] Lindent, then fix up obvious indent uglies by hand

drivers/net/ixgb/ixgb.h

@@ -68,12 +68,10 @@ struct ixgb_adapter;
 #define PCI_DMA_64BIT   0xffffffffffffffffULL
 #define PCI_DMA_32BIT   0x00000000ffffffffULL
 
-
 #include "ixgb_hw.h"
 #include "ixgb_ee.h"
 #include "ixgb_ids.h"
 
-
 #if _DEBUG_DRIVER_
 #define IXGB_DBG(args...) printk(KERN_DEBUG "ixgb: " args)
 #else

drivers/net/ixgb/ixgb_ee.h

@@ -28,12 +28,10 @@
 #ifndef _IXGB_EE_H_
 #define _IXGB_EE_H_
 
-
 #define IXGB_EEPROM_SIZE    64	/* Size in words */
 
 #define IXGB_ETH_LENGTH_OF_ADDRESS   6
 
-
 /* EEPROM Commands */
 #define EEPROM_READ_OPCODE  0x6		/* EERPOM read opcode */
 #define EEPROM_WRITE_OPCODE 0x5		/* EERPOM write opcode */
@@ -74,7 +72,7 @@
 /* EEPROM Map defines (WORD OFFSETS)*/
 
 /* EEPROM structure */
-struct  ixgb_ee_map_type{
+struct ixgb_ee_map_type {
 	uint8_t mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];
 	uint16_t compatibility;
 	uint16_t reserved1[4];
@@ -92,19 +90,15 @@ struct  ixgb_ee_map_type{
 	uint8_t d0_power;
 	uint16_t reserved2[28];
 	uint16_t checksum;
-        };
+};
 
 /* EEPROM Functions */
-uint16_t ixgb_read_eeprom(struct ixgb_hw *hw,
-                           uint16_t reg);
+uint16_t ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t reg);
 
 boolean_t ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
 
 void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
 
-void ixgb_write_eeprom(struct ixgb_hw *hw,
-                             uint16_t reg,
-                             uint16_t data);
+void ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t reg, uint16_t data);
 
 #endif				/* IXGB_EE_H */
-

drivers/net/ixgb/ixgb_hw.h

@@ -77,7 +77,6 @@ typedef enum {
 	ixgb_bus_width_64
 } ixgb_bus_width;
 
-
 #define IXGB_ETH_LENGTH_OF_ADDRESS   6
 
 #define IXGB_EEPROM_SIZE    64	/* Size in words */
@@ -85,7 +84,6 @@ typedef enum {
 #define SPEED_10000  10000
 #define FULL_DUPLEX  2
 
-
 #define IXGB_DELAY_BEFORE_RESET        10	/* allow 10ms after idling rx/tx units      */
 #define IXGB_DELAY_AFTER_RESET          1	/* allow 1ms after the reset                */
 #define IXGB_DELAY_AFTER_EE_RESET      10	/* allow 10ms after the EEPROM reset        */
@@ -224,7 +222,6 @@ typedef enum {
 #define IXGB_XOFFTXC 0x021D0	/* XOFF Transmitted Count */
 #define IXGB_RJC     0x021D8	/* Receive Jabber Count */
 
-
 /* CTRL0 Bit Masks */
 #define IXGB_CTRL0_LRST     0x00000008
 #define IXGB_CTRL0_JFE      0x00000010
@@ -245,14 +242,11 @@ typedef enum {
 
 #define IXGB_CTRL1_EE_RST      0x00002000
 
-
 /* STATUS Bit Masks */
 #define IXGB_STATUS_LU            0x00000002
 
-
 #define IXGB_STATUS_TXOFF         0x00000010
 
-
 #define IXGB_STATUS_PCI_SPD       0x00000800
 #define IXGB_STATUS_BUS64         0x00001000
 #define IXGB_STATUS_PCIX_MODE     0x00002000
@@ -261,14 +255,12 @@ typedef enum {
 #define IXGB_STATUS_PCIX_SPD_100  0x00004000
 #define IXGB_STATUS_PCIX_SPD_133  0x00008000
 
-
 /* EECD Bit Masks */
 #define IXGB_EECD_SK       0x00000001
 #define IXGB_EECD_CS       0x00000002
 #define IXGB_EECD_DI       0x00000004
 #define IXGB_EECD_DO       0x00000008
 
-
 /* MFS */
 #define IXGB_MFS_SHIFT 16
 
@@ -297,7 +289,6 @@ typedef enum {
 #define IXGB_RCTL_CFF         0x00800000
 #define IXGB_RCTL_SECRC       0x04000000
 
-
 /* FCRTL Bit Masks */
 #define IXGB_FCRTL_XONE       0x80000000
 
@@ -323,7 +314,6 @@ typedef enum {
 #define IXGB_TCTL_TXEN 0x00000002
 #define IXGB_TCTL_TPDE 0x00000004
 
-
 /* TXDCTL Bit Masks */
 #define IXGB_TXDCTL_HTHRESH_SHIFT 8
 
@@ -440,7 +430,6 @@ struct ixgb_context_desc {
 
 #define IXGB_CONTEXT_DESC_TYPE 0x00000000
 
-
 /* Filters */
 #define IXGB_RAR_ENTRIES          16	/* Number of entries in Rx Address array */
 #define IXGB_MC_TBL_SIZE          128	/* Multicast Filter Table (4096 bits) */
@@ -461,7 +450,6 @@ struct ixgb_context_desc {
 #define IS_MULTICAST(Address) \
     (boolean_t)(((uint8_t *)(Address))[0] & ((uint8_t)0x01))
 
-
 /*
  * Check whether an address is broadcast.
  */
@@ -501,7 +489,7 @@ struct ixgb_hw {
 	ixgb_mac_type mac_type;	/* Identifier for MAC controller    */
 	uint32_t max_frame_size;	/* Maximum frame size supported     */
 	uint32_t mc_filter_type;	/* Multicast filter hash type       */
-    uint32_t        num_mc_addrs;       /* Number of current Multicast addrs*/
+	uint32_t num_mc_addrs;	/* Number of current Multicast addrs */
 	uint8_t curr_mac_addr[IXGB_ETH_LENGTH_OF_ADDRESS];	/* Individual address currently programmed in MAC */
 	uint32_t num_tx_desc;	/* Number of Transmit descriptors   */
 	uint32_t num_rx_desc;	/* Number of Receive descriptors    */
@@ -511,7 +499,7 @@ struct ixgb_hw {
 	uint16_t device_id;	/* device id from PCI configuration space */
 	uint16_t vendor_id;	/* vendor id from PCI configuration space */
 	uint8_t revision_id;	/* revision id from PCI configuration space */
-    uint16_t        subsystem_vendor_id;/* subsystem vendor id from PCI configuration space */
+	uint16_t subsystem_vendor_id;	/* subsystem vendor id from PCI configuration space */
 	uint16_t subsystem_id;	/* subsystem id from PCI configuration space */
 	uint16_t pci_cmd_word;	/* PCI command register id from PCI configuration space */
 	uint16_t eeprom[IXGB_EEPROM_SIZE];	/* EEPROM contents read at init time  */
@@ -592,40 +580,32 @@ extern void ixgb_check_for_link(struct ixgb_hw *hw);
 extern boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw);
 extern boolean_t ixgb_setup_fc(struct ixgb_hw *hw);
 extern void ixgb_clear_hw_cntrs(struct ixgb_hw *hw);
-extern boolean_t mac_addr_valid(uint8_t *mac_addr);
+extern boolean_t mac_addr_valid(uint8_t * mac_addr);
 
 extern uint16_t ixgb_read_phy_reg(struct ixgb_hw *hw,
 				  uint32_t reg_addr,
-                            uint32_t phy_addr,
-                            uint32_t device_type);
+				  uint32_t phy_addr, uint32_t device_type);
 
 extern void ixgb_write_phy_reg(struct ixgb_hw *hw,
 			       uint32_t reg_addr,
 			       uint32_t phy_addr,
-                            uint32_t device_type,
-                            uint16_t data);
-
-extern void ixgb_rar_set(struct ixgb_hw *hw,
-                    uint8_t *addr,
-                    uint32_t index);
+			       uint32_t device_type, uint16_t data);
 
+extern void ixgb_rar_set(struct ixgb_hw *hw, uint8_t * addr, uint32_t index);
 
 /* Filters (multicast, vlan, receive) */
 extern void ixgb_mc_addr_list_update(struct ixgb_hw *hw,
 				     uint8_t * mc_addr_list,
-                               uint32_t mc_addr_count,
-                               uint32_t pad);
+				     uint32_t mc_addr_count, uint32_t pad);
 
 /* Vfta functions */
 extern void ixgb_write_vfta(struct ixgb_hw *hw,
-                 uint32_t offset,
-                 uint32_t value);
+			    uint32_t offset, uint32_t value);
 
 extern void ixgb_clear_vfta(struct ixgb_hw *hw);
 
-
 /* Access functions to eeprom data */
-void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr);
+void ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t * mac_addr);
 uint16_t ixgb_get_ee_compatibility(struct ixgb_hw *hw);
 uint32_t ixgb_get_ee_pba_number(struct ixgb_hw *hw);
 uint16_t ixgb_get_ee_init_ctrl_reg_1(struct ixgb_hw *hw);
@@ -642,9 +622,6 @@ boolean_t ixgb_get_eeprom_data(struct ixgb_hw *hw);
 /* Everything else */
 void ixgb_led_on(struct ixgb_hw *hw);
 void ixgb_led_off(struct ixgb_hw *hw);
-void ixgb_write_pci_cfg(struct ixgb_hw *hw,
-                         uint32_t reg,
-                         uint16_t * value);
-
+void ixgb_write_pci_cfg(struct ixgb_hw *hw, uint32_t reg, uint16_t * value);
 
 #endif				/* _IXGB_HW_H_ */

drivers/net/ixgb/ixgb_ids.h

@@ -25,7 +25,6 @@
   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *******************************************************************************/
 
-
 #ifndef _IXGB_IDS_H_
 #define _IXGB_IDS_H_
 

drivers/net/ixgb/ixgb_osdep.h

@@ -25,7 +25,6 @@
   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *******************************************************************************/
 
-
 /* glue for the OS independant part of ixgb 
  * includes register access macros
  */

drivers/net/ixgb/ixgb_param.c

@@ -132,7 +132,6 @@ IXGB_PARAM(RxIntDelay, "Receive Interrupt Delay");
 
 IXGB_PARAM(RAIDC, "Disable or enable Receive Interrupt Moderation");
 
-
 /* Receive Flow control high threshold (when we send a pause frame)
  * (FCRTH)
  *
@@ -143,7 +142,6 @@ IXGB_PARAM(RAIDC, "Disable or enable Receive Interrupt Moderation");
 
 IXGB_PARAM(RxFCHighThresh, "Receive Flow Control High Threshold");
 
-
 /* Receive Flow control low threshold (when we send a resume frame)
  * (FCRTL)
  *
@@ -155,7 +153,6 @@ IXGB_PARAM(RxFCHighThresh, "Receive Flow Control High Threshold");
 
 IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold");
 
-
 /* Flow control request timeout (how long to pause the link partner's tx)
  * (PAP 15:0)
  *
@@ -166,7 +163,6 @@ IXGB_PARAM(RxFCLowThresh, "Receive Flow Control Low Threshold");
 
 IXGB_PARAM(FCReqTimeout, "Flow Control Request Timeout");
 
-
 /* Transmit Interrupt Delay in units of 0.8192 microseconds
  *
  * Valid Range: 0-65535
@@ -213,7 +209,6 @@ IXGB_PARAM(IntDelayEnable, "Transmit Interrupt Delay Enable");
 #define MIN_FCPAUSE			      1
 #define MAX_FCPAUSE			 0xffff
 
-
 struct ixgb_option {
 	enum { enable_option, range_option, list_option } type;
 	char *name;
@@ -235,10 +230,9 @@ struct ixgb_option {
 };
 
 static int __devinit
-ixgb_validate_option(int *value,
-		     struct ixgb_option *opt)
+ixgb_validate_option(int *value, struct ixgb_option *opt)
 {
-	if(*value == OPTION_UNSET) {
+	if (*value == OPTION_UNSET) {
 		*value = opt->def;
 		return 0;
 	}
@@ -255,7 +249,7 @@ ixgb_validate_option(int *value,
 		}
 		break;
 	case range_option:
-		if(*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
+		if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 			printk(KERN_INFO "%s set to %i\n", opt->name, *value);
 			return 0;
 		}
@@ -265,10 +259,10 @@ ixgb_validate_option(int *value,
 			int i;
 			struct ixgb_opt_list *ent;
 
-			for(i = 0; i < opt->arg.l.nr; i++) {
+			for (i = 0; i < opt->arg.l.nr; i++) {
 				ent = &opt->arg.l.p[i];
-				if(*value == ent->i) {
-					if(ent->str[0] != '\0')
+				if (*value == ent->i) {
+					if (ent->str[0] != '\0')
 						printk(KERN_INFO "%s",
 						       ent->str);
 					return 0;
@@ -305,8 +299,9 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 
 	IXGB_DBG("ixgb_check_options\n");
 
-	if(board >= IXGB_MAX_NIC) {
-		printk(KERN_NOTICE "Warning: no configuration for board #%i\n", board);
+	if (board >= IXGB_MAX_NIC) {
+		printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
+		       board);
 		printk(KERN_NOTICE "Using defaults for all values\n");
 		board = IXGB_MAX_NIC;
 	}
@@ -317,7 +312,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 			.name = "Transmit Descriptors",
 			.err = "using default of " __MODULE_STRING(DEFAULT_TXD),
 			.def = DEFAULT_TXD,
-			.arg = {.r =  {.min =  MIN_TXD, .max = MAX_TXD}}
+			.arg = {.r = {.min = MIN_TXD,.max = MAX_TXD}}
 		};
 		struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
 
@@ -332,7 +327,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 			.name = "Receive Descriptors",
 			.err = "using default of " __MODULE_STRING(DEFAULT_RXD),
 			.def = DEFAULT_RXD,
-			.arg = {.r =  {.min =  MIN_RXD, .max = MAX_RXD}}
+			.arg = {.r = {.min = MIN_RXD,.max = MAX_RXD}}
 		};
 		struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
 
@@ -381,7 +376,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 			.name = "Flow Control",
 			.err = "reading default settings from EEPROM",
 			.def = ixgb_fc_full,
-			.arg = {.l =  {.nr = LIST_LEN(fc_list), .p = fc_list}}
+			.arg = {.l = {.nr = LIST_LEN(fc_list),.p = fc_list}}
 		};
 
 		int fc = FlowControl[board];
@@ -393,46 +388,50 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 		struct ixgb_option fcrth = {
 			.type = range_option,
 			.name = "Rx Flow Control High Threshold",
-			.err = "using default of " __MODULE_STRING(DEFAULT_FCRTH),
+			.err =
+			    "using default of " __MODULE_STRING(DEFAULT_FCRTH),
 			.def = DEFAULT_FCRTH,
-			.arg = {.r =  {.min =  MIN_FCRTH, .max = MAX_FCRTH}}
+			.arg = {.r = {.min = MIN_FCRTH,.max = MAX_FCRTH}}
 		};
 
 		adapter->hw.fc.high_water = RxFCHighThresh[board];
 		ixgb_validate_option(&adapter->hw.fc.high_water, &fcrth);
-		if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
-			printk (KERN_INFO 
+		if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
+			printk(KERN_INFO
 			       "Ignoring RxFCHighThresh when no RxFC\n");
 	}
 	{			/* Receive Flow Control Low Threshold */
 		struct ixgb_option fcrtl = {
 			.type = range_option,
 			.name = "Rx Flow Control Low Threshold",
-			.err = "using default of " __MODULE_STRING(DEFAULT_FCRTL),
+			.err =
+			    "using default of " __MODULE_STRING(DEFAULT_FCRTL),
 			.def = DEFAULT_FCRTL,
-			.arg = {.r =  {.min =  MIN_FCRTL, .max = MAX_FCRTL}}
+			.arg = {.r = {.min = MIN_FCRTL,.max = MAX_FCRTL}}
 		};
 
 		adapter->hw.fc.low_water = RxFCLowThresh[board];
 		ixgb_validate_option(&adapter->hw.fc.low_water, &fcrtl);
-		if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
-			printk (KERN_INFO 
+		if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
+			printk(KERN_INFO
 			       "Ignoring RxFCLowThresh when no RxFC\n");
 	}
-	{			/* Flow Control Pause Time Request*/
+	{			/* Flow Control Pause Time Request */
 		struct ixgb_option fcpap = {
 			.type = range_option,
 			.name = "Flow Control Pause Time Request",
-			.err = "using default of "__MODULE_STRING(DEFAULT_FCPAUSE),
+			.err =
+			    "using default of "
+			    __MODULE_STRING(DEFAULT_FCPAUSE),
 			.def = DEFAULT_FCPAUSE,
-			.arg = {.r =  {.min =  MIN_FCPAUSE, .max = MAX_FCPAUSE}}
+			.arg = {.r = {.min = MIN_FCPAUSE,.max = MAX_FCPAUSE}}
 		};
 
 		int pause_time = FCReqTimeout[board];
 
 		ixgb_validate_option(&pause_time, &fcpap);
-		if ( !(adapter->hw.fc.type & ixgb_fc_rx_pause) )
-			printk (KERN_INFO 
+		if (!(adapter->hw.fc.type & ixgb_fc_rx_pause))
+			printk(KERN_INFO
 			       "Ignoring FCReqTimeout when no RxFC\n");
 		adapter->hw.fc.pause_time = pause_time;
 	}
@@ -441,7 +440,7 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 		/* high must be greater than low */
 		if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) {
 			/* set defaults */
-			printk (KERN_INFO 
+			printk(KERN_INFO
 			       "RxFCHighThresh must be >= (RxFCLowThresh + 8), "
 			       "Using Defaults\n");
 			adapter->hw.fc.high_water = DEFAULT_FCRTH;
@@ -452,9 +451,10 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 		struct ixgb_option opt = {
 			.type = range_option,
 			.name = "Receive Interrupt Delay",
-			.err = "using default of " __MODULE_STRING(DEFAULT_RDTR),
+			.err =
+			    "using default of " __MODULE_STRING(DEFAULT_RDTR),
 			.def = DEFAULT_RDTR,
-			.arg = {.r =  {.min =  MIN_RDTR, .max = MAX_RDTR}}
+			.arg = {.r = {.min = MIN_RDTR,.max = MAX_RDTR}}
 		};
 
 		adapter->rx_int_delay = RxIntDelay[board];
@@ -477,9 +477,10 @@ ixgb_check_options(struct ixgb_adapter *adapter)
 		struct ixgb_option opt = {
 			.type = range_option,
 			.name = "Transmit Interrupt Delay",
-			.err = "using default of " __MODULE_STRING(DEFAULT_TIDV),
+			.err =
+			    "using default of " __MODULE_STRING(DEFAULT_TIDV),
 			.def = DEFAULT_TIDV,
-			.arg = {.r =  {.min =  MIN_TIDV, .max = MAX_TIDV}}
+			.arg = {.r = {.min = MIN_TIDV,.max = MAX_TIDV}}
 		};
 
 		adapter->tx_int_delay = TxIntDelay[board];