Commit cd9bf689 authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville

ath9k: separate core driver and hw timer code

Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent b002a4a9
...@@ -4136,9 +4136,10 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah, ...@@ -4136,9 +4136,10 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
return timer; return timer;
} }
void ath_gen_timer_start(struct ath_hw *ah, void ath9k_hw_gen_timer_start(struct ath_hw *ah,
struct ath_gen_timer *timer, struct ath_gen_timer *timer,
u32 timer_next, u32 timer_period) u32 timer_next,
u32 timer_period)
{ {
struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
u32 tsf; u32 tsf;
...@@ -4173,15 +4174,9 @@ void ath_gen_timer_start(struct ath_hw *ah, ...@@ -4173,15 +4174,9 @@ void ath_gen_timer_start(struct ath_hw *ah,
REG_SET_BIT(ah, AR_IMR_S5, REG_SET_BIT(ah, AR_IMR_S5,
(SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) | (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
ath9k_hw_set_interrupts(ah, 0);
ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
}
} }
void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
{ {
struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
...@@ -4200,13 +4195,6 @@ void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) ...@@ -4200,13 +4195,6 @@ void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
clear_bit(timer->index, &timer_table->timer_mask.timer_bits); clear_bit(timer->index, &timer_table->timer_mask.timer_bits);
/* if no timer is enabled, turn off interrupt mask */
if (timer_table->timer_mask.val == 0) {
ath9k_hw_set_interrupts(ah, 0);
ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
}
} }
void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer) void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer)
......
...@@ -682,9 +682,12 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah, ...@@ -682,9 +682,12 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
void (*overflow)(void *), void (*overflow)(void *),
void *arg, void *arg,
u8 timer_index); u8 timer_index);
void ath_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer, void ath9k_hw_gen_timer_start(struct ath_hw *ah,
u32 timer_next, u32 timer_period); struct ath_gen_timer *timer,
void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer); u32 timer_next,
u32 timer_period);
void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer);
void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer); void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
void ath_gen_timer_isr(struct ath_hw *hw); void ath_gen_timer_isr(struct ath_hw *hw);
u32 ath9k_hw_gettsf32(struct ath_hw *ah); u32 ath9k_hw_gettsf32(struct ath_hw *ah);
......
...@@ -1408,6 +1408,34 @@ static void ath9k_btcoex_bt_stomp(struct ath_softc *sc, ...@@ -1408,6 +1408,34 @@ static void ath9k_btcoex_bt_stomp(struct ath_softc *sc,
ath9k_hw_btcoex_enable(ah); ath9k_hw_btcoex_enable(ah);
} }
static void ath9k_gen_timer_start(struct ath_hw *ah,
struct ath_gen_timer *timer,
u32 timer_next,
u32 timer_period)
{
ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
ath9k_hw_set_interrupts(ah, 0);
ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
}
}
static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
{
struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
ath9k_hw_gen_timer_stop(ah, timer);
/* if no timer is enabled, turn off interrupt mask */
if (timer_table->timer_mask.val == 0) {
ath9k_hw_set_interrupts(ah, 0);
ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
}
}
/* /*
* This is the master bt coex timer which runs for every * This is the master bt coex timer which runs for every
* 45ms, bt traffic will be given priority during 55% of this * 45ms, bt traffic will be given priority during 55% of this
...@@ -1429,9 +1457,9 @@ static void ath_btcoex_period_timer(unsigned long data) ...@@ -1429,9 +1457,9 @@ static void ath_btcoex_period_timer(unsigned long data)
if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) { if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
if (btcoex->hw_timer_enabled) if (btcoex->hw_timer_enabled)
ath_gen_timer_stop(ah, btcoex->no_stomp_timer); ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
ath_gen_timer_start(ah, ath9k_gen_timer_start(ah,
btcoex->no_stomp_timer, btcoex->no_stomp_timer,
(ath9k_hw_gettsf32(ah) + (ath9k_hw_gettsf32(ah) +
btcoex->btcoex_no_stomp), btcoex->btcoex_no_stomp),
...@@ -2165,7 +2193,7 @@ static void ath9k_btcoex_timer_resume(struct ath_softc *sc) ...@@ -2165,7 +2193,7 @@ static void ath9k_btcoex_timer_resume(struct ath_softc *sc)
/* make sure duty cycle timer is also stopped when resuming */ /* make sure duty cycle timer is also stopped when resuming */
if (btcoex->hw_timer_enabled) if (btcoex->hw_timer_enabled)
ath_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer); ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
btcoex->bt_priority_cnt = 0; btcoex->bt_priority_cnt = 0;
btcoex->bt_priority_time = jiffies; btcoex->bt_priority_time = jiffies;
...@@ -2407,7 +2435,7 @@ static void ath9k_btcoex_timer_pause(struct ath_softc *sc) ...@@ -2407,7 +2435,7 @@ static void ath9k_btcoex_timer_pause(struct ath_softc *sc)
del_timer_sync(&btcoex->period_timer); del_timer_sync(&btcoex->period_timer);
if (btcoex->hw_timer_enabled) if (btcoex->hw_timer_enabled)
ath_gen_timer_stop(ah, btcoex->no_stomp_timer); ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
btcoex->hw_timer_enabled = false; btcoex->hw_timer_enabled = false;
} }
......
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