Commit cdb1e8b4 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen

clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks

The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 4a9a1a56
......@@ -104,7 +104,7 @@ obj-y += renesas/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
obj-$(CONFIG_CLK_SIFIVE) += sifive/
obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/
obj-y += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-y += sprd/
obj-$(CONFIG_ARCH_STI) += st/
......
# SPDX-License-Identifier: GPL-2.0
config CLK_INTEL_SOCFPGA
bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA
default ARCH_INTEL_SOCFPGA
help
Support for the clock controllers present on Intel SoCFPGA and eASIC
devices like Stratix 10, Agilex and N5X eASIC.
if CLK_INTEL_SOCFPGA
config CLK_INTEL_SOCFPGA64
bool
# Intel Stratix / Agilex / N5X clock controller support
bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA)
default ARM64 && ARCH_INTEL_SOCFPGA
depends on ARM64 && ARCH_INTEL_SOCFPGA
endif # CLK_INTEL_SOCFPGA
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