Commit cfd673e5 authored by Paul Mackerras's avatar Paul Mackerras Committed by Linus Torvalds

[PATCH] ppc64: clean up trap handling in head.S

This patch is from Jake Moilanen <moilanen@austin.ibm.com>.

Changed the naming conventions for head.S to more closely follow the Linux
naming conventions.
Signed-off-by: default avatarJake Moilanen <moilanen@austin.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 8e7844eb
...@@ -59,23 +59,23 @@ struct HvReleaseData hvReleaseData = { ...@@ -59,23 +59,23 @@ struct HvReleaseData hvReleaseData = {
0xf4, 0x4b, 0xf6, 0xf4 }, 0xf4, 0x4b, 0xf6, 0xf4 },
}; };
extern void SystemReset_Iseries(void); extern void system_reset_iSeries(void);
extern void MachineCheck_Iseries(void); extern void machine_check_iSeries(void);
extern void DataAccess_Iseries(void); extern void data_access_iSeries(void);
extern void InstructionAccess_Iseries(void); extern void instruction_access_iSeries(void);
extern void HardwareInterrupt_Iseries(void); extern void hardware_interrupt_iSeries(void);
extern void Alignment_Iseries(void); extern void alignment_iSeries(void);
extern void ProgramCheck_Iseries(void); extern void program_check_iSeries(void);
extern void FPUnavailable_Iseries(void); extern void fp_unavailable_iSeries(void);
extern void Decrementer_Iseries(void); extern void decrementer_iSeries(void);
extern void Trap_0a_Iseries(void); extern void trap_0a_iSeries(void);
extern void Trap_0b_Iseries(void); extern void trap_0b_iSeries(void);
extern void SystemCall_Iseries(void); extern void system_call_iSeries(void);
extern void SingleStep_Iseries(void); extern void single_step_iSeries(void);
extern void Trap_0e_Iseries(void); extern void trap_0e_iSeries(void);
extern void PerformanceMonitor_Iseries(void); extern void performance_monitor_iSeries(void);
extern void DataAccessSLB_Iseries(void); extern void data_access_slb_iSeries(void);
extern void InstructionAccessSLB_Iseries(void); extern void instruction_access_slb_iSeries(void);
struct ItLpNaca itLpNaca = { struct ItLpNaca itLpNaca = {
.xDesc = 0xd397d581, /* "LpNa" ebcdic */ .xDesc = 0xd397d581, /* "LpNa" ebcdic */
...@@ -105,27 +105,27 @@ struct ItLpNaca itLpNaca = { ...@@ -105,27 +105,27 @@ struct ItLpNaca itLpNaca = {
.xSlicSegmentTablePtr = 0, /* seg table */ .xSlicSegmentTablePtr = 0, /* seg table */
.xOldLpQueue = { 0 }, /* Old LP Queue */ .xOldLpQueue = { 0 }, /* Old LP Queue */
.xInterruptHdlr = { .xInterruptHdlr = {
(u64)SystemReset_Iseries, /* 0x100 System Reset */ (u64)system_reset_iSeries, /* 0x100 System Reset */
(u64)MachineCheck_Iseries, /* 0x200 Machine Check */ (u64)machine_check_iSeries, /* 0x200 Machine Check */
(u64)DataAccess_Iseries, /* 0x300 Data Access */ (u64)data_access_iSeries, /* 0x300 Data Access */
(u64)InstructionAccess_Iseries, /* 0x400 Instruction Access */ (u64)instruction_access_iSeries, /* 0x400 Instruction Access */
(u64)HardwareInterrupt_Iseries, /* 0x500 External */ (u64)hardware_interrupt_iSeries, /* 0x500 External */
(u64)Alignment_Iseries, /* 0x600 Alignment */ (u64)alignment_iSeries, /* 0x600 Alignment */
(u64)ProgramCheck_Iseries, /* 0x700 Program Check */ (u64)program_check_iSeries, /* 0x700 Program Check */
(u64)FPUnavailable_Iseries, /* 0x800 FP Unavailable */ (u64)fp_unavailable_iSeries, /* 0x800 FP Unavailable */
(u64)Decrementer_Iseries, /* 0x900 Decrementer */ (u64)decrementer_iSeries, /* 0x900 Decrementer */
(u64)Trap_0a_Iseries, /* 0xa00 Trap 0A */ (u64)trap_0a_iSeries, /* 0xa00 Trap 0A */
(u64)Trap_0b_Iseries, /* 0xb00 Trap 0B */ (u64)trap_0b_iSeries, /* 0xb00 Trap 0B */
(u64)SystemCall_Iseries, /* 0xc00 System Call */ (u64)system_call_iSeries, /* 0xc00 System Call */
(u64)SingleStep_Iseries, /* 0xd00 Single Step */ (u64)single_step_iSeries, /* 0xd00 Single Step */
(u64)Trap_0e_Iseries, /* 0xe00 Trap 0E */ (u64)trap_0e_iSeries, /* 0xe00 Trap 0E */
(u64)PerformanceMonitor_Iseries,/* 0xf00 Performance Monitor */ (u64)performance_monitor_iSeries,/* 0xf00 Performance Monitor */
0, /* int 0x1000 */ 0, /* int 0x1000 */
0, /* int 0x1010 */ 0, /* int 0x1010 */
0, /* int 0x1020 CPU ctls */ 0, /* int 0x1020 CPU ctls */
(u64)HardwareInterrupt_Iseries, /* SC Ret Hdlr */ (u64)hardware_interrupt_iSeries, /* SC Ret Hdlr */
(u64)DataAccessSLB_Iseries, /* 0x380 D-SLB */ (u64)data_access_slb_iSeries, /* 0x380 D-SLB */
(u64)InstructionAccessSLB_Iseries /* 0x480 I-SLB */ (u64)instruction_access_slb_iSeries /* 0x480 I-SLB */
} }
}; };
EXPORT_SYMBOL(itLpNaca); EXPORT_SYMBOL(itLpNaca);
......
...@@ -54,8 +54,8 @@ exception_marker: ...@@ -54,8 +54,8 @@ exception_marker:
#undef SHOW_SYSCALLS #undef SHOW_SYSCALLS
.globl SystemCall_common .globl system_call_common
SystemCall_common: system_call_common:
andi. r10,r12,MSR_PR andi. r10,r12,MSR_PR
mr r10,r1 mr r10,r1
addi r1,r1,-INT_FRAME_SIZE addi r1,r1,-INT_FRAME_SIZE
...@@ -100,7 +100,7 @@ SystemCall_common: ...@@ -100,7 +100,7 @@ SystemCall_common:
cmpdi cr1,r0,0x5555 /* syscall 0x5555 */ cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
andi. r10,r12,MSR_PR /* from kernel */ andi. r10,r12,MSR_PR /* from kernel */
crand 4*cr0+eq,4*cr1+eq,4*cr0+eq crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
beq HardwareInterrupt_entry beq hardware_interrupt_entry
lbz r10,PACAPROCENABLED(r13) lbz r10,PACAPROCENABLED(r13)
std r10,SOFTE(r1) std r10,SOFTE(r1)
#endif #endif
......
This diff is collapsed.
...@@ -56,7 +56,7 @@ ...@@ -56,7 +56,7 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
extern void pseries_secondary_smp_init(unsigned long); extern void pSeries_secondary_smp_init(unsigned long);
/* Get state of physical CPU. /* Get state of physical CPU.
* Return codes: * Return codes:
...@@ -192,7 +192,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) ...@@ -192,7 +192,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
{ {
int status; int status;
unsigned long start_here = __pa((u32)*((unsigned long *) unsigned long start_here = __pa((u32)*((unsigned long *)
pseries_secondary_smp_init)); pSeries_secondary_smp_init));
unsigned int pcpu; unsigned int pcpu;
/* At boot time the cpus are already spinning in hold /* At boot time the cpus are already spinning in hold
...@@ -362,7 +362,7 @@ void __init smp_init_pSeries(void) ...@@ -362,7 +362,7 @@ void __init smp_init_pSeries(void)
rtas_call(rtas_token("start-cpu"), 3, 1, &ret, rtas_call(rtas_token("start-cpu"), 3, 1, &ret,
get_hard_smp_processor_id(i), get_hard_smp_processor_id(i),
__pa((u32)*((unsigned long *) __pa((u32)*((unsigned long *)
pseries_secondary_smp_init)), pSeries_secondary_smp_init)),
i); i);
} }
} }
......
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/processor.h> #include <asm/processor.h>
extern char SystemCall_common[]; extern char system_call_common[];
/* Bits in SRR1 that are copied from MSR */ /* Bits in SRR1 that are copied from MSR */
#define MSR_MASK 0xffffffff87c0ffff #define MSR_MASK 0xffffffff87c0ffff
...@@ -76,7 +76,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr) ...@@ -76,7 +76,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
regs->gpr[11] = regs->nip + 4; regs->gpr[11] = regs->nip + 4;
regs->gpr[12] = regs->msr & MSR_MASK; regs->gpr[12] = regs->msr & MSR_MASK;
regs->gpr[13] = (unsigned long) get_paca(); regs->gpr[13] = (unsigned long) get_paca();
regs->nip = (unsigned long) &SystemCall_common; regs->nip = (unsigned long) &system_call_common;
regs->msr = MSR_KERNEL; regs->msr = MSR_KERNEL;
return 1; return 1;
case 18: /* b */ case 18: /* b */
......
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