Commit cfdb4f7f authored by Jayesh Choudhary's avatar Jayesh Choudhary Committed by Vignesh Raghavendra

arm64: dts: ti: k3-am69-sk: remove assigned-clock-parents for unused VP

VP2 and VP3 are unused video ports and VP3 share the same parent
clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
The current DM firmware does not support changing parent clock if it
is shared by another component. It returns 0 for the determine_rate
query before causing set_rate to set the clock at default maximum of
1.8GHz which is a lot more than the maximum frequency videoports can
support (600MHz) causing SYNC LOST issues.
So remove the parent clocks for unused VPs to avoid conflict.

Fixes: 6f8605fd ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support")
Reported-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarJayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: default avatarTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: default avatarAradhya Bhatia <a-bhatia1@ti.com>
Tested-by: default avatarEnric Balletbo i Serra <eballetbo@redhat.com>
Link: https://lore.kernel.org/r/20240201142308.4954-1-j-choudhary@ti.comSigned-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent cff6dd01
......@@ -919,13 +919,9 @@ &dss {
pinctrl-names = "default";
pinctrl-0 = <&dss_vout0_pins_default>;
assigned-clocks = <&k3_clks 218 2>,
<&k3_clks 218 5>,
<&k3_clks 218 14>,
<&k3_clks 218 18>;
<&k3_clks 218 5>;
assigned-clock-parents = <&k3_clks 218 3>,
<&k3_clks 218 7>,
<&k3_clks 218 16>,
<&k3_clks 218 22>;
<&k3_clks 218 7>;
};
&serdes_wiz4 {
......
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