Commit d01b7e92 authored by Linus Torvalds's avatar Linus Torvalds

v2.5.1.8 -> v2.5.1.9

- Russell King: large ARM update
- Adam Richter et al: more kdev_t updates
parent 2161cc3b
VERSION = 2
PATCHLEVEL = 5
SUBLEVEL = 2
EXTRAVERSION =-pre8
EXTRAVERSION =-pre9
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
......
......@@ -9,7 +9,7 @@
LINKFLAGS :=-p -X -T arch/arm/vmlinux.lds
GZFLAGS :=-9
CFLAGS +=-fno-common -pipe
CFLAGS +=-pipe
ifneq ($(CONFIG_NO_FRAME_POINTER),y)
CFLAGS :=$(CFLAGS:-fomit-frame-pointer=)
......@@ -22,9 +22,7 @@ endif
# Select CPU dependent flags. Note that order of declaration is important;
# the options further down the list override previous items.
#
# Note! For APCS-26 YOU MUST HAVE AN APCS-26 LIBGCC.A
#
apcs-y :=-mapcs-32
apcs-$(CONFIG_CPU_32) :=-mapcs-32
apcs-$(CONFIG_CPU_26) :=-mapcs-26 -mcpu=arm3 -Os
# This selects which instruction set is used.
......@@ -32,6 +30,7 @@ arch-y :=
arch-$(CONFIG_CPU_32v3) :=-march=armv3
arch-$(CONFIG_CPU_32v4) :=-march=armv4
arch-$(CONFIG_CPU_32v5) :=-march=armv5
arch-$(CONFIG_CPU_XSCALE) :=-march=armv4 -Wa,-mxscale #-march=armv5te
# This selects how we optimise for the processor.
tune-y :=
......@@ -39,15 +38,19 @@ tune-$(CONFIG_CPU_ARM610) :=-mtune=arm610
tune-$(CONFIG_CPU_ARM710) :=-mtune=arm710
tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE) :=-mtune=strongarm #-mtune=xscale
CFLAGS_BOOT :=$(apcs-y) $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float
CFLAGS +=$(apcs-y) $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float
AFLAGS +=$(apcs-y) $(arch-y) -mno-fpu -msoft-float
ifeq ($(CONFIG_CPU_26),y)
PROCESSOR = armo
PROCESSOR := armo
HEAD := arch/arm/mach-arc/head.o arch/arm/kernel/init_task.o
ifeq ($(CONFIG_ROM_KERNEL),y)
DATAADDR = 0x02080000
TEXTADDR = 0x03800000
......@@ -60,6 +63,7 @@ endif
ifeq ($(CONFIG_CPU_32),y)
PROCESSOR = armv
HEAD := arch/arm/kernel/head.o arch/arm/kernel/init_task.o
TEXTADDR = 0xC0008000
LDSCRIPT = arch/arm/vmlinux-armv.lds.in
endif
......@@ -134,51 +138,55 @@ ifeq ($(CONFIG_ARCH_ANAKIN),y)
MACHINE = anakin
endif
export MACHINE PROCESSOR TEXTADDR GZFLAGS
ifeq ($(CONFIG_ARCH_IOP310),y)
MACHINE = iop310
endif
ifeq ($(CONFIG_ARCH_ADIFCC),y)
MACHINE = adifcc
endif
export MACHINE PROCESSOR TEXTADDR GZFLAGS CFLAGS_BOOT
# Only set INCDIR if its not already defined above
# Grr, ?= doesn't work as all the other assignment operators do. Make bug?
ifeq ($(origin INCDIR), undefined)
INCDIR := $(MACHINE)
INCDIR :=$(MACHINE)
endif
ifeq ($(origin DATAADDR), undefined)
DATAADDR := .
endif
# If we have a machine-specific directory, then include it in the build.
MACHDIR := arch/arm/mach-$(MACHINE)
ifeq ($(MACHDIR),$(wildcard $(MACHDIR)))
SUBDIRS += $(MACHDIR)
CORE_FILES := $(MACHDIR)/$(MACHINE).o $(CORE_FILES)
# Do we have FASTFPE?
FASTFPE :=arch/arm/fastfpe
ifeq ($(FASTFPE),$(wildcard $(FASTFPE)))
SUBDIRS +=$(FASTFPE)
FASTFPE_OBJ :=$(FASTFPE)/fast-math-emu.o
endif
HEAD := arch/arm/kernel/head-$(PROCESSOR).o \
arch/arm/kernel/init_task.o
SUBDIRS += arch/arm/kernel arch/arm/mm arch/arm/lib arch/arm/nwfpe
CORE_FILES := arch/arm/kernel/kernel.o arch/arm/mm/mm.o $(CORE_FILES)
LIBS := arch/arm/lib/lib.a $(LIBS)
# If we have a machine-specific directory, then include it in the build.
SUBDIRS +=arch/arm/mach-$(MACHINE) \
arch/arm/kernel arch/arm/mm arch/arm/lib arch/arm/nwfpe
CORE_FILES :=arch/arm/mach-$(MACHINE)/$(MACHINE).o \
arch/arm/kernel/kernel.o arch/arm/mm/mm.o $(CORE_FILES)
LIBS :=arch/arm/lib/lib.a $(LIBS)
ifeq ($(CONFIG_FPE_NWFPE),y)
LIBS := arch/arm/nwfpe/math-emu.o $(LIBS)
LIBS :=arch/arm/nwfpe/math-emu.o $(LIBS)
endif
# Only include fastfpe if it is part of the kernel tree.
FASTFPE := arch/arm/fastfpe
ifeq ($(FASTFPE),$(wildcard $(FASTFPE)))
SUBDIRS += $(FASTFPE)
ifeq ($(CONFIG_FPE_FASTFPE),y)
LIBS := arch/arm/fastfpe/fast-math-emu.o $(LIBS)
endif
LIBS :=$(FASTFPE_OBJ) $(LIBS)
endif
ifeq ($(findstring y,$(CONFIG_ARCH_CLPS7500) $(CONFIG_ARCH_L7200)),y)
SUBDIRS += drivers/acorn/char
DRIVERS += drivers/acorn/char/acorn-char.o
SUBDIRS +=drivers/acorn/char
DRIVERS +=drivers/acorn/char/acorn-char.o
endif
MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot
MAKETOOLS = $(MAKE) -C arch/$(ARCH)/tools
MAKEBOOT =$(MAKE) -C arch/$(ARCH)/boot
MAKETOOLS =$(MAKE) -C arch/$(ARCH)/tools
# The following is a hack to get 'constants.h' up
# to date before starting compilation
......@@ -254,7 +262,7 @@ bp:; @$(MAKEBOOT) bootpImage
@( \
CFG=$(@:_config=); \
if [ -f arch/arm/def-configs/$$CFG ]; then \
[ -f .config ] && $(MV) .config .config.old; \
[ -f .config ] && mv -f .config .config.old; \
cp arch/arm/def-configs/$$CFG .config; \
echo "*** Default configuration for $$CFG installed"; \
echo "*** Next, you may run 'make oldconfig'"; \
......
......@@ -118,6 +118,22 @@ ifeq ($(CONFIG_ARCH_ANAKIN),y)
ZTEXTADDR = 0x20008000
endif
ifeq ($(CONFIG_ARCH_IQ80310),y)
ZRELADDR = 0xa0008000
# for serial upload
ZTEXTADDR = 0xa1008000
# for direct flash execution
# ZTEXTADDR = 0x00060000
# ZBSSADDR = 0xa1008000
endif
ifeq ($(CONFIG_ARCH_ADIFCC),y)
ZRELADDR = 0xc0008000
ZTEXTADDR = 0xc1000000
endif
#
# If you don't define ZRELADDR above,
# then it defaults to ZTEXTADDR
......
......@@ -9,7 +9,7 @@
HEAD = head.o
OBJS = misc.o
CFLAGS = $(CPPFLAGS) -O2 -DSTDC_HEADERS $(CFLAGS_PROC) -msoft-float
CFLAGS = $(CPPFLAGS) -O2 -DSTDC_HEADERS $(CFLAGS_BOOT)
FONTC = $(TOPDIR)/drivers/video/font_acorn_8x8.c
ZLDFLAGS = -p -X -T vmlinux.lds
......@@ -57,6 +57,10 @@ ifeq ($(CONFIG_SA1100_NANOENGINE),y)
endif
endif
ifeq ($(CONFIG_CPU_XSCALE),y)
OBJS += head-xscale.o
endif
SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/LOAD_ADDR/$(ZRELADDR)/;
ifneq ($(ZBSSADDR),)
......@@ -84,12 +88,12 @@ piggy.o: $(SYSTEM)
font.o: $(FONTC)
$(CC) $(CFLAGS) -Dstatic= -c -o $@ $(FONTC)
vmlinux.lds: vmlinux.lds.in
vmlinux.lds: vmlinux.lds.in Makefile $(TOPDIR)/arch/$(ARCH)/boot/Makefile $(TOPDIR)/.config
@sed "$(SEDFLAGS)" < vmlinux.lds.in > $@
clean:; rm -f vmlinux core piggy* vmlinux.lds
.PHONY: vmlinux.lds clean
.PHONY: clean
misc.o: misc.c $(TOPDIR)/include/asm/arch/uncompress.h $(TOPDIR)/lib/inflate.c
......
/* The head-file for the Shark
* by Alexander Schulz <aschulz@netwinder.org>
* by Alexander Schulz
*
* Does the following:
* - get the memory layout from firmware. This can only be done as long as the mmu
......
/*
* linux/arch/arm/boot/compressed/head-xscale.S
*
* XScale specific tweaks. This is merged into head.S by the linker.
*
*/
#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/mach-types.h>
.section ".start", #alloc, #execinstr
__XScale_start:
@ Preserve r8/r7 i.e. kernel entry values
@ Data cache might be active.
@ Be sure to flush kernel binary out of the cache,
@ whatever state it is, before it is turned off.
@ This is done by fetching through currently executed
@ memory to be sure we hit the same cache.
bic r2, pc, #0x1f
add r3, r2, #0x10000 @ 64 kb is quite enough...
1: ldr r0, [r2], #32
teq r2, r3
bne 1b
mcr p15, 0, r0, c7, c10, 4 @ drain WB
mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
@ disabling MMU and caches
mrc p15, 0, r0, c1, c0, 0 @ read control reg
bic r0, r0, #0x05 @ clear DC, MMU
bic r0, r0, #0x1000 @ clear Icache
mcr p15, 0, r0, c1, c0, 0
#ifdef CONFIG_ARCH_LUBBOCK
mov r7, #MACH_TYPE_LUBBOCK
#endif
#ifdef CONFIG_ARCH_COTULLA_IDP
mov r7, #MACH_TYPE_COTULLA_IDP
#endif
#ifdef CONFIG_ARCH_IQ80310
/*
* Crank the CPU up to 733MHz
*/
mov r1, #9
mcr p14, 0, r1, c6, c0, 0
/*
* Disable ECC error notification
* At some point, we should add an ECC handler to Linux
*/
mov r1, #0x1500
mov r0, #0x4
str r0, [r1, #0x34]
mov r7, #MACH_TYPE_IQ80310
#endif
#ifdef CONFIG_ARCH_ADI_EVB
mov r7, #MACH_TYPE_ADI_EVB
#endif
......@@ -64,7 +64,7 @@
kphex r7, 8 /* architecture id */
kputc #':'
mrc p15, 0, r0, c1, c0
kphex r0, 8 /* control reg
kphex r0, 8 /* control reg */
kputc #'\n'
kphex r5, 8 /* decompressed kernel start */
kputc #'-'
......@@ -218,7 +218,12 @@ cache_on: ldr r1, proc_sa110_type
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #4
movne pc, lr
beq 1f
ldr r1, proc_xscale_type
eor r1, r1, r6
movs r1, r1, lsr #16
@ movne pc, lr
bne cache_off
1:
sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
......@@ -379,10 +384,14 @@ cache_clean_flush:
ldr r1, proc_sa1110_type
eor r1, r1, r6
movs r1, r1, lsr #4
beq 1f
ldr r1, proc_xscale_type
eor r1, r1, r6
movs r1, r1, lsr #16
movne pc, lr
1:
bic r1, pc, #31
add r2, r1, #32768
add r2, r1, #65536 @ 2x the largest dcache size
1: ldr r12, [r1], #32 @ s/w flush D cache
teq r1, r2
bne 1b
......@@ -391,6 +400,12 @@ cache_clean_flush:
mcr p15, 0, r1, c7, c10, 4 @ drain WB
mov pc, lr
.type proc_xscale_type,#object
proc_xscale_type:
.word 0x69050000
.size proc_xscale_type, . - proc_xscale_type
/*
* Various debugging routines for printing hex characters and
* memory, which again must be relocatable.
......
/*
* linux/arch/arm/boot/compressed/ofw-shark.c
*
* by Alexander Schulz <aschulz@netwinder.org>
* by Alexander Schulz
*
* This file is used to get some basic information
* about the memory layout of the shark we are running
......
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......@@ -7,25 +7,9 @@
USE_STANDARD_AS_RULE := true
HEAD_OBJ = head-$(PROCESSOR).o
ENTRY_OBJ = entry-$(PROCESSOR).o
AFLAGS_head-armv.o := -DTEXTADDR=$(TEXTADDR)
AFLAGS_head-armo.o := -DTEXTADDR=$(TEXTADDR)
# This is depreciated.
O_OBJS_arc = dma-arc.o oldlatches.o
O_OBJS_rpc = dma-rpc.o
O_OBJS_footbridge = dma-footbridge.o isa.o
O_OBJS_l7200 = fiq.o
pci-ftvpci = plx90x0.o
pci-footbridge = dec21285.o
pci-shark = via82c505.o
# this is here to allow us to eventually move it out to mach-ftvpci
pci-$(CONFIG_ARCH_FTVPCI) += ftv-pci.o
AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR)
O_TARGET := kernel.o
......@@ -33,34 +17,35 @@ O_TARGET := kernel.o
obj-y := arch.o compat.o dma.o $(ENTRY_OBJ) entry-common.o irq.o \
process.o ptrace.o semaphore.o setup.o signal.o sys_arm.o \
time.o traps.o $(O_OBJS_$(MACHINE))
time.o traps.o
obj-m :=
obj-n :=
obj- :=
export-objs := armksyms.o dma.o ecard.o fiq.o io.o oldlatches.o time.o
no-irq-arch := $(CONFIG_ARCH_INTEGRATOR) $(CONFIG_ARCH_CLPS711X) \
$(CONFIG_FOOTBRIDGE) $(CONFIG_ARCH_EBSA110) \
$(CONFIG_ARCH_SA1100) $(CONFIG_ARCH_CAMELOT)
export-objs := armksyms.o apm.o dma.o ecard.o fiq.o io.o time.o
ifneq ($(findstring y,$(no-irq-arch)),y)
obj-y += irq-arch.o
endif
obj-$(CONFIG_ARCH_ACORN) += ecard.o fiq.o time-acorn.o
obj-$(CONFIG_APM) += apm.o
obj-$(CONFIG_ARCH_ACORN) += ecard.o time-acorn.o
obj-$(CONFIG_ARCH_CLPS7500) += time-acorn.o
obj-$(CONFIG_DEBUG_LL) += debug-$(PROCESSOR).o
obj-$(CONFIG_FOOTBRIDGE) += isa.o
obj-$(CONFIG_FIQ) += fiq.o
obj-$(CONFIG_MODULES) += armksyms.o
obj-$(CONFIG_ARTHUR) += arthur.o
obj-$(CONFIG_ISA_DMA) += dma-isa.o
obj-$(CONFIG_PCI) += bios32.o $(pci-$(MACHINE)) $(pci-y)
obj-$(CONFIG_PCI) += bios32.o
obj-$(CONFIG_PCI_HOST_PLX90X0) += plx90x0.o
obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
ifneq ($(MACHINE),ebsa110)
obj-y += io.o
endif
all: kernel.o $(HEAD_OBJ) init_task.o
ifeq ($(CONFIG_CPU_32),y)
head-y := head.o
obj-$(CONFIG_DEBUG_LL) += debug.o
endif
all: kernel.o $(head-y) init_task.o
include $(TOPDIR)/Rules.make
......
......@@ -4,19 +4,13 @@
* Architecture specific fixups.
*/
#include <linux/config.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/init.h>
#include <linux/types.h>
#include <asm/elf.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/dec21285.h>
extern void genarch_init_irq(void);
unsigned int vram_size;
......@@ -49,129 +43,4 @@ static int __init parse_tag_acorn(const struct tag *tag)
__tagtable(ATAG_ACORN, parse_tag_acorn);
#ifdef CONFIG_ARCH_RPC
static void __init
fixup_riscpc(struct machine_desc *desc, struct param_struct *unusd,
char **cmdline, struct meminfo *mi)
{
/*
* RiscPC can't handle half-word loads and stores
*/
elf_hwcap &= ~HWCAP_HALF;
}
extern void __init rpc_map_io(void);
MACHINE_START(RISCPC, "Acorn-RiscPC")
MAINTAINER("Russell King")
BOOT_MEM(0x10000000, 0x03000000, 0xe0000000)
BOOT_PARAMS(0x10000100)
DISABLE_PARPORT(0)
DISABLE_PARPORT(1)
FIXUP(fixup_riscpc)
MAPIO(rpc_map_io)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_ARC
MACHINE_START(ARCHIMEDES, "Acorn-Archimedes")
MAINTAINER("Dave Gilbert")
BOOT_PARAMS(0x0207c000)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_A5K
MACHINE_START(A5K, "Acorn-A5000")
MAINTAINER("Russell King")
BOOT_PARAMS(0x0207c000)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#endif
#ifdef CONFIG_ARCH_L7200
extern void __init l7200_map_io(void);
static void __init
fixup_l7200(struct machine_desc *desc, struct param_struct *unused,
char **cmdline, struct meminfo *mi)
{
mi->nr_banks = 1;
mi->bank[0].start = PHYS_OFFSET;
mi->bank[0].size = (32*1024*1024);
mi->bank[0].node = 0;
ROOT_DEV = MKDEV(RAMDISK_MAJOR,0);
setup_ramdisk( 1, 0, 0, CONFIG_BLK_DEV_RAM_SIZE);
setup_initrd( __phys_to_virt(0xf1000000), 0x005dac7b);
/* Serial Console COM2 and LCD */
strcpy( *cmdline, "console=tty0 console=ttyLU1,115200");
/* Serial Console COM1 and LCD */
//strcpy( *cmdline, "console=tty0 console=ttyLU0,115200");
/* Console on LCD */
//strcpy( *cmdline, "console=tty0");
}
MACHINE_START(L7200, "LinkUp Systems L7200")
MAINTAINER("Steve Hill / Scott McConnell")
BOOT_MEM(0xf0000000, 0x80040000, 0xd0000000)
FIXUP(fixup_l7200)
MAPIO(l7200_map_io)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_NEXUSPCI
extern void __init nexuspci_map_io(void);
MACHINE_START(NEXUSPCI, "FTV/PCI")
MAINTAINER("Philip Blundell")
BOOT_MEM(0x40000000, 0x10000000, 0xe0000000)
MAPIO(nexuspci_map_io)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_TBOX
extern void __init tbox_map_io(void);
MACHINE_START(TBOX, "unknown-TBOX")
MAINTAINER("Philip Blundell")
BOOT_MEM(0x80000000, 0x00400000, 0xe0000000)
MAPIO(tbox_map_io)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_CLPS7110
MACHINE_START(CLPS7110, "CL-PS7110")
MAINTAINER("Werner Almesberger")
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_ETOILE
MACHINE_START(ETOILE, "Etoile")
MAINTAINER("Alex de Vries")
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_LACIE_NAS
MACHINE_START(LACIE_NAS, "LaCie_NAS")
MAINTAINER("Benjamin Herrenschmidt")
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
#ifdef CONFIG_ARCH_CLPS7500
extern void __init clps7500_map_io(void);
MACHINE_START(CLPS7500, "CL-PS7500")
MAINTAINER("Philip Blundell")
BOOT_MEM(0x10000000, 0x03000000, 0xe0000000)
MAPIO(clps7500_map_io)
INITIRQ(genarch_init_irq)
MACHINE_END
#endif
......@@ -19,6 +19,7 @@
#include <linux/in6.h>
#include <linux/interrupt.h>
#include <linux/pm.h>
#include <linux/tty.h>
#include <linux/vt_kern.h>
#include <asm/byteorder.h>
......@@ -77,7 +78,7 @@ extern void fp_enter(void);
extern void __do_softirq(void);
#define EXPORT_SYMBOL_ALIAS(sym,orig) \
const char __kstrtab_##sym##[] \
const char __kstrtab_##sym[] \
__attribute__((section(".kstrtab"))) = \
__MODULE_STRING(sym); \
const struct module_symbol __ksymtab_##sym \
......@@ -115,7 +116,9 @@ EXPORT_SYMBOL(kernel_thread);
EXPORT_SYMBOL(system_rev);
EXPORT_SYMBOL(system_serial_low);
EXPORT_SYMBOL(system_serial_high);
#ifdef CONFIG_DEBUG_BUGVERBOSE
EXPORT_SYMBOL(__bug);
#endif
EXPORT_SYMBOL(__bad_xchg);
EXPORT_SYMBOL(__readwrite_bug);
EXPORT_SYMBOL(enable_irq);
......@@ -231,14 +234,25 @@ EXPORT_SYMBOL_NOVERS(__udivsi3);
EXPORT_SYMBOL_NOVERS(__umodsi3);
/* bitops */
EXPORT_SYMBOL(set_bit);
EXPORT_SYMBOL(test_and_set_bit);
EXPORT_SYMBOL(clear_bit);
EXPORT_SYMBOL(test_and_clear_bit);
EXPORT_SYMBOL(change_bit);
EXPORT_SYMBOL(test_and_change_bit);
EXPORT_SYMBOL(find_first_zero_bit);
EXPORT_SYMBOL(find_next_zero_bit);
EXPORT_SYMBOL(_set_bit_le);
EXPORT_SYMBOL(_test_and_set_bit_le);
EXPORT_SYMBOL(_clear_bit_le);
EXPORT_SYMBOL(_test_and_clear_bit_le);
EXPORT_SYMBOL(_change_bit_le);
EXPORT_SYMBOL(_test_and_change_bit_le);
EXPORT_SYMBOL(_find_first_zero_bit_le);
EXPORT_SYMBOL(_find_next_zero_bit_le);
#ifdef __ARMEB__
EXPORT_SYMBOL(_set_bit_be);
EXPORT_SYMBOL(_test_and_set_bit_be);
EXPORT_SYMBOL(_clear_bit_be);
EXPORT_SYMBOL(_test_and_clear_bit_be);
EXPORT_SYMBOL(_change_bit_be);
EXPORT_SYMBOL(_test_and_change_bit_be);
EXPORT_SYMBOL(_find_first_zero_bit_be);
EXPORT_SYMBOL(_find_next_zero_bit_be);
#endif
/* elf */
EXPORT_SYMBOL(elf_platform);
......
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......@@ -89,10 +89,12 @@ static void __init build_tag_list(struct param_struct *params, void *taglist, in
}
#ifdef CONFIG_FOOTBRIDGE
if (params->u1.s.mem_fclk_21285) {
tag = tag_next(tag);
tag->hdr.tag = ATAG_MEMCLK;
tag->hdr.size = tag_size(tag_memclk);
tag->u.memclk.fmemclk = params->u1.s.mem_fclk_21285;
}
#endif
#ifdef CONFIG_ARCH_ACORN
......
......@@ -95,7 +95,7 @@ static void isa_enable_dma(dmach_t channel, dma_t *dma)
* coherence.
*/
dma->buf.dma_address = pci_map_single(NULL,
dma->buf.address, dma->buf.length,
dma->buf.__address, dma->buf.length,
direction);
}
......
......@@ -139,7 +139,7 @@ void set_dma_addr (dmach_t channel, unsigned long physaddr)
dma->sg = &dma->buf;
dma->sgcount = 1;
dma->buf.address = bus_to_virt(physaddr);
dma->buf.__address = bus_to_virt(physaddr);
dma->using_sg = 0;
dma->invalid = 1;
}
......@@ -275,6 +275,8 @@ GLOBAL_ALIAS(init_dma, get_dma_residue);
#endif
EXPORT_SYMBOL(request_dma);
EXPORT_SYMBOL(free_dma);
EXPORT_SYMBOL(enable_dma);
EXPORT_SYMBOL(disable_dma);
EXPORT_SYMBOL(set_dma_addr);
......
......@@ -169,7 +169,7 @@ vector_undefinstr:
bne __und_svc
save_user_regs
zero_fp
teqp pc, #I_BIT | MODE_SVC
teqp pc, #PSR_I_BIT | MODE_SVC
.Lbug_undef:
ldr r4, .LC2
ldr pc, [r4] @ Call FP module USR entry point
......
......@@ -548,6 +548,39 @@ ENTRY(anakin_active_irqs)
.text
.endm
#elif defined(CONFIG_ARCH_IOP310) || defined(CONFIG_ARCH_ADIFCC)
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mrc p13, 0, \irqstat, c4, c0, 0 @ get INTSRC
mrc p13, 0, \base, c0, c0, 0 @ get INTCTL
tst \irqstat, #(1<<29) @ if INTSRC_BI
tstne \base, #(1<<3) @ and INTCTL_BM
movne \irqnr, #IRQ_XS80200_BCU
bne 1001f
tst \irqstat, #(1<<28) @ if INTSRC_PI
tstne \base, #(1<<2) @ and INTCTL_PM
movne \irqnr, #IRQ_XS80200_PMU
bne 1001f
tst \irqstat, #(1<<31) @ if INTSRC_FI
tstne \base, #(1<<0) @ and INTCTL_FM
movne \irqnr, #IRQ_XS80200_EXTFIQ
bne 1001f
tst \irqstat, #(1<<30) @ if INTSRC_II
tstne \base, #(1<<1) @ and INTCTL_IM
movne \irqnr, #IRQ_XS80200_EXTIRQ
1001:
.endm
.macro irq_prio_table
.endm
#else
#error Unknown architecture
#endif
......@@ -641,23 +674,23 @@ __dabt_svc: sub sp, sp, #S_FRAME_SIZE
mov r1, lr
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
mrs r9, cpsr @ Enable interrupts if they were
tst r3, #I_BIT
biceq r9, r9, #I_BIT @ previously
mov r0, r2
tst r3, #PSR_I_BIT
biceq r9, r9, #PSR_I_BIT @ previously
mov r0, r2 @ *** remove once everyones in sync
/*
* This routine must not corrupt r9
*/
#ifdef MULTI_CPU
ldr r2, .LCprocfns @ pass r0, r3 to
ldr r4, .LCprocfns @ pass r0, r3 to
mov lr, pc @ processor code
ldr pc, [r2] @ call processor specific code
ldr pc, [r4] @ call processor specific code
#else
bl cpu_data_abort
#endif
msr cpsr_c, r9
mov r2, sp
bl SYMBOL_NAME(do_DataAbort)
mov r0, #I_BIT | MODE_SVC
mov r0, #PSR_I_BIT | MODE_SVC
msr cpsr_c, r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
......@@ -700,7 +733,7 @@ __und_svc: sub sp, sp, #S_FRAME_SIZE
mov r1, sp @ struct pt_regs *regs
bl SYMBOL_NAME(do_undefinstr)
1: mov r0, #I_BIT | MODE_SVC
1: mov r0, #PSR_I_BIT | MODE_SVC
msr cpsr_c, r0
ldr lr, [sp, #S_PSR] @ Get SVC cpsr
msr spsr, lr
......@@ -716,13 +749,13 @@ __pabt_svc: sub sp, sp, #S_FRAME_SIZE
mov r1, lr
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
mrs r9, cpsr @ Enable interrupts if they were
tst r3, #I_BIT
biceq r9, r9, #I_BIT @ previously
tst r3, #PSR_I_BIT
biceq r9, r9, #PSR_I_BIT @ previously
msr cpsr_c, r9
mov r0, r2 @ address (pc)
mov r1, sp @ regs
bl SYMBOL_NAME(do_PrefetchAbort) @ call abort handler
mov r0, #I_BIT | MODE_SVC
mov r0, #PSR_I_BIT | MODE_SVC
msr cpsr_c, r0
ldr r0, [sp, #S_PSR]
msr spsr, r0
......@@ -747,15 +780,16 @@ __dabt_usr: sub sp, sp, #S_FRAME_SIZE @ Allocate frame size in one go
stmia sp, {r0 - r12} @ save r0 - r12
ldr r7, .LCabt
add r5, sp, #S_PC
ldmia r7, {r0, r3, r4} @ Get USR pc, cpsr
stmia r5, {r0, r3, r4} @ Save USR pc, cpsr, old_r0
ldmia r7, {r2 - r4} @ Get USR pc, cpsr
stmia r5, {r2 - r4} @ Save USR pc, cpsr, old_r0
stmdb r5, {sp, lr}^
alignment_trap r7, r7, __temp_abt
zero_fp
mov r0, r2 @ remove once everyones in sync
#ifdef MULTI_CPU
ldr r2, .LCprocfns @ pass r0, r3 to
ldr r4, .LCprocfns @ pass r0, r3 to
mov lr, pc @ processor code
ldr pc, [r2] @ call processor specific code
ldr pc, [r4] @ call processor specific code
#else
bl cpu_data_abort
#endif
......@@ -883,7 +917,7 @@ vector_IRQ: @
@
@ now branch to the relevent MODE handling routine
@
mov r13, #I_BIT | MODE_SVC
mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode
and lr, lr, #15
......@@ -924,7 +958,7 @@ vector_data: @
@
@ now branch to the relevent MODE handling routine
@
mov r13, #I_BIT | MODE_SVC
mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode
and lr, lr, #15
......@@ -966,7 +1000,7 @@ vector_prefetch:
@
@ now branch to the relevent MODE handling routine
@
mov r13, #I_BIT | MODE_SVC
mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode
ands lr, lr, #15
......@@ -1007,7 +1041,7 @@ vector_undefinstr:
@
@ now branch to the relevent MODE handling routine
@
mov r13, #I_BIT | MODE_SVC
mov r13, #PSR_I_BIT | MODE_SVC
msr spsr_c, r13 @ switch to SVC_32 mode
and lr, lr, #15
......
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