Commit d106de38 authored by Haojian Zhuang's avatar Haojian Zhuang Committed by Russell King

ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b

If CONFIG_ARCH_MULTIPLATFORM & CONFIG_ARCH_MVEBU are both enabled,
__v7_pj4b_setup is added between __v7_ca9mp_setup and __v7_setup.

But there's no jump instruction added. If the chip is Cortex A5/A9,
it goes through __v7_pj4b_setup also. It results in system hang.
Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent a47e3bc1
...@@ -169,6 +169,7 @@ __v7_ca15mp_setup: ...@@ -169,6 +169,7 @@ __v7_ca15mp_setup:
orreq r0, r0, r10 @ Enable CPU-specific SMP bits orreq r0, r0, r10 @ Enable CPU-specific SMP bits
mcreq p15, 0, r0, c1, c0, 1 mcreq p15, 0, r0, c1, c0, 1
#endif #endif
b __v7_setup
__v7_pj4b_setup: __v7_pj4b_setup:
#ifdef CONFIG_CPU_PJ4B #ifdef CONFIG_CPU_PJ4B
......
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