Skip to content

L
linux
Commit d11cad54 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Linus Torvalds
Browse files
Options

[PATCH] AMD/nForce driver update 

From Vojtech Pavlik <vojtech@suse.cz>.

Change AMD8111 and nForce2 max speed to UDMA133.

Add workaround for Serenade mainboards which only handle UDMA100.

Fix printing of chipset name.

Fix some whitspace issues.
parent 4ad8b26a
Show whitespace changes
Inline Side-by-side
Showing with 71 additions and 59 deletions
drivers/ide/pci/amd74xx.c
View file @ d11cad54
/* /*
* Version 2.12 * Version 2.13
* *
* AMD 755/756/766/8111 and nVidia nForce IDE driver for Linux. * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s IDE driver for Linux.
* *
* Copyright (c) 2000-2002 Vojtech Pavlik * Copyright (c) 2000-2002 Vojtech Pavlik
* *
...@@ -40,9 +40,11 @@ ...@@ -40,9 +40,11 @@
#define AMD_UDMA_33 0x01 #define AMD_UDMA_33 0x01
#define AMD_UDMA_66 0x02 #define AMD_UDMA_66 0x02
#define AMD_UDMA_100 0x03 #define AMD_UDMA_100 0x03
#define AMD_UDMA_133 0x04
#define AMD_CHECK_SWDMA 0x08 #define AMD_CHECK_SWDMA 0x08
#define AMD_BAD_SWDMA 0x10 #define AMD_BAD_SWDMA 0x10
#define AMD_BAD_FIFO 0x20 #define AMD_BAD_FIFO 0x20
#define AMD_CHECK_SERENADE 0x40
/* /*
* AMD SouthBridge chips. * AMD SouthBridge chips.
...@@ -50,39 +52,33 @@ ...@@ -50,39 +52,33 @@
static struct amd_ide_chip { static struct amd_ide_chip {
unsigned short id; unsigned short id;
unsigned char rev;
unsigned long base; unsigned long base;
unsigned char flags; unsigned char flags;
} amd_ide_chips[] = { } amd_ide_chips[] = {
{ PCI_DEVICE_ID_AMD_COBRA_7401, 0x00, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA }, /* AMD-755 Cobra */ { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA },
{ PCI_DEVICE_ID_AMD_VIPER_7409, 0x00, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA }, /* AMD-756 Viper */ { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA },
{ PCI_DEVICE_ID_AMD_VIPER_7411, 0x00, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO }, /* AMD-766 Viper */ { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO },
{ PCI_DEVICE_ID_AMD_OPUS_7441, 0x00, 0x40, AMD_UDMA_100 }, /* AMD-768 Opus */ { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 },
{ PCI_DEVICE_ID_AMD_8111_IDE, 0x00, 0x40, AMD_UDMA_100 }, /* AMD-8111 */ { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE },
{ PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x00, 0x50, AMD_UDMA_100 }, /* nVidia nForce */ { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x00, 0x50, AMD_UDMA_100 }, /* nVidia nForce 2 */ { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 },
/* nVidia nForce2s */ { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x00, 0x50, AMD_UDMA_100 }, { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 },
/* nVidia nForce2s SATA */ { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x00, 0x50, AMD_UDMA_100 }, { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 },
/* nVidia nForce3 */ { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 },
{ PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x00, 0x50, AMD_UDMA_100 }, { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 },
/* nVidia nForce3s */
{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x00, 0x50, AMD_UDMA_100 },
/* nVidia nForce3s SATA */
{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x00, 0x50, AMD_UDMA_100 },
/* nVidia nForce3s SATA2 */
{ PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x00, 0x50, AMD_UDMA_100 },
{ 0 } { 0 }
}; };
static struct amd_ide_chip *amd_config; static struct amd_ide_chip *amd_config;
static ide_pci_device_t *amd_chipset;
static unsigned int amd_80w; static unsigned int amd_80w;
static unsigned int amd_clock; static unsigned int amd_clock;
static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3 }; static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
static unsigned char amd_udma2cyc[] = { 4, 6, 8, 10, 3, 2, 1, 1 }; static unsigned char amd_udma2cyc[] = { 4, 6, 8, 10, 3, 2, 1, 15 };
static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100" }; static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
/* /*
* AMD /proc entry. * AMD /proc entry.
...@@ -114,7 +110,7 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) ...@@ -114,7 +110,7 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count)
amd_print("----------AMD BusMastering IDE Configuration----------------"); amd_print("----------AMD BusMastering IDE Configuration----------------");
amd_print("Driver Version: 2.12"); amd_print("Driver Version: 2.13");
amd_print("South Bridge: %s", pci_name(bmide_dev)); amd_print("South Bridge: %s", pci_name(bmide_dev));
pci_read_config_byte(dev, PCI_REVISION_ID, &t); pci_read_config_byte(dev, PCI_REVISION_ID, &t);
...@@ -165,6 +161,12 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) ...@@ -165,6 +161,12 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count)
continue; continue;
} }
if (den[i] && uen[i] && udma[i] == 15) {
speed[i] = amd_clock * 4;
cycle[i] = 500000 / amd_clock;
continue;
}
speed[i] = 4 * amd_clock / ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2); speed[i] = 4 * amd_clock / ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2);
cycle[i] = 1000000 * ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2) / amd_clock / 2; cycle[i] = 1000000 * ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2) / amd_clock / 2;
} }
...@@ -210,6 +212,7 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi ...@@ -210,6 +212,7 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break;
case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break;
case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break;
default: return; default: return;
} }
...@@ -244,6 +247,7 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) ...@@ -244,6 +247,7 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
} }
if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1; if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t); amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
...@@ -283,7 +287,8 @@ static int amd74xx_ide_dma_check(ide_drive_t *drive) ...@@ -283,7 +287,8 @@ static int amd74xx_ide_dma_check(ide_drive_t *drive)
XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA | XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA |
((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) | ((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) |
(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) | (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) |
(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0)); (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) |
(w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0));
amd_set_drive(drive, speed); amd_set_drive(drive, speed);
...@@ -319,13 +324,15 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -319,13 +324,15 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
switch (amd_config->flags & AMD_UDMA) { switch (amd_config->flags & AMD_UDMA) {
case AMD_UDMA_133:
case AMD_UDMA_100: case AMD_UDMA_100:
pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); pci_read_config_byte(dev, AMD_CABLE_DETECT, &t);
pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0); amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0);
for (i = 24; i >= 0; i -= 8) for (i = 24; i >= 0; i -= 8)
if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) { if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) {
printk(KERN_WARNING "AMD_IDE: Bios didn't set cable bits correctly. Enabling workaround.\n"); printk(KERN_WARNING "%s: BIOS didn't set cable bits correctly. Enabling workaround.\n",
amd_chipset->name);
amd_80w |= (1 << (1 - (i >> 4))); amd_80w |= (1 << (1 - (i >> 4)));
} }
break; break;
...@@ -346,6 +353,15 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -346,6 +353,15 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
pci_write_config_byte(dev, AMD_IDE_CONFIG, pci_write_config_byte(dev, AMD_IDE_CONFIG,
(amd_config->flags & AMD_BAD_FIFO) ? (t & 0x0f) : (t | 0xf0)); (amd_config->flags & AMD_BAD_FIFO) ? (t & 0x0f) : (t | 0xf0));
/*
* Take care of incorrectly wired Serenade mainboards.
*/
if ((amd_config->flags & AMD_CHECK_SERENADE) &&
dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
amd_config->flags = AMD_UDMA_100;
/* /*
* Determine the system bus clock. * Determine the system bus clock.
*/ */
...@@ -359,8 +375,10 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -359,8 +375,10 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
} }
if (amd_clock < 20000 || amd_clock > 50000) { if (amd_clock < 20000 || amd_clock > 50000) {
printk(KERN_WARNING "AMD_IDE: User given PCI clock speed impossible (%d), using 33 MHz instead.\n", amd_clock); printk(KERN_WARNING "%s: User given PCI clock speed impossible (%d), using 33 MHz instead.\n",
printk(KERN_WARNING "AMD_IDE: Use ide0=ata66 if you want to assume 80-wire cable\n"); amd_chipset->name, amd_clock);
printk(KERN_WARNING "%s: Use ide0=ata66 if you want to assume 80-wire cable\n",
amd_chipset->name);
amd_clock = 33333; amd_clock = 33333;
} }
...@@ -369,8 +387,8 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -369,8 +387,8 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
*/ */
pci_read_config_byte(dev, PCI_REVISION_ID, &t); pci_read_config_byte(dev, PCI_REVISION_ID, &t);
printk(KERN_INFO "AMD_IDE: %s (rev %02x) %s controller on pci%s\n", printk(KERN_INFO "%s: %s (rev %02x) %s controller\n",
pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA], pci_name(dev)); amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]);
/* /*
* Register /proc/ide/amd74xx entry * Register /proc/ide/amd74xx entry
...@@ -385,8 +403,7 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -385,8 +403,7 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
} }
#endif /* DISPLAY_AMD_TIMINGS && CONFIG_PROC_FS */ #endif /* DISPLAY_AMD_TIMINGS && CONFIG_PROC_FS */
return dev->irq;
return 0;
} }
static void __init init_hwif_amd74xx(ide_hwif_t *hwif) static void __init init_hwif_amd74xx(ide_hwif_t *hwif)
...@@ -426,35 +443,29 @@ extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *); ...@@ -426,35 +443,29 @@ extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
{ {
ide_pci_device_t *d = amd74xx_chipsets + id->driver_data; amd_chipset = amd74xx_chipsets + id->driver_data;
amd_config = amd_ide_chips + id->driver_data; amd_config = amd_ide_chips + id->driver_data;
if (dev->device != d->device) BUG(); if (dev->device != amd_chipset->device) BUG();
if (dev->device != amd_config->id) BUG(); if (dev->device != amd_config->id) BUG();
ide_setup_pci_device(dev, d); ide_setup_pci_device(dev, amd_chipset);
MOD_INC_USE_COUNT; MOD_INC_USE_COUNT;
return 0; return 0;
} }
static struct pci_device_id amd74xx_pci_tbl[] = { static struct pci_device_id amd74xx_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5}, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6}, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
{ 0, }, { 0, },
}; };
......
drivers/ide/pci/amd74xx.h
View file @ d11cad54
...@@ -123,7 +123,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -123,7 +123,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
{ /* 8 */ { /* 8 */
.vendor = PCI_VENDOR_ID_NVIDIA, .vendor = PCI_VENDOR_ID_NVIDIA,
.device = PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, .device = PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA,
.name = "NFORCE2S_SATA", .name = "NFORCE2S-SATA",
.init_chipset = init_chipset_amd74xx, .init_chipset = init_chipset_amd74xx,
.init_hwif = init_hwif_amd74xx, .init_hwif = init_hwif_amd74xx,
.channels = 2, .channels = 2,
...@@ -156,7 +156,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -156,7 +156,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
{ /* 11 */ { /* 11 */
.vendor = PCI_VENDOR_ID_NVIDIA, .vendor = PCI_VENDOR_ID_NVIDIA,
.device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA,
.name = "NFORCE3S_SATA", .name = "NFORCE3S-SATA",
.init_chipset = init_chipset_amd74xx, .init_chipset = init_chipset_amd74xx,
.init_hwif = init_hwif_amd74xx, .init_hwif = init_hwif_amd74xx,
.channels = 2, .channels = 2,
...@@ -167,7 +167,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -167,7 +167,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
{ /* 12 */ { /* 12 */
.vendor = PCI_VENDOR_ID_NVIDIA, .vendor = PCI_VENDOR_ID_NVIDIA,
.device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2,
.name = "NFORCE3S_SATA2", .name = "NFORCE3S-SATA2",
.init_chipset = init_chipset_amd74xx, .init_chipset = init_chipset_amd74xx,
.init_hwif = init_hwif_amd74xx, .init_hwif = init_hwif_amd74xx,
.channels = 2, .channels = 2,
......
include/linux/pci_ids.h
View file @ d11cad54
...@@ -440,6 +440,7 @@ ...@@ -440,6 +440,7 @@
#define PCI_DEVICE_ID_AMD_LANCE 0x2000 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
#define PCI_DEVICE_ID_AMD_SCSI 0x2020 #define PCI_DEVICE_ID_AMD_SCSI 0x2020
#define PCI_DEVICE_ID_AMD_SERENADE 0x36c0
#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 #define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 #define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C #define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7