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Commit d1a84718 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
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powerpc/64s/exception: INT_COMMON add DAR, DSISR, reconcile options 

Move DAR and DSISR saving to pt_regs into INT_COMMON. Also add an
option to expand RECONCILE_IRQ_STATE.
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190802105709.27696-33-npiggin@gmail.com
parent 8c9fb5d4
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Showing with 51 additions and 60 deletions
arch/powerpc/kernel/exceptions-64s.S
View file @ d1a84718
......@@ -398,7 +398,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
* If stack=0, then the stack is already set in r1, and r1 is saved in r10.
* PPR save and CPU accounting is not done for the !stack case (XXX why not?)
*/
.macro INT_COMMON vec, area, stack, kaup
.macro INT_COMMON vec, area, stack, kaup, reconcile, dar, dsisr
.if \stack
andi. r10,r12,MSR_PR /* See if coming from user */
mr r10,r1 /* Save r1 */
......@@ -442,6 +442,24 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
std r9,GPR11(r1)
std r10,GPR12(r1)
std r11,GPR13(r1)
.if \dar
.if \dar == 2
ld r10,_NIP(r1)
.else
ld r10,\area+EX_DAR(r13)
.endif
std r10,_DAR(r1)
.endif
.if \dsisr
.if \dsisr == 2
ld r10,_MSR(r1)
lis r11,DSISR_SRR1_MATCH_64S@h
and r10,r10,r11
.else
lwz r10,\area+EX_DSISR(r13)
.endif
std r10,_DSISR(r1)
.endif
BEGIN_FTR_SECTION_NESTED(66)
ld r10,\area+EX_CFAR(r13)
std r10,ORIG_GPR3(r1)
......@@ -468,6 +486,10 @@ END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66)
.if \stack
ACCOUNT_STOLEN_TIME
.endif
.if \reconcile
RECONCILE_IRQ_STATE(r10, r11)
.endif
.endm
/*
......@@ -665,9 +687,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
#define EXC_COMMON(name, realvec, hdlr) \
EXC_COMMON_BEGIN(name); \
INT_COMMON realvec, PACA_EXGEN, 1, 1 ; \
INT_COMMON realvec, PACA_EXGEN, 1, 1, 1, 0, 0 ; \
bl save_nvgprs; \
RECONCILE_IRQ_STATE(r10, r11); \
addi r3,r1,STACK_FRAME_OVERHEAD; \
bl hdlr; \
b ret_from_except
......@@ -678,9 +699,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
*/
#define EXC_COMMON_ASYNC(name, realvec, hdlr) \
EXC_COMMON_BEGIN(name); \
INT_COMMON realvec, PACA_EXGEN, 1, 1 ; \
INT_COMMON realvec, PACA_EXGEN, 1, 1, 1, 0, 0 ; \
FINISH_NAP; \
RECONCILE_IRQ_STATE(r10, r11); \
RUNLATCH_ON; \
addi r3,r1,STACK_FRAME_OVERHEAD; \
bl hdlr; \
......@@ -859,7 +879,7 @@ EXC_COMMON_BEGIN(system_reset_common)
mr r10,r1
ld r1,PACA_NMI_EMERG_SP(r13)
subi r1,r1,INT_FRAME_SIZE
INT_COMMON 0x100, PACA_EXNMI, 0, 1
INT_COMMON 0x100, PACA_EXNMI, 0, 1, 0, 0, 0
bl save_nvgprs
/*
* Set IRQS_ALL_DISABLED unconditionally so arch_irqs_disabled does
......@@ -970,12 +990,7 @@ EXC_COMMON_BEGIN(machine_check_early_common)
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
/* We don't touch AMR here, we never go to virtual mode */
INT_COMMON 0x200, PACA_EXMC, 0, 0
ld r3,PACA_EXMC+EX_DAR(r13)
lwz r4,PACA_EXMC+EX_DSISR(r13)
std r3,_DAR(r1)
std r4,_DSISR(r1)
INT_COMMON 0x200, PACA_EXMC, 0, 0, 0, 1, 1
BEGIN_FTR_SECTION
bl enable_machine_check
......@@ -1070,16 +1085,11 @@ EXC_COMMON_BEGIN(machine_check_common)
* Machine check is different because we use a different
* save area: PACA_EXMC instead of PACA_EXGEN.
*/
INT_COMMON 0x200, PACA_EXMC, 1, 1
INT_COMMON 0x200, PACA_EXMC, 1, 1, 1, 1, 1
FINISH_NAP
RECONCILE_IRQ_STATE(r10, r11)
ld r3,PACA_EXMC+EX_DAR(r13)
lwz r4,PACA_EXMC+EX_DSISR(r13)
/* Enable MSR_RI when finished with PACA_EXMC */
li r10,MSR_RI
mtmsrd r10,1
std r3,_DAR(r1)
std r4,_DSISR(r1)
bl save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
bl machine_check_exception
......@@ -1162,14 +1172,11 @@ EXC_COMMON_BEGIN(data_access_common)
* r9 - r13 are saved in paca->exgen.
* EX_DAR and EX_DSISR have saved DAR/DSISR
*/
INT_COMMON 0x300, PACA_EXGEN, 1, 1
RECONCILE_IRQ_STATE(r10, r11)
INT_COMMON 0x300, PACA_EXGEN, 1, 1, 1, 1, 1
ld r12,_MSR(r1)
ld r3,PACA_EXGEN+EX_DAR(r13)
lwz r4,PACA_EXGEN+EX_DSISR(r13)
ld r3,_DAR(r1)
ld r4,_DSISR(r1)
li r5,0x300
std r3,_DAR(r1)
std r4,_DSISR(r1)
BEGIN_MMU_FTR_SECTION
b do_hash_page /* Try to handle as hpte fault */
MMU_FTR_SECTION_ELSE
......@@ -1185,9 +1192,8 @@ EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
EXC_VIRT_END(data_access_slb, 0x4380, 0x80)
INT_KVM_HANDLER 0x380, EXC_STD, PACA_EXSLB, 1
EXC_COMMON_BEGIN(data_access_slb_common)
INT_COMMON 0x380, PACA_EXSLB, 1, 1
ld r4,PACA_EXSLB+EX_DAR(r13)
std r4,_DAR(r1)
INT_COMMON 0x380, PACA_EXSLB, 1, 1, 0, 1, 0
ld r4,_DAR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
BEGIN_MMU_FTR_SECTION
/* HPT case, do SLB fault */
......@@ -1218,14 +1224,11 @@ EXC_VIRT_BEGIN(instruction_access, 0x4400, 0x80)
EXC_VIRT_END(instruction_access, 0x4400, 0x80)
INT_KVM_HANDLER 0x400, EXC_STD, PACA_EXGEN, 0
EXC_COMMON_BEGIN(instruction_access_common)
INT_COMMON 0x400, PACA_EXGEN, 1, 1
RECONCILE_IRQ_STATE(r10, r11)
INT_COMMON 0x400, PACA_EXGEN, 1, 1, 1, 2, 2
ld r12,_MSR(r1)
ld r3,_NIP(r1)
andis. r4,r12,DSISR_SRR1_MATCH_64S@h
ld r3,_DAR(r1)
ld r4,_DSISR(r1)
li r5,0x400
std r3,_DAR(r1)
std r4,_DSISR(r1)
BEGIN_MMU_FTR_SECTION
b do_hash_page /* Try to handle as hpte fault */
MMU_FTR_SECTION_ELSE
......@@ -1241,8 +1244,8 @@ EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x80)
EXC_VIRT_END(instruction_access_slb, 0x4480, 0x80)
INT_KVM_HANDLER 0x480, EXC_STD, PACA_EXSLB, 0
EXC_COMMON_BEGIN(instruction_access_slb_common)
INT_COMMON 0x480, PACA_EXSLB, 1, 1
ld r4,_NIP(r1)
INT_COMMON 0x480, PACA_EXSLB, 1, 1, 0, 2, 0
ld r4,_DAR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
BEGIN_MMU_FTR_SECTION
/* HPT case, do SLB fault */
......@@ -1258,7 +1261,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
std r3,RESULT(r1)
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
ld r4,_NIP(r1)
ld r4,_DAR(r1)
ld r5,RESULT(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
bl do_bad_slb_fault
......@@ -1283,13 +1286,8 @@ EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
EXC_VIRT_END(alignment, 0x4600, 0x100)
INT_KVM_HANDLER 0x600, EXC_STD, PACA_EXGEN, 0
EXC_COMMON_BEGIN(alignment_common)
INT_COMMON 0x600, PACA_EXGEN, 1, 1
ld r3,PACA_EXGEN+EX_DAR(r13)
lwz r4,PACA_EXGEN+EX_DSISR(r13)
std r3,_DAR(r1)
std r4,_DSISR(r1)
INT_COMMON 0x600, PACA_EXGEN, 1, 1, 1, 1, 1
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
addi r3,r1,STACK_FRAME_OVERHEAD
bl alignment_exception
b ret_from_except
......@@ -1329,9 +1327,8 @@ EXC_COMMON_BEGIN(program_check_common)
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
b 3f /* Jump into the macro !! */
2:
INT_COMMON 0x700, PACA_EXGEN, 1, 1
INT_COMMON 0x700, PACA_EXGEN, 1, 1, 1, 0, 0
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
addi r3,r1,STACK_FRAME_OVERHEAD
bl program_check_exception
b ret_from_except
......@@ -1345,7 +1342,7 @@ EXC_VIRT_BEGIN(fp_unavailable, 0x4800, 0x100)
EXC_VIRT_END(fp_unavailable, 0x4800, 0x100)
INT_KVM_HANDLER 0x800, EXC_STD, PACA_EXGEN, 0
EXC_COMMON_BEGIN(fp_unavailable_common)
INT_COMMON 0x800, PACA_EXGEN, 1, 1
INT_COMMON 0x800, PACA_EXGEN, 1, 1, 0, 0, 0
bne 1f /* if from user, just load it up */
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
......@@ -1561,15 +1558,11 @@ EXC_VIRT_BEGIN(h_data_storage, 0x4e00, 0x20)
EXC_VIRT_END(h_data_storage, 0x4e00, 0x20)
INT_KVM_HANDLER 0xe00, EXC_HV, PACA_EXGEN, 1
EXC_COMMON_BEGIN(h_data_storage_common)
INT_COMMON 0xe00, PACA_EXGEN, 1, 1
INT_COMMON 0xe00, PACA_EXGEN, 1, 1, 1, 1, 1
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
addi r3,r1,STACK_FRAME_OVERHEAD
BEGIN_MMU_FTR_SECTION
ld r4,PACA_EXGEN+EX_DAR(r13)
lwz r5,PACA_EXGEN+EX_DSISR(r13)
std r4,_DAR(r1)
std r5,_DSISR(r1)
ld r4,_DAR(r1)
li r5,SIGSEGV
bl bad_page_fault
MMU_FTR_SECTION_ELSE
......@@ -1617,7 +1610,7 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
/* We don't touch AMR here, we never go to virtual mode */
INT_COMMON 0xe60, PACA_EXGEN, 0, 0
INT_COMMON 0xe60, PACA_EXGEN, 0, 0, 0, 0, 0
addi r3,r1,STACK_FRAME_OVERHEAD
bl hmi_exception_realmode
......@@ -1636,11 +1629,10 @@ EXC_COMMON_BEGIN(hmi_exception_early_common)
INT_HANDLER hmi_exception, 0xe60, hsrr=EXC_HV, bitmask=IRQS_DISABLED, kvm=1
EXC_COMMON_BEGIN(hmi_exception_common)
INT_COMMON 0xe60, PACA_EXGEN, 1, 1
INT_COMMON 0xe60, PACA_EXGEN, 1, 1, 1, 0, 0
FINISH_NAP
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
RUNLATCH_ON
bl save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
bl handle_hmi_exception
b ret_from_except
......@@ -1694,7 +1686,7 @@ EXC_VIRT_BEGIN(altivec_unavailable, 0x4f20, 0x20)
EXC_VIRT_END(altivec_unavailable, 0x4f20, 0x20)
INT_KVM_HANDLER 0xf20, EXC_STD, PACA_EXGEN, 0
EXC_COMMON_BEGIN(altivec_unavailable_common)
INT_COMMON 0xf20, PACA_EXGEN, 1, 1
INT_COMMON 0xf20, PACA_EXGEN, 1, 1, 0, 0, 0
#ifdef CONFIG_ALTIVEC
BEGIN_FTR_SECTION
beq 1f
......@@ -1735,7 +1727,7 @@ EXC_VIRT_BEGIN(vsx_unavailable, 0x4f40, 0x20)
EXC_VIRT_END(vsx_unavailable, 0x4f40, 0x20)
INT_KVM_HANDLER 0xf40, EXC_STD, PACA_EXGEN, 0
EXC_COMMON_BEGIN(vsx_unavailable_common)
INT_COMMON 0xf40, PACA_EXGEN, 1, 1
INT_COMMON 0xf40, PACA_EXGEN, 1, 1, 0, 0, 0
#ifdef CONFIG_VSX
BEGIN_FTR_SECTION
beq 1f
......@@ -1986,9 +1978,8 @@ EXC_COMMON_BEGIN(soft_nmi_common)
mr r10,r1
ld r1,PACAEMERGSP(r13)
subi r1,r1,INT_FRAME_SIZE
INT_COMMON 0x900, PACA_EXGEN, 0, 1
INT_COMMON 0x900, PACA_EXGEN, 0, 1, 1, 0, 0
bl save_nvgprs
RECONCILE_IRQ_STATE(r10, r11)
addi r3,r1,STACK_FRAME_OVERHEAD
bl soft_nmi_interrupt
b ret_from_except
......
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