Commit d1f69890 authored by Vitaly Prosyak's avatar Vitaly Prosyak Committed by Alex Deucher

drm/amd/display: Add interfaces for new CM blocks

Signed-off-by: default avatarVitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8d6a615a
...@@ -1572,7 +1572,7 @@ static struct transform_funcs dcn10_dpp_funcs = { ...@@ -1572,7 +1572,7 @@ static struct transform_funcs dcn10_dpp_funcs = {
.opp_program_regamma_lutb_settings = opp_program_regamma_lutb_settings, .opp_program_regamma_lutb_settings = opp_program_regamma_lutb_settings,
.opp_program_regamma_luta_settings = opp_program_regamma_luta_settings, .opp_program_regamma_luta_settings = opp_program_regamma_luta_settings,
.opp_program_regamma_pwl = oppn10_set_regamma_pwl, .opp_program_regamma_pwl = oppn10_set_regamma_pwl,
.opp_set_regamma_mode = oppn10_set_regamma_mode .opp_set_regamma_mode = oppn10_set_regamma_mode,
}; };
/*****************************************/ /*****************************************/
......
...@@ -159,6 +159,7 @@ ...@@ -159,6 +159,7 @@
SRI(CM_RGAM_RAMA_REGION_32_33, CM, id), \ SRI(CM_RGAM_RAMA_REGION_32_33, CM, id), \
SRI(CM_RGAM_CONTROL, CM, id) SRI(CM_RGAM_CONTROL, CM, id)
#define TF_REG_LIST_SH_MASK_DCN(mask_sh)\ #define TF_REG_LIST_SH_MASK_DCN(mask_sh)\
TF_SF(CM0_CM_GAMUT_REMAP_CONTROL, CM_GAMUT_REMAP_MODE, mask_sh),\ TF_SF(CM0_CM_GAMUT_REMAP_CONTROL, CM_GAMUT_REMAP_MODE, mask_sh),\
TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C11, mask_sh),\ TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C11, mask_sh),\
...@@ -757,7 +758,373 @@ ...@@ -757,7 +758,373 @@
type CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS; \ type CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS; \
type CM_RGAM_LUT_MODE; \ type CM_RGAM_LUT_MODE; \
type OBUF_BYPASS; \ type OBUF_BYPASS; \
type OBUF_H_2X_UPSCALE_EN type OBUF_H_2X_UPSCALE_EN; \
type CM_BLNDGAM_LUT_MODE; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_R; \
type CM_BLNDGAM_RAMB_EXP_REGION_START_SEGMENT_R; \
type CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_B; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_G; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_R; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_SLOPE_R; \
type CM_BLNDGAM_RAMB_EXP_REGION_END_BASE_R; \
type CM_BLNDGAM_RAMB_EXP_REGION0_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION0_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION1_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION1_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION2_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION2_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION3_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION3_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION4_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION4_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION5_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION5_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION6_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION6_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION7_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION7_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION8_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION8_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION9_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION9_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION10_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION10_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION11_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION11_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION12_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION12_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION13_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION13_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION14_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION14_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION15_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION15_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION16_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION16_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION17_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION17_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION18_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION18_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION19_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION19_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION20_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION20_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION21_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION21_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION22_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION22_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION23_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION23_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION24_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION24_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION25_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION25_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION26_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION26_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION27_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION27_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION28_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION28_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION29_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION29_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION30_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION30_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION31_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION31_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION32_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION32_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMB_EXP_REGION33_LUT_OFFSET; \
type CM_BLNDGAM_RAMB_EXP_REGION33_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_R; \
type CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_R; \
type CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_G; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_R; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_R; \
type CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_R; \
type CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION2_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION2_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION3_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION3_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION4_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION4_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION5_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION5_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION6_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION6_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION7_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION7_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION8_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION8_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION9_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION9_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION10_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION10_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION11_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION11_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION12_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION12_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION13_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION13_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION14_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION14_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION15_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION15_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION16_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION16_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION17_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION17_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION18_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION18_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION19_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION19_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION20_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION20_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION21_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION21_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION22_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION22_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION23_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION23_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION24_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION24_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION25_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION25_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION26_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION26_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION27_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION27_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION28_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION28_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION29_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION29_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION30_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION30_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION31_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION31_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION32_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION32_NUM_SEGMENTS; \
type CM_BLNDGAM_RAMA_EXP_REGION33_LUT_OFFSET; \
type CM_BLNDGAM_RAMA_EXP_REGION33_NUM_SEGMENTS; \
type CM_BLNDGAM_LUT_WRITE_EN_MASK; \
type CM_BLNDGAM_LUT_WRITE_SEL; \
type CM_BLNDGAM_LUT_INDEX; \
type CM_BLNDGAM_LUT_DATA; \
type CM_3DLUT_MODE; \
type CM_3DLUT_SIZE; \
type CM_3DLUT_INDEX; \
type CM_3DLUT_DATA0; \
type CM_3DLUT_DATA1; \
type CM_3DLUT_DATA_30BIT; \
type CM_3DLUT_WRITE_EN_MASK; \
type CM_3DLUT_RAM_SEL; \
type CM_3DLUT_30BIT_EN; \
type CM_3DLUT_CONFIG_STATUS; \
type CM_3DLUT_READ_SEL; \
type CM_SHAPER_LUT_MODE; \
type CM_SHAPER_RAMB_EXP_REGION_START_B; \
type CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_B; \
type CM_SHAPER_RAMB_EXP_REGION_START_G; \
type CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_G; \
type CM_SHAPER_RAMB_EXP_REGION_START_R; \
type CM_SHAPER_RAMB_EXP_REGION_START_SEGMENT_R; \
type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_B; \
type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_G; \
type CM_SHAPER_RAMB_EXP_REGION_LINEAR_SLOPE_R; \
type CM_SHAPER_RAMB_EXP_REGION_END_B; \
type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_B; \
type CM_SHAPER_RAMB_EXP_REGION_END_BASE_B; \
type CM_SHAPER_RAMB_EXP_REGION_END_G; \
type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_G; \
type CM_SHAPER_RAMB_EXP_REGION_END_BASE_G; \
type CM_SHAPER_RAMB_EXP_REGION_END_R; \
type CM_SHAPER_RAMB_EXP_REGION_END_SLOPE_R; \
type CM_SHAPER_RAMB_EXP_REGION_END_BASE_R; \
type CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS; \
type CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET; \
type CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION_START_B; \
type CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B; \
type CM_SHAPER_RAMA_EXP_REGION_START_G; \
type CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_G; \
type CM_SHAPER_RAMA_EXP_REGION_START_R; \
type CM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_R; \
type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_B; \
type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_G; \
type CM_SHAPER_RAMA_EXP_REGION_LINEAR_SLOPE_R; \
type CM_SHAPER_RAMA_EXP_REGION_END_B; \
type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_B; \
type CM_SHAPER_RAMA_EXP_REGION_END_BASE_B; \
type CM_SHAPER_RAMA_EXP_REGION_END_G; \
type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_G; \
type CM_SHAPER_RAMA_EXP_REGION_END_BASE_G; \
type CM_SHAPER_RAMA_EXP_REGION_END_R; \
type CM_SHAPER_RAMA_EXP_REGION_END_SLOPE_R; \
type CM_SHAPER_RAMA_EXP_REGION_END_BASE_R; \
type CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS; \
type CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET; \
type CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS; \
type CM_SHAPER_LUT_WRITE_EN_MASK; \
type CM_SHAPER_LUT_WRITE_SEL; \
type CM_SHAPER_LUT_INDEX; \
type CM_SHAPER_LUT_DATA
struct dcn_dpp_shift { struct dcn_dpp_shift {
TF_REG_FIELD_LIST(uint8_t); TF_REG_FIELD_LIST(uint8_t);
...@@ -767,6 +1134,9 @@ struct dcn_dpp_mask { ...@@ -767,6 +1134,9 @@ struct dcn_dpp_mask {
TF_REG_FIELD_LIST(uint32_t); TF_REG_FIELD_LIST(uint32_t);
}; };
struct dcn_dpp_registers { struct dcn_dpp_registers {
uint32_t DSCL_EXT_OVERSCAN_LEFT_RIGHT; uint32_t DSCL_EXT_OVERSCAN_LEFT_RIGHT;
uint32_t DSCL_EXT_OVERSCAN_TOP_BOTTOM; uint32_t DSCL_EXT_OVERSCAN_TOP_BOTTOM;
...@@ -885,6 +1255,119 @@ struct dcn_dpp_registers { ...@@ -885,6 +1255,119 @@ struct dcn_dpp_registers {
uint32_t CM_RGAM_RAMA_REGION_32_33; uint32_t CM_RGAM_RAMA_REGION_32_33;
uint32_t CM_RGAM_CONTROL; uint32_t CM_RGAM_CONTROL;
uint32_t OBUF_CONTROL; uint32_t OBUF_CONTROL;
uint32_t CM_BLNDGAM_LUT_WRITE_EN_MASK;
uint32_t CM_BLNDGAM_CONTROL;
uint32_t CM_BLNDGAM_RAMB_START_CNTL_B;
uint32_t CM_BLNDGAM_RAMB_START_CNTL_G;
uint32_t CM_BLNDGAM_RAMB_START_CNTL_R;
uint32_t CM_BLNDGAM_RAMB_SLOPE_CNTL_B;
uint32_t CM_BLNDGAM_RAMB_SLOPE_CNTL_G;
uint32_t CM_BLNDGAM_RAMB_SLOPE_CNTL_R;
uint32_t CM_BLNDGAM_RAMB_END_CNTL1_B;
uint32_t CM_BLNDGAM_RAMB_END_CNTL2_B;
uint32_t CM_BLNDGAM_RAMB_END_CNTL1_G;
uint32_t CM_BLNDGAM_RAMB_END_CNTL2_G;
uint32_t CM_BLNDGAM_RAMB_END_CNTL1_R;
uint32_t CM_BLNDGAM_RAMB_END_CNTL2_R;
uint32_t CM_BLNDGAM_RAMB_REGION_0_1;
uint32_t CM_BLNDGAM_RAMB_REGION_2_3;
uint32_t CM_BLNDGAM_RAMB_REGION_4_5;
uint32_t CM_BLNDGAM_RAMB_REGION_6_7;
uint32_t CM_BLNDGAM_RAMB_REGION_8_9;
uint32_t CM_BLNDGAM_RAMB_REGION_10_11;
uint32_t CM_BLNDGAM_RAMB_REGION_12_13;
uint32_t CM_BLNDGAM_RAMB_REGION_14_15;
uint32_t CM_BLNDGAM_RAMB_REGION_16_17;
uint32_t CM_BLNDGAM_RAMB_REGION_18_19;
uint32_t CM_BLNDGAM_RAMB_REGION_20_21;
uint32_t CM_BLNDGAM_RAMB_REGION_22_23;
uint32_t CM_BLNDGAM_RAMB_REGION_24_25;
uint32_t CM_BLNDGAM_RAMB_REGION_26_27;
uint32_t CM_BLNDGAM_RAMB_REGION_28_29;
uint32_t CM_BLNDGAM_RAMB_REGION_30_31;
uint32_t CM_BLNDGAM_RAMB_REGION_32_33;
uint32_t CM_BLNDGAM_RAMA_START_CNTL_B;
uint32_t CM_BLNDGAM_RAMA_START_CNTL_G;
uint32_t CM_BLNDGAM_RAMA_START_CNTL_R;
uint32_t CM_BLNDGAM_RAMA_SLOPE_CNTL_B;
uint32_t CM_BLNDGAM_RAMA_SLOPE_CNTL_G;
uint32_t CM_BLNDGAM_RAMA_SLOPE_CNTL_R;
uint32_t CM_BLNDGAM_RAMA_END_CNTL1_B;
uint32_t CM_BLNDGAM_RAMA_END_CNTL2_B;
uint32_t CM_BLNDGAM_RAMA_END_CNTL1_G;
uint32_t CM_BLNDGAM_RAMA_END_CNTL2_G;
uint32_t CM_BLNDGAM_RAMA_END_CNTL1_R;
uint32_t CM_BLNDGAM_RAMA_END_CNTL2_R;
uint32_t CM_BLNDGAM_RAMA_REGION_0_1;
uint32_t CM_BLNDGAM_RAMA_REGION_2_3;
uint32_t CM_BLNDGAM_RAMA_REGION_4_5;
uint32_t CM_BLNDGAM_RAMA_REGION_6_7;
uint32_t CM_BLNDGAM_RAMA_REGION_8_9;
uint32_t CM_BLNDGAM_RAMA_REGION_10_11;
uint32_t CM_BLNDGAM_RAMA_REGION_12_13;
uint32_t CM_BLNDGAM_RAMA_REGION_14_15;
uint32_t CM_BLNDGAM_RAMA_REGION_16_17;
uint32_t CM_BLNDGAM_RAMA_REGION_18_19;
uint32_t CM_BLNDGAM_RAMA_REGION_20_21;
uint32_t CM_BLNDGAM_RAMA_REGION_22_23;
uint32_t CM_BLNDGAM_RAMA_REGION_24_25;
uint32_t CM_BLNDGAM_RAMA_REGION_26_27;
uint32_t CM_BLNDGAM_RAMA_REGION_28_29;
uint32_t CM_BLNDGAM_RAMA_REGION_30_31;
uint32_t CM_BLNDGAM_RAMA_REGION_32_33;
uint32_t CM_BLNDGAM_LUT_INDEX;
uint32_t CM_BLNDGAM_LUT_DATA;
uint32_t CM_3DLUT_MODE;
uint32_t CM_3DLUT_INDEX;
uint32_t CM_3DLUT_DATA;
uint32_t CM_3DLUT_DATA_30BIT;
uint32_t CM_3DLUT_READ_WRITE_CONTROL;
uint32_t CM_SHAPER_LUT_WRITE_EN_MASK;
uint32_t CM_SHAPER_CONTROL;
uint32_t CM_SHAPER_RAMB_START_CNTL_B;
uint32_t CM_SHAPER_RAMB_START_CNTL_G;
uint32_t CM_SHAPER_RAMB_START_CNTL_R;
uint32_t CM_SHAPER_RAMB_REGION_0_1;
uint32_t CM_SHAPER_RAMB_REGION_2_3;
uint32_t CM_SHAPER_RAMB_REGION_4_5;
uint32_t CM_SHAPER_RAMB_REGION_6_7;
uint32_t CM_SHAPER_RAMB_REGION_8_9;
uint32_t CM_SHAPER_RAMB_REGION_10_11;
uint32_t CM_SHAPER_RAMB_REGION_12_13;
uint32_t CM_SHAPER_RAMB_REGION_14_15;
uint32_t CM_SHAPER_RAMB_REGION_16_17;
uint32_t CM_SHAPER_RAMB_REGION_18_19;
uint32_t CM_SHAPER_RAMB_REGION_20_21;
uint32_t CM_SHAPER_RAMB_REGION_22_23;
uint32_t CM_SHAPER_RAMB_REGION_24_25;
uint32_t CM_SHAPER_RAMB_REGION_26_27;
uint32_t CM_SHAPER_RAMB_REGION_28_29;
uint32_t CM_SHAPER_RAMB_REGION_30_31;
uint32_t CM_SHAPER_RAMB_REGION_32_33;
uint32_t CM_SHAPER_RAMA_START_CNTL_B;
uint32_t CM_SHAPER_RAMA_START_CNTL_G;
uint32_t CM_SHAPER_RAMA_START_CNTL_R;
uint32_t CM_SHAPER_RAMA_REGION_0_1;
uint32_t CM_SHAPER_RAMA_REGION_2_3;
uint32_t CM_SHAPER_RAMA_REGION_4_5;
uint32_t CM_SHAPER_RAMA_REGION_6_7;
uint32_t CM_SHAPER_RAMA_REGION_8_9;
uint32_t CM_SHAPER_RAMA_REGION_10_11;
uint32_t CM_SHAPER_RAMA_REGION_12_13;
uint32_t CM_SHAPER_RAMA_REGION_14_15;
uint32_t CM_SHAPER_RAMA_REGION_16_17;
uint32_t CM_SHAPER_RAMA_REGION_18_19;
uint32_t CM_SHAPER_RAMA_REGION_20_21;
uint32_t CM_SHAPER_RAMA_REGION_22_23;
uint32_t CM_SHAPER_RAMA_REGION_24_25;
uint32_t CM_SHAPER_RAMA_REGION_26_27;
uint32_t CM_SHAPER_RAMA_REGION_28_29;
uint32_t CM_SHAPER_RAMA_REGION_30_31;
uint32_t CM_SHAPER_RAMA_REGION_32_33;
uint32_t CM_SHAPER_LUT_INDEX;
uint32_t CM_SHAPER_LUT_DATA;
}; };
struct dcn10_dpp { struct dcn10_dpp {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment