MIPS: SEAD-3: Fix GIC interrupt specifiers
The various interrupt specifiers in the device tree are not in a valid format for the MIPS GIC interrupt controller binding. Where each interrupt should provide 3 values - GIC_LOCAL or GIC_SHARED, the pin number & the type of interrupt - the device tree was only providing the pin number. This causes interrupts for those devices to not be used when a GIC is present. SEAD-3 systems without a GIC are unaffected since the DT fixup code generates interrupt specifiers that are valid for the CPU interrupt controller. Fix this by adding the GIC_SHARED & IRQ_TYPE_LEVEL_HIGH values to each interrupt specifier. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Fixes: c11e3b48 ("MIPS: SEAD3: Probe UARTs using DT") Fixes: a34e9388 ("MIPS: SEAD3: Probe ethernet controller using DT") Fixes: 7afd2a5a ("MIPS: SEAD3: Probe EHCI controller using DT") Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # v4.9+ Patchwork: https://patchwork.linux-mips.org/patch/16189/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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