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Commit d6ee6f7e authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
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Merge commit 'gcl/next' into next

parents ac4dff22 48b3fd14
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Showing with 184 additions and 26 deletions
arch/powerpc/boot/dts/digsy_mtc.dts
View file @ d6ee6f7e
...@@ -155,18 +155,18 @@ xlb@1f00 { ...@@ -155,18 +155,18 @@ xlb@1f00 {
reg = <0x1f00 0x100>; reg = <0x1f00 0x100>;
}; };
serial@2400 { // PSC3
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
};
serial@2600 { // PSC4 serial@2600 { // PSC4
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2600 0x100>; reg = <0x2600 0x100>;
interrupts = <2 11 0>; interrupts = <2 11 0>;
}; };
serial@2800 { // PSC5
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2800 0x100>;
interrupts = <2 12 0>;
};
ethernet@3000 { ethernet@3000 {
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <0x3000 0x400>; reg = <0x3000 0x400>;
......
arch/powerpc/boot/dts/virtex440-ml507.dts
View file @ d6ee6f7e
...@@ -7,6 +7,15 @@ ...@@ -7,6 +7,15 @@
* This file is licensed under the terms of the GNU General Public License * This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any * version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied. * kind, whether express or implied.
*
* ---
*
* Device Tree Generator version: 1.1
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
*
* XPS project directory: ml507_ppc440_emb_ref
*/ */
/dts-v1/; /dts-v1/;
...@@ -22,8 +31,8 @@ DDR2_SDRAM: memory@0 { ...@@ -22,8 +31,8 @@ DDR2_SDRAM: memory@0 {
reg = < 0 0x10000000 >; reg = < 0 0x10000000 >;
} ; } ;
chosen { chosen {
bootargs = "console=ttyS0 ip=on root=/dev/ram"; bootargs = "console=ttyS0 root=/dev/ram";
linux,stdout-path = "/plb@0/serial@83e00000"; linux,stdout-path = &RS232_Uart_1;
} ; } ;
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
...@@ -136,19 +145,19 @@ DMA0: sdma@80 { ...@@ -136,19 +145,19 @@ DMA0: sdma@80 {
compatible = "xlnx,ll-dma-1.00.a"; compatible = "xlnx,ll-dma-1.00.a";
dcr-reg = < 0x80 0x11 >; dcr-reg = < 0x80 0x11 >;
interrupt-parent = <&xps_intc_0>; interrupt-parent = <&xps_intc_0>;
interrupts = < 9 2 0xa 2 >; interrupts = < 10 2 11 2 >;
} ; } ;
} ; } ;
} ; } ;
plb_v46_0: plb@0 { plb_v46_0: plb@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
ranges ; ranges ;
DIP_Switches_8Bit: gpio@81460000 { DIP_Switches_8Bit: gpio@81460000 {
compatible = "xlnx,xps-gpio-1.00.a"; compatible = "xlnx,xps-gpio-1.00.a";
interrupt-parent = <&xps_intc_0>; interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >; interrupts = < 7 2 >;
reg = < 0x81460000 0x10000 >; reg = < 0x81460000 0x10000 >;
xlnx,all-inputs = <1>; xlnx,all-inputs = <1>;
xlnx,all-inputs-2 = <0>; xlnx,all-inputs-2 = <0>;
...@@ -163,6 +172,86 @@ DIP_Switches_8Bit: gpio@81460000 { ...@@ -163,6 +172,86 @@ DIP_Switches_8Bit: gpio@81460000 {
xlnx,tri-default = <0xffffffff>; xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>; xlnx,tri-default-2 = <0xffffffff>;
} ; } ;
FLASH: flash@fc000000 {
bank-width = <2>;
compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
reg = < 0xfc000000 0x2000000 >;
xlnx,family = "virtex5";
xlnx,include-datawidth-matching-0 = <0x1>;
xlnx,include-datawidth-matching-1 = <0x0>;
xlnx,include-datawidth-matching-2 = <0x0>;
xlnx,include-datawidth-matching-3 = <0x0>;
xlnx,include-negedge-ioregs = <0x0>;
xlnx,include-plb-ipif = <0x1>;
xlnx,include-wrbuf = <0x1>;
xlnx,max-mem-width = <0x10>;
xlnx,mch-native-dwidth = <0x20>;
xlnx,mch-plb-clk-period-ps = <0x2710>;
xlnx,mch-splb-awidth = <0x20>;
xlnx,mch0-accessbuf-depth = <0x10>;
xlnx,mch0-protocol = <0x0>;
xlnx,mch0-rddatabuf-depth = <0x10>;
xlnx,mch1-accessbuf-depth = <0x10>;
xlnx,mch1-protocol = <0x0>;
xlnx,mch1-rddatabuf-depth = <0x10>;
xlnx,mch2-accessbuf-depth = <0x10>;
xlnx,mch2-protocol = <0x0>;
xlnx,mch2-rddatabuf-depth = <0x10>;
xlnx,mch3-accessbuf-depth = <0x10>;
xlnx,mch3-protocol = <0x0>;
xlnx,mch3-rddatabuf-depth = <0x10>;
xlnx,mem0-width = <0x10>;
xlnx,mem1-width = <0x20>;
xlnx,mem2-width = <0x20>;
xlnx,mem3-width = <0x20>;
xlnx,num-banks-mem = <0x1>;
xlnx,num-channels = <0x2>;
xlnx,priority-mode = <0x0>;
xlnx,synch-mem-0 = <0x0>;
xlnx,synch-mem-1 = <0x0>;
xlnx,synch-mem-2 = <0x0>;
xlnx,synch-mem-3 = <0x0>;
xlnx,synch-pipedelay-0 = <0x2>;
xlnx,synch-pipedelay-1 = <0x2>;
xlnx,synch-pipedelay-2 = <0x2>;
xlnx,synch-pipedelay-3 = <0x2>;
xlnx,tavdv-ps-mem-0 = <0x1adb0>;
xlnx,tavdv-ps-mem-1 = <0x3a98>;
xlnx,tavdv-ps-mem-2 = <0x3a98>;
xlnx,tavdv-ps-mem-3 = <0x3a98>;
xlnx,tcedv-ps-mem-0 = <0x1adb0>;
xlnx,tcedv-ps-mem-1 = <0x3a98>;
xlnx,tcedv-ps-mem-2 = <0x3a98>;
xlnx,tcedv-ps-mem-3 = <0x3a98>;
xlnx,thzce-ps-mem-0 = <0x88b8>;
xlnx,thzce-ps-mem-1 = <0x1b58>;
xlnx,thzce-ps-mem-2 = <0x1b58>;
xlnx,thzce-ps-mem-3 = <0x1b58>;
xlnx,thzoe-ps-mem-0 = <0x1b58>;
xlnx,thzoe-ps-mem-1 = <0x1b58>;
xlnx,thzoe-ps-mem-2 = <0x1b58>;
xlnx,thzoe-ps-mem-3 = <0x1b58>;
xlnx,tlzwe-ps-mem-0 = <0x88b8>;
xlnx,tlzwe-ps-mem-1 = <0x0>;
xlnx,tlzwe-ps-mem-2 = <0x0>;
xlnx,tlzwe-ps-mem-3 = <0x0>;
xlnx,twc-ps-mem-0 = <0x2af8>;
xlnx,twc-ps-mem-1 = <0x3a98>;
xlnx,twc-ps-mem-2 = <0x3a98>;
xlnx,twc-ps-mem-3 = <0x3a98>;
xlnx,twp-ps-mem-0 = <0x11170>;
xlnx,twp-ps-mem-1 = <0x2ee0>;
xlnx,twp-ps-mem-2 = <0x2ee0>;
xlnx,twp-ps-mem-3 = <0x2ee0>;
xlnx,xcl0-linesize = <0x4>;
xlnx,xcl0-writexfer = <0x1>;
xlnx,xcl1-linesize = <0x4>;
xlnx,xcl1-writexfer = <0x1>;
xlnx,xcl2-linesize = <0x4>;
xlnx,xcl2-writexfer = <0x1>;
xlnx,xcl3-linesize = <0x4>;
xlnx,xcl3-writexfer = <0x1>;
} ;
Hard_Ethernet_MAC: xps-ll-temac@81c00000 { Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -185,6 +274,19 @@ ethernet@81c00000 { ...@@ -185,6 +274,19 @@ ethernet@81c00000 {
xlnx,txfifo = <0x1000>; xlnx,txfifo = <0x1000>;
} ; } ;
} ; } ;
IIC_EEPROM: i2c@81600000 {
compatible = "xlnx,xps-iic-2.00.a";
interrupt-parent = <&xps_intc_0>;
interrupts = < 6 2 >;
reg = < 0x81600000 0x10000 >;
xlnx,clk-freq = <0x5f5e100>;
xlnx,family = "virtex5";
xlnx,gpo-width = <0x1>;
xlnx,iic-freq = <0x186a0>;
xlnx,scl-inertial-delay = <0x0>;
xlnx,sda-inertial-delay = <0x0>;
xlnx,ten-bit-adr = <0x0>;
} ;
LEDs_8Bit: gpio@81400000 { LEDs_8Bit: gpio@81400000 {
compatible = "xlnx,xps-gpio-1.00.a"; compatible = "xlnx,xps-gpio-1.00.a";
reg = < 0x81400000 0x10000 >; reg = < 0x81400000 0x10000 >;
...@@ -220,7 +322,7 @@ LEDs_Positions: gpio@81420000 { ...@@ -220,7 +322,7 @@ LEDs_Positions: gpio@81420000 {
Push_Buttons_5Bit: gpio@81440000 { Push_Buttons_5Bit: gpio@81440000 {
compatible = "xlnx,xps-gpio-1.00.a"; compatible = "xlnx,xps-gpio-1.00.a";
interrupt-parent = <&xps_intc_0>; interrupt-parent = <&xps_intc_0>;
interrupts = < 7 2 >; interrupts = < 8 2 >;
reg = < 0x81440000 0x10000 >; reg = < 0x81440000 0x10000 >;
xlnx,all-inputs = <1>; xlnx,all-inputs = <1>;
xlnx,all-inputs-2 = <0>; xlnx,all-inputs-2 = <0>;
...@@ -237,13 +339,13 @@ Push_Buttons_5Bit: gpio@81440000 { ...@@ -237,13 +339,13 @@ Push_Buttons_5Bit: gpio@81440000 {
} ; } ;
RS232_Uart_1: serial@83e00000 { RS232_Uart_1: serial@83e00000 {
clock-frequency = <100000000>; clock-frequency = <100000000>;
compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
current-speed = <0x2580>; current-speed = <9600>;
device_type = "serial"; device_type = "serial";
interrupt-parent = <&xps_intc_0>; interrupt-parent = <&xps_intc_0>;
interrupts = < 8 2 >; interrupts = < 9 2 >;
reg = < 0x83e00000 0x10000 >; reg = < 0x83e00000 0x10000 >;
reg-offset = <3>; reg-offset = <0x1003>;
reg-shift = <2>; reg-shift = <2>;
xlnx,family = "virtex5"; xlnx,family = "virtex5";
xlnx,has-external-rclk = <0>; xlnx,has-external-rclk = <0>;
...@@ -268,7 +370,7 @@ xps_intc_0: interrupt-controller@81800000 { ...@@ -268,7 +370,7 @@ xps_intc_0: interrupt-controller@81800000 {
compatible = "xlnx,xps-intc-1.00.a"; compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ; interrupt-controller ;
reg = < 0x81800000 0x10000 >; reg = < 0x81800000 0x10000 >;
xlnx,num-intr-inputs = <0xb>; xlnx,num-intr-inputs = <0xc>;
} ; } ;
xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
compatible = "xlnx,xps-timebase-wdt-1.00.b"; compatible = "xlnx,xps-timebase-wdt-1.00.b";
......
arch/powerpc/configs/mpc5200_defconfig
View file @ d6ee6f7e
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.29-rc2 # Linux kernel version: 2.6.29-rc3
# Mon Jan 26 21:40:44 2009 # Fri Feb 6 09:48:53 2009
# #
# CONFIG_PPC64 is not set # CONFIG_PPC64 is not set
...@@ -388,7 +388,10 @@ CONFIG_MTD=y ...@@ -388,7 +388,10 @@ CONFIG_MTD=y
CONFIG_MTD_CONCAT=y CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set # CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_OF_PARTS is not set # CONFIG_MTD_OF_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_AR7_PARTS is not set
...@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y ...@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y
# #
# EEPROM support # EEPROM support
# #
# CONFIG_EEPROM_AT24 is not set CONFIG_EEPROM_AT24=y
# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93CX6 is not set
CONFIG_HAVE_IDE=y CONFIG_HAVE_IDE=y
...@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y ...@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y
# CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set # CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set # CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set CONFIG_LXT_PHY=y
# CONFIG_CICADA_PHY is not set # CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set # CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set # CONFIG_SMSC_PHY is not set
...@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256 ...@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set # CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set # CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_R3964 is not set # CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set # CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set # CONFIG_RAW_DRIVER is not set
...@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y ...@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y
# CONFIG_ACCESSIBILITY is not set # CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set # CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set # CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
CONFIG_RTC_DRV_DS1307=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_PPC is not set
# CONFIG_DMADEVICES is not set # CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set # CONFIG_UIO is not set
# CONFIG_STAGING is not set # CONFIG_STAGING is not set
......
arch/powerpc/platforms/52xx/mpc52xx_common.c
View file @ d6ee6f7e
...@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = { ...@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
static struct of_device_id mpc52xx_bus_ids[] __initdata = { static struct of_device_id mpc52xx_bus_ids[] __initdata = {
{ .compatible = "fsl,mpc5200-immr", }, { .compatible = "fsl,mpc5200-immr", },
{ .compatible = "fsl,mpc5200b-immr", }, { .compatible = "fsl,mpc5200b-immr", },
{ .compatible = "fsl,lpb", }, { .compatible = "simple-bus", },
/* depreciated matches; shouldn't be used in new device trees */ /* depreciated matches; shouldn't be used in new device trees */
{ .compatible = "fsl,lpb", },
{ .type = "builtin", .compatible = "mpc5200", }, /* efika */ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
{ .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
{} {}
......
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