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Commit d73e60b7 authored by Russell King's avatar Russell King Committed by Russell King
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[ARM] copypage: convert assembly files to C 

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 487ff320
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Showing with 431 additions and 162 deletions
arch/arm/mm/copypage-feroceon.S deleted 100644 → 0
View file @ 487ff320
/*
* linux/arch/arm/lib/copypage-feroceon.S
*
* Copyright (C) 2008 Marvell Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This handles copy_user_page and clear_user_page on Feroceon
* more optimally than the generic implementations.
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/asm-offsets.h>
.text
.align 5
ENTRY(feroceon_copy_user_page)
stmfd sp!, {r4-r9, lr}
mov ip, #PAGE_SZ
1: mov lr, r1
ldmia r1!, {r2 - r9}
pld [lr, #32]
pld [lr, #64]
pld [lr, #96]
pld [lr, #128]
pld [lr, #160]
pld [lr, #192]
pld [lr, #224]
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
ldmia r1!, {r2 - r9}
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
stmia r0, {r2 - r9}
subs ip, ip, #(32 * 8)
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
bne 1b
mcr p15, 0, ip, c7, c10, 4 @ drain WB
ldmfd sp!, {r4-r9, pc}
.align 5
ENTRY(feroceon_clear_user_page)
stmfd sp!, {r4-r7, lr}
mov r1, #PAGE_SZ/32
mov r2, #0
mov r3, #0
mov r4, #0
mov r5, #0
mov r6, #0
mov r7, #0
mov ip, #0
mov lr, #0
1: stmia r0, {r2-r7, ip, lr}
subs r1, r1, #1
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line
add r0, r0, #32
bne 1b
mcr p15, 0, r1, c7, c10, 4 @ drain WB
ldmfd sp!, {r4-r7, pc}
__INITDATA
.type feroceon_user_fns, #object
ENTRY(feroceon_user_fns)
.long feroceon_clear_user_page
.long feroceon_copy_user_page
.size feroceon_user_fns, . - feroceon_user_fns
arch/arm/mm/copypage-feroceon.c 0 → 100644
View file @ d73e60b7
/*
* linux/arch/arm/mm/copypage-feroceon.S
*
* Copyright (C) 2008 Marvell Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This handles copy_user_page and clear_user_page on Feroceon
* more optimally than the generic implementations.
*/
#include <linux/init.h>
#include <asm/page.h>
void __attribute__((naked))
feroceon_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
{
asm("\
stmfd sp!, {r4-r9, lr} \n\
mov ip, %0 \n\
1: mov lr, r1 \n\
ldmia r1!, {r2 - r9} \n\
pld [lr, #32] \n\
pld [lr, #64] \n\
pld [lr, #96] \n\
pld [lr, #128] \n\
pld [lr, #160] \n\
pld [lr, #192] \n\
pld [lr, #224] \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
ldmia r1!, {r2 - r9} \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
stmia r0, {r2 - r9} \n\
subs ip, ip, #(32 * 8) \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
bne 1b \n\
mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
ldmfd sp!, {r4-r9, pc}"
:
: "I" (PAGE_SIZE));
}
void __attribute__((naked))
feroceon_clear_user_page(void *kaddr, unsigned long vaddr)
{
asm("\
stmfd sp!, {r4-r7, lr} \n\
mov r1, %0 \n\
mov r2, #0 \n\
mov r3, #0 \n\
mov r4, #0 \n\
mov r5, #0 \n\
mov r6, #0 \n\
mov r7, #0 \n\
mov ip, #0 \n\
mov lr, #0 \n\
1: stmia r0, {r2-r7, ip, lr} \n\
subs r1, r1, #1 \n\
mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\
add r0, r0, #32 \n\
bne 1b \n\
mcr p15, 0, r1, c7, c10, 4 @ drain WB\n\
ldmfd sp!, {r4-r7, pc}"
:
: "I" (PAGE_SIZE / 32));
}
struct cpu_user_fns feroceon_user_fns __initdata = {
.cpu_clear_user_page = feroceon_clear_user_page,
.cpu_copy_user_page = feroceon_copy_user_page,
};
arch/arm/mm/copypage-v3.S deleted 100644 → 0
View file @ 487ff320
/*
* linux/arch/arm/lib/copypage.S
*
* Copyright (C) 1995-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* ASM optimised string functions
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
.text
.align 5
/*
* ARMv3 optimised copy_user_page
*
* FIXME: do we need to handle cache stuff...
*/
ENTRY(v3_copy_user_page)
stmfd sp!, {r4, lr} @ 2
mov r2, #PAGE_SZ/64 @ 1
ldmia r1!, {r3, r4, ip, lr} @ 4+1
1: stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4+1
stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4+1
stmia r0!, {r3, r4, ip, lr} @ 4
ldmia r1!, {r3, r4, ip, lr} @ 4
subs r2, r2, #1 @ 1
stmia r0!, {r3, r4, ip, lr} @ 4
ldmneia r1!, {r3, r4, ip, lr} @ 4
bne 1b @ 1
ldmfd sp!, {r4, pc} @ 3
.align 5
/*
* ARMv3 optimised clear_user_page
*
* FIXME: do we need to handle cache stuff...
*/
ENTRY(v3_clear_user_page)
str lr, [sp, #-4]!
mov r1, #PAGE_SZ/64 @ 1
mov r2, #0 @ 1
mov r3, #0 @ 1
mov ip, #0 @ 1
mov lr, #0 @ 1
1: stmia r0!, {r2, r3, ip, lr} @ 4
stmia r0!, {r2, r3, ip, lr} @ 4
stmia r0!, {r2, r3, ip, lr} @ 4
stmia r0!, {r2, r3, ip, lr} @ 4
subs r1, r1, #1 @ 1
bne 1b @ 1
ldr pc, [sp], #4
__INITDATA
.type v3_user_fns, #object
ENTRY(v3_user_fns)
.long v3_clear_user_page
.long v3_copy_user_page
.size v3_user_fns, . - v3_user_fns
arch/arm/mm/copypage-v3.c 0 → 100644
View file @ d73e60b7
/*
* linux/arch/arm/mm/copypage-v3.c
*
* Copyright (C) 1995-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <asm/page.h>
/*
* ARMv3 optimised copy_user_page
*
* FIXME: do we need to handle cache stuff...
*/
void __attribute__((naked))
v3_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
{
asm("\n\
stmfd sp!, {r4, lr} @ 2\n\
mov r2, %2 @ 1\n\
ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
1: stmia %1!, {r3, r4, ip, lr} @ 4\n\
ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
stmia %1!, {r3, r4, ip, lr} @ 4\n\
ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
stmia %1!, {r3, r4, ip, lr} @ 4\n\
ldmia %0!, {r3, r4, ip, lr} @ 4\n\
subs r2, r2, #1 @ 1\n\
stmia %1!, {r3, r4, ip, lr} @ 4\n\
ldmneia %0!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1\n\
ldmfd sp!, {r4, pc} @ 3"
:
: "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
}
/*
* ARMv3 optimised clear_user_page
*
* FIXME: do we need to handle cache stuff...
*/
void __attribute__((naked)) v3_clear_user_page(void *kaddr, unsigned long vaddr)
{
asm("\n\
str lr, [sp, #-4]!\n\
mov r1, %1 @ 1\n\
mov r2, #0 @ 1\n\
mov r3, #0 @ 1\n\
mov ip, #0 @ 1\n\
mov lr, #0 @ 1\n\
1: stmia %0!, {r2, r3, ip, lr} @ 4\n\
stmia %0!, {r2, r3, ip, lr} @ 4\n\
stmia %0!, {r2, r3, ip, lr} @ 4\n\
stmia %0!, {r2, r3, ip, lr} @ 4\n\
subs r1, r1, #1 @ 1\n\
bne 1b @ 1\n\
ldr pc, [sp], #4"
:
: "r" (kaddr), "I" (PAGE_SIZE / 64));
}
struct cpu_user_fns v3_user_fns __initdata = {
.cpu_clear_user_page = v3_clear_user_page,
.cpu_copy_user_page = v3_copy_user_page,
};
arch/arm/mm/copypage-v4wb.S → arch/arm/mm/copypage-v4wb.c
View file @ d73e60b7
/* /*
* linux/arch/arm/lib/copypage.S * linux/arch/arm/mm/copypage-v4wb.c
* *
* Copyright (C) 1995-1999 Russell King * Copyright (C) 1995-1999 Russell King
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*
* ASM optimised string functions
*/ */
#include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/asm-offsets.h>
.text #include <asm/page.h>
.align 5
/* /*
* ARMv4 optimised copy_user_page * ARMv4 optimised copy_user_page
* *
...@@ -27,53 +23,61 @@ ...@@ -27,53 +23,61 @@
* instruction. If your processor does not supply this, you have to write your * instruction. If your processor does not supply this, you have to write your
* own copy_user_page that does the right thing. * own copy_user_page that does the right thing.
*/ */
ENTRY(v4wb_copy_user_page) void __attribute__((naked))
stmfd sp!, {r4, lr} @ 2 v4wb_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
mov r2, #PAGE_SZ/64 @ 1 {
ldmia r1!, {r3, r4, ip, lr} @ 4 asm("\
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line stmfd sp!, {r4, lr} @ 2\n\
stmia r0!, {r3, r4, ip, lr} @ 4 mov r2, %0 @ 1\n\
ldmia r1!, {r3, r4, ip, lr} @ 4+1 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
stmia r0!, {r3, r4, ip, lr} @ 4 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
ldmia r1!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4\n\
mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
stmia r0!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4\n\
ldmia r1!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
subs r2, r2, #1 @ 1 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
stmia r0!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4\n\
ldmneia r1!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1 subs r2, r2, #1 @ 1\n\
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB stmia r0!, {r3, r4, ip, lr} @ 4\n\
ldmfd sp!, {r4, pc} @ 3 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1\n\
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
ldmfd sp!, {r4, pc} @ 3"
:
: "I" (PAGE_SIZE / 64));
}
.align 5
/* /*
* ARMv4 optimised clear_user_page * ARMv4 optimised clear_user_page
* *
* Same story as above. * Same story as above.
*/ */
ENTRY(v4wb_clear_user_page) void __attribute__((naked))
str lr, [sp, #-4]! v4wb_clear_user_page(void *kaddr, unsigned long vaddr)
mov r1, #PAGE_SZ/64 @ 1 {
mov r2, #0 @ 1 asm("\
mov r3, #0 @ 1 str lr, [sp, #-4]!\n\
mov ip, #0 @ 1 mov r1, %0 @ 1\n\
mov lr, #0 @ 1 mov r2, #0 @ 1\n\
1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line mov r3, #0 @ 1\n\
stmia r0!, {r2, r3, ip, lr} @ 4 mov ip, #0 @ 1\n\
stmia r0!, {r2, r3, ip, lr} @ 4 mov lr, #0 @ 1\n\
mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line 1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
stmia r0!, {r2, r3, ip, lr} @ 4 stmia r0!, {r2, r3, ip, lr} @ 4\n\
stmia r0!, {r2, r3, ip, lr} @ 4 stmia r0!, {r2, r3, ip, lr} @ 4\n\
subs r1, r1, #1 @ 1 mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
bne 1b @ 1 stmia r0!, {r2, r3, ip, lr} @ 4\n\
mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB stmia r0!, {r2, r3, ip, lr} @ 4\n\
ldr pc, [sp], #4 subs r1, r1, #1 @ 1\n\
bne 1b @ 1\n\
__INITDATA mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
ldr pc, [sp], #4"
:
: "I" (PAGE_SIZE / 64));
}
.type v4wb_user_fns, #object struct cpu_user_fns v4wb_user_fns __initdata = {
ENTRY(v4wb_user_fns) .cpu_clear_user_page = v4wb_clear_user_page,
.long v4wb_clear_user_page .cpu_copy_user_page = v4wb_copy_user_page,
.long v4wb_copy_user_page };
.size v4wb_user_fns, . - v4wb_user_fns
arch/arm/mm/copypage-v4wt.S → arch/arm/mm/copypage-v4wt.c
View file @ d73e60b7
/* /*
* linux/arch/arm/lib/copypage-v4.S * linux/arch/arm/mm/copypage-v4wt.S
* *
* Copyright (C) 1995-1999 Russell King * Copyright (C) 1995-1999 Russell King
* *
...@@ -7,17 +7,13 @@ ...@@ -7,17 +7,13 @@
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* ASM optimised string functions
*
* This is for CPUs with a writethrough cache and 'flush ID cache' is * This is for CPUs with a writethrough cache and 'flush ID cache' is
* the only supported cache operation. * the only supported cache operation.
*/ */
#include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/asm-offsets.h>
.text #include <asm/page.h>
.align 5
/* /*
* ARMv4 optimised copy_user_page * ARMv4 optimised copy_user_page
* *
...@@ -25,49 +21,57 @@ ...@@ -25,49 +21,57 @@
* dirty data in the cache. However, we do have to ensure that * dirty data in the cache. However, we do have to ensure that
* subsequent reads are up to date. * subsequent reads are up to date.
*/ */
ENTRY(v4wt_copy_user_page) void __attribute__((naked))
stmfd sp!, {r4, lr} @ 2 v4wt_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
mov r2, #PAGE_SZ/64 @ 1 {
ldmia r1!, {r3, r4, ip, lr} @ 4 asm("\
1: stmia r0!, {r3, r4, ip, lr} @ 4 stmfd sp!, {r4, lr} @ 2\n\
ldmia r1!, {r3, r4, ip, lr} @ 4+1 mov r2, %0 @ 1\n\
stmia r0!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
ldmia r1!, {r3, r4, ip, lr} @ 4 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\
stmia r0!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
ldmia r1!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4\n\
subs r2, r2, #1 @ 1 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
stmia r0!, {r3, r4, ip, lr} @ 4 stmia r0!, {r3, r4, ip, lr} @ 4\n\
ldmneia r1!, {r3, r4, ip, lr} @ 4 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1 subs r2, r2, #1 @ 1\n\
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache stmia r0!, {r3, r4, ip, lr} @ 4\n\
ldmfd sp!, {r4, pc} @ 3 ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
bne 1b @ 1\n\
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
ldmfd sp!, {r4, pc} @ 3"
:
: "I" (PAGE_SIZE / 64));
}
.align 5
/* /*
* ARMv4 optimised clear_user_page * ARMv4 optimised clear_user_page
* *
* Same story as above. * Same story as above.
*/ */
ENTRY(v4wt_clear_user_page) void __attribute__((naked))
str lr, [sp, #-4]! v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
mov r1, #PAGE_SZ/64 @ 1 {
mov r2, #0 @ 1 asm("\
mov r3, #0 @ 1 str lr, [sp, #-4]!\n\
mov ip, #0 @ 1 mov r1, %0 @ 1\n\
mov lr, #0 @ 1 mov r2, #0 @ 1\n\
1: stmia r0!, {r2, r3, ip, lr} @ 4 mov r3, #0 @ 1\n\
stmia r0!, {r2, r3, ip, lr} @ 4 mov ip, #0 @ 1\n\
stmia r0!, {r2, r3, ip, lr} @ 4 mov lr, #0 @ 1\n\
stmia r0!, {r2, r3, ip, lr} @ 4 1: stmia r0!, {r2, r3, ip, lr} @ 4\n\
subs r1, r1, #1 @ 1 stmia r0!, {r2, r3, ip, lr} @ 4\n\
bne 1b @ 1 stmia r0!, {r2, r3, ip, lr} @ 4\n\
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache stmia r0!, {r2, r3, ip, lr} @ 4\n\
ldr pc, [sp], #4 subs r1, r1, #1 @ 1\n\
bne 1b @ 1\n\
__INITDATA mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
ldr pc, [sp], #4"
:
: "I" (PAGE_SIZE / 64));
}
.type v4wt_user_fns, #object struct cpu_user_fns v4wt_user_fns __initdata = {
ENTRY(v4wt_user_fns) .cpu_clear_user_page = v4wt_clear_user_page,
.long v4wt_clear_user_page .cpu_copy_user_page = v4wt_copy_user_page,
.long v4wt_copy_user_page };
.size v4wt_user_fns, . - v4wt_user_fns
arch/arm/mm/copypage-xsc3.S → arch/arm/mm/copypage-xsc3.c
View file @ d73e60b7
/* /*
* linux/arch/arm/lib/copypage-xsc3.S * linux/arch/arm/mm/copypage-xsc3.S
* *
* Copyright (C) 2004 Intel Corp. * Copyright (C) 2004 Intel Corp.
* *
...@@ -10,10 +10,9 @@ ...@@ -10,10 +10,9 @@
* Adapted for 3rd gen XScale core, no more mini-dcache * Adapted for 3rd gen XScale core, no more mini-dcache
* Author: Matt Gilbert (matthew.m.gilbert@intel.com) * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
*/ */
#include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/asm-offsets.h>
#include <asm/page.h>
/* /*
* General note: * General note:
...@@ -21,8 +20,6 @@ ...@@ -21,8 +20,6 @@
* since that will just eat through 8K of the cache. * since that will just eat through 8K of the cache.
*/ */
.text
.align 5
/* /*
* XSC3 optimised copy_user_page * XSC3 optimised copy_user_page
* r0 = destination * r0 = destination
...@@ -34,64 +31,72 @@ ...@@ -34,64 +31,72 @@
* if we eventually end up using our copied page. * if we eventually end up using our copied page.
* *
*/ */
ENTRY(xsc3_mc_copy_user_page) void __attribute__((naked))
stmfd sp!, {r4, r5, lr} xsc3_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
mov lr, #PAGE_SZ/64-1 {
asm("\
pld [r1, #0] stmfd sp!, {r4, r5, lr} \n\
pld [r1, #32] mov lr, %0 \n\
1: pld [r1, #64] \n\
pld [r1, #96] pld [r1, #0] \n\
pld [r1, #32] \n\
1: pld [r1, #64] \n\
pld [r1, #96] \n\
\n\
2: ldrd r2, [r1], #8 \n\
mov ip, r0 \n\
ldrd r4, [r1], #8 \n\
mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
strd r2, [r0], #8 \n\
ldrd r2, [r1], #8 \n\
strd r4, [r0], #8 \n\
ldrd r4, [r1], #8 \n\
strd r2, [r0], #8 \n\
strd r4, [r0], #8 \n\
ldrd r2, [r1], #8 \n\
mov ip, r0 \n\
ldrd r4, [r1], #8 \n\
mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\
strd r2, [r0], #8 \n\
ldrd r2, [r1], #8 \n\
subs lr, lr, #1 \n\
strd r4, [r0], #8 \n\
ldrd r4, [r1], #8 \n\
strd r2, [r0], #8 \n\
strd r4, [r0], #8 \n\
bgt 1b \n\
beq 2b \n\
\n\
ldmfd sp!, {r4, r5, pc}"
:
: "I" (PAGE_SIZE / 64 - 1));
}
2: ldrd r2, [r1], #8
mov ip, r0
ldrd r4, [r1], #8
mcr p15, 0, ip, c7, c6, 1 @ invalidate
strd r2, [r0], #8
ldrd r2, [r1], #8
strd r4, [r0], #8
ldrd r4, [r1], #8
strd r2, [r0], #8
strd r4, [r0], #8
ldrd r2, [r1], #8
mov ip, r0
ldrd r4, [r1], #8
mcr p15, 0, ip, c7, c6, 1 @ invalidate
strd r2, [r0], #8
ldrd r2, [r1], #8
subs lr, lr, #1
strd r4, [r0], #8
ldrd r4, [r1], #8
strd r2, [r0], #8
strd r4, [r0], #8
bgt 1b
beq 2b
ldmfd sp!, {r4, r5, pc}
.align 5
/* /*
* XScale optimised clear_user_page * XScale optimised clear_user_page
* r0 = destination * r0 = destination
* r1 = virtual user address of ultimate destination page * r1 = virtual user address of ultimate destination page
*/ */
ENTRY(xsc3_mc_clear_user_page) void __attribute__((naked))
mov r1, #PAGE_SZ/32 xsc3_mc_clear_user_page(void *kaddr, unsigned long vaddr)
mov r2, #0 {
mov r3, #0 asm("\
1: mcr p15, 0, r0, c7, c6, 1 @ invalidate line mov r1, %0 \n\
strd r2, [r0], #8 mov r2, #0 \n\
strd r2, [r0], #8 mov r3, #0 \n\
strd r2, [r0], #8 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate line\n\
strd r2, [r0], #8 strd r2, [r0], #8 \n\
subs r1, r1, #1 strd r2, [r0], #8 \n\
bne 1b strd r2, [r0], #8 \n\
mov pc, lr strd r2, [r0], #8 \n\
subs r1, r1, #1 \n\
__INITDATA bne 1b \n\
mov pc, lr"
:
: "I" (PAGE_SIZE / 32));
}
.type xsc3_mc_user_fns, #object struct cpu_user_fns xsc3_mc_user_fns __initdata = {
ENTRY(xsc3_mc_user_fns) .cpu_clear_user_page = xsc3_mc_clear_user_page,
.long xsc3_mc_clear_user_page .cpu_copy_user_page = xsc3_mc_copy_user_page,
.long xsc3_mc_copy_user_page };
.size xsc3_mc_user_fns, . - xsc3_mc_user_fns
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