Commit da3145b5 authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Linus Torvalds

[PATCH] mips: added CPU type checking to interrupt control routines

This change had added CPU type checking to interrupt control routines.

Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarYoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 31a9b2ac
......@@ -165,218 +165,268 @@ void vr41xx_enable_piuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + PIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MPIUINTREG);
val |= mask;
write_icu1(val, MPIUINTREG);
set_icu1(MPIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_piuint);
void vr41xx_disable_piuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + PIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MPIUINTREG);
val &= ~mask;
write_icu1(val, MPIUINTREG);
clear_icu1(MPIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_piuint);
void vr41xx_enable_aiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + AIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MAIUINTREG);
val |= mask;
write_icu1(val, MAIUINTREG);
set_icu1(MAIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_aiuint);
void vr41xx_disable_aiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + AIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MAIUINTREG);
val &= ~mask;
write_icu1(val, MAIUINTREG);
clear_icu1(MAIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_aiuint);
void vr41xx_enable_kiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + KIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MKIUINTREG);
val |= mask;
write_icu1(val, MKIUINTREG);
set_icu1(MKIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_kiuint);
void vr41xx_disable_kiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + KIU_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4111 ||
current_cpu_data.cputype == CPU_VR4121) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MKIUINTREG);
val &= ~mask;
write_icu1(val, MKIUINTREG);
clear_icu1(MKIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_kiuint);
void vr41xx_enable_dsiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + DSIU_IRQ;
unsigned long flags;
uint16_t val;
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MDSIUINTREG);
val |= mask;
write_icu1(val, MDSIUINTREG);
set_icu1(MDSIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
EXPORT_SYMBOL(vr41xx_enable_dsiuint);
void vr41xx_disable_dsiuint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + DSIU_IRQ;
unsigned long flags;
uint16_t val;
spin_lock_irqsave(&desc->lock, flags);
val = read_icu1(MDSIUINTREG);
val &= ~mask;
write_icu1(val, MDSIUINTREG);
clear_icu1(MDSIUINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
EXPORT_SYMBOL(vr41xx_disable_dsiuint);
void vr41xx_enable_firint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + FIR_IRQ;
unsigned long flags;
uint16_t val;
spin_lock_irqsave(&desc->lock, flags);
val = read_icu2(MFIRINTREG);
val |= mask;
write_icu2(val, MFIRINTREG);
set_icu2(MFIRINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
EXPORT_SYMBOL(vr41xx_enable_firint);
void vr41xx_disable_firint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + FIR_IRQ;
unsigned long flags;
uint16_t val;
spin_lock_irqsave(&desc->lock, flags);
val = read_icu2(MFIRINTREG);
val &= ~mask;
write_icu2(val, MFIRINTREG);
clear_icu2(MFIRINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
EXPORT_SYMBOL(vr41xx_disable_firint);
void vr41xx_enable_pciint(void)
{
irq_desc_t *desc = irq_desc + PCI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(PCIINT0, MPCIINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_pciint);
void vr41xx_disable_pciint(void)
{
irq_desc_t *desc = irq_desc + PCI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(0, MPCIINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_pciint);
void vr41xx_enable_scuint(void)
{
irq_desc_t *desc = irq_desc + SCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(SCUINT0, MSCUINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_scuint);
void vr41xx_disable_scuint(void)
{
irq_desc_t *desc = irq_desc + SCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(0, MSCUINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_scuint);
void vr41xx_enable_csiint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + CSI_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu2(MCSIINTREG);
val |= mask;
write_icu2(val, MCSIINTREG);
set_icu2(MCSIINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_csiint);
void vr41xx_disable_csiint(uint16_t mask)
{
irq_desc_t *desc = irq_desc + CSI_IRQ;
unsigned long flags;
uint16_t val;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
val = read_icu2(MCSIINTREG);
val &= ~mask;
write_icu2(val, MCSIINTREG);
clear_icu2(MCSIINTREG, mask);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_csiint);
void vr41xx_enable_bcuint(void)
{
irq_desc_t *desc = irq_desc + BCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(BCUINTR, MBCUINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_enable_bcuint);
void vr41xx_disable_bcuint(void)
{
irq_desc_t *desc = irq_desc + BCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
current_cpu_data.cputype == CPU_VR4131 ||
current_cpu_data.cputype == CPU_VR4133) {
spin_lock_irqsave(&desc->lock, flags);
write_icu2(0, MBCUINTREG);
spin_unlock_irqrestore(&desc->lock, flags);
}
}
EXPORT_SYMBOL(vr41xx_disable_bcuint);
/*=======================================================================*/
static unsigned int startup_sysint1_irq(unsigned int irq)
......
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