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Commit dcb571be authored by Paul Mackerras's avatar Paul Mackerras
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Merge branch 'for-2.6.25' of... 

Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.25
parents 9156ad48 96f39c17
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Documentation/powerpc/00-INDEX
View file @ dcb571be
......@@ -28,3 +28,6 @@ sound.txt
- info on sound support under Linux/PPC
zImage_layout.txt
- info on the kernel images for Linux/PPC
qe_firmware.txt
- describes the layout of firmware binaries for the Freescale QUICC
Engine and the code that parses and uploads the microcode therein.
Documentation/powerpc/booting-without-of.txt
View file @ dcb571be
......@@ -52,7 +52,11 @@ Table of Contents
i) Freescale QUICC Engine module (QE)
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Xilinx IP cores
l) Freescale Communications Processor Module
m) Chipselect/Local Bus
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
VII - Specifying interrupt information for devices
1) interrupts property
......@@ -1257,6 +1261,10 @@ platforms are moved over to use the flattened-device-tree model.
services interrupts for this device.
- phy-handle : The phandle for the PHY connected to this ethernet
controller.
- fixed-link : <a b c d e> where a is emulated phy id - choose any,
but unique to the all specified fixed-links, b is duplex - 0 half,
1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
Recommended properties:
......@@ -1411,7 +1419,6 @@ platforms are moved over to use the flattened-device-tree model.
Example multi port host USB controller device node :
usb@22000 {
device_type = "usb";
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
#address-cells = <1>;
......@@ -1425,7 +1432,6 @@ platforms are moved over to use the flattened-device-tree model.
Example dual role USB controller device node :
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
......@@ -1589,7 +1595,6 @@ platforms are moved over to use the flattened-device-tree model.
iii) USB (Universal Serial Bus Controller)
Required properties:
- device_type : should be "usb".
- compatible : could be "qe_udc" or "fhci-hcd".
- mode : the could be "host" or "slave".
- reg : Offset and length of the register set for the device
......@@ -1603,7 +1608,6 @@ platforms are moved over to use the flattened-device-tree model.
Example(slave):
usb@6c0 {
device_type = "usb";
compatible = "qe_udc";
reg = <6c0 40>;
interrupts = <8b 0>;
......@@ -1616,7 +1620,7 @@ platforms are moved over to use the flattened-device-tree model.
Required properties:
- device_type : should be "network", "hldc", "uart", "transparent"
"bisync" or "atm".
"bisync", "atm", or "serial".
- compatible : could be "ucc_geth" or "fsl_atm" and so on.
- model : should be "UCC".
- device-id : the ucc number(1-8), corresponding to UCCx in UM.
......@@ -1629,6 +1633,13 @@ platforms are moved over to use the flattened-device-tree model.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- pio-handle : The phandle for the Parallel I/O port configuration.
- port-number : for UART drivers, the port number to use, between 0 and 3.
This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
The port number is added to the minor number of the device. Unlike the
CPM UART driver, the port-number is required for the QE UART driver.
- soft-uart : for UART drivers, if specified this means the QE UART device
driver should use "Soft-UART" mode, which is needed on some SOCs that have
broken UART hardware. Soft-UART is provided via a microcode upload.
- rx-clock-name: the UCC receive clock source
"none": clock source is disabled
"brg1" through "brg16": clock source is BRG1-BRG16, respectively
......@@ -1788,6 +1799,32 @@ platforms are moved over to use the flattened-device-tree model.
};
};
viii) Uploaded QE firmware
If a new firwmare has been uploaded to the QE (usually by the
boot loader), then a 'firmware' child node should be added to the QE
node. This node provides information on the uploaded firmware that
device drivers may need.
Required properties:
- id: The string name of the firmware. This is taken from the 'id'
member of the qe_firmware structure of the uploaded firmware.
Device drivers can search this string to determine if the
firmware they want is already present.
- extended-modes: The Extended Modes bitfield, taken from the
firmware binary. It is a 64-bit number represented
as an array of two 32-bit numbers.
- virtual-traps: The virtual traps, taken from the firmware binary.
It is an array of 8 32-bit numbers.
Example:
firmware {
id = "Soft-UART";
extended-modes = <0 0>;
virtual-traps = <0 0 0 0 0 0 0 0>;
}
j) CFI or JEDEC memory-mapped NOR flash
Flash chips (Memory Technology Devices) are often used for solid state
......@@ -2269,7 +2306,7 @@ platforms are moved over to use the flattened-device-tree model.
available.
For Axon: 0x0000012a
l) Xilinx IP cores
o) Xilinx IP cores
The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
......@@ -2539,6 +2576,46 @@ platforms are moved over to use the flattened-device-tree model.
Requred properties:
- current-speed : Baud rate of uartlite
p) Freescale Synchronous Serial Interface
The SSI is a serial device that communicates with audio codecs. It can
be programmed in AC97, I2S, left-justified, or right-justified modes.
Required properties:
- compatible : compatible list, containing "fsl,ssi"
- cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
- reg : offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and
level information for the interrupt. This should be
encoded based on the information in section 2)
depending on the type of interrupt controller you
have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- fsl,mode : the operating mode for the SSI interface
"i2s-slave" - I2S mode, SSI is clock slave
"i2s-master" - I2S mode, SSI is clock master
"lj-slave" - left-justified mode, SSI is clock slave
"lj-master" - l.j. mode, SSI is clock master
"rj-slave" - right-justified mode, SSI is clock slave
"rj-master" - r.j., SSI is clock master
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
Optional properties:
- codec-handle : phandle to a 'codec' node that defines an audio
codec connected to this SSI. This node is typically
a child of an I2C or other control node.
Child 'codec' node required properties:
- compatible : compatible list, contains the name of the codec
Child 'codec' node optional properties:
- clock-frequency : The frequency of the input clock, which typically
comes from an on-board dedicated oscillator.
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
......
Documentation/powerpc/qe_firmware.txt 0 → 100644
View file @ dcb571be
This diff is collapsed.
arch/powerpc/Kconfig
View file @ dcb571be
......@@ -140,6 +140,9 @@ config DEFAULT_UIMAGE
Used to allow a board to specify it wants a uImage built by default
default n
config REDBOOT
bool
config PPC64_SWSUSP
bool
depends on PPC64 && (BROKEN || (PPC_PMAC64 && EXPERIMENTAL))
......
arch/powerpc/boot/.gitignore
View file @ dcb571be
......@@ -31,6 +31,7 @@ zImage.*lds
zImage.miboot
zImage.pmac
zImage.pseries
zImage.redboot*
zImage.sandpoint
zImage.vmode
zconf.h
......
arch/powerpc/boot/Makefile
View file @ dcb571be
......@@ -57,12 +57,12 @@ src-wlib := string.S crt0.S stdio.c main.c \
4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
fsl-soc.c mpc8xx.c pq2.c
src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
cuboot-katmai.c cuboot-rainier.c
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
......@@ -195,7 +195,9 @@ image-$(CONFIG_PPC_8xx) += cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
image-$(CONFIG_EP405) += zImage.ep405
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_EP8248E) += zImage.ep8248e
image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx
image-$(CONFIG_STORCENTER) += cuImage.824x
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2
......@@ -208,6 +210,10 @@ image-$(CONFIG_TAISHAN) += cuImage.taishan
image-$(CONFIG_KATMAI) += cuImage.katmai
endif
ifneq ($(CONFIG_REDBOOT),"")
image-$(CONFIG_PPC_8xx) += zImage.redboot-8xx
endif
# For 32-bit powermacs, build the COFF and miboot images
# as well as the ELF images.
ifeq ($(CONFIG_PPC32),y)
......
arch/powerpc/boot/cuboot-824x.c 0 → 100644
View file @ dcb571be
/*
* Old U-boot compatibility for 824x
*
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "cuboot.h"
#define TARGET_824x
#include "ppcboot.h"
static bd_t bd;
static void platform_fixups(void)
{
void *soc;
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
dt_fixup_mac_addresses(bd.bi_enetaddr);
dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
soc = find_node_by_devtype(NULL, "soc");
if (soc) {
void *serial = NULL;
setprop(soc, "bus-frequency", &bd.bi_busfreq,
sizeof(bd.bi_busfreq));
while ((serial = find_node_by_devtype(serial, "serial"))) {
if (get_parent(serial) != soc)
continue;
setprop(serial, "clock-frequency", &bd.bi_busfreq,
sizeof(bd.bi_busfreq));
}
}
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
fdt_init(_dtb_start);
serial_console_init();
platform_ops.fixups = platform_fixups;
}
arch/powerpc/boot/cuboot-83xx.c
View file @ dcb571be
......@@ -24,7 +24,8 @@ static void platform_fixups(void)
void *soc;
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
/* Unfortunately, the specific model number is encoded in the
......
arch/powerpc/boot/cuboot-85xx.c
View file @ dcb571be
......@@ -24,8 +24,9 @@ static void platform_fixups(void)
void *soc;
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr,
bd.bi_enet2addr);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
/* Unfortunately, the specific model number is encoded in the
......
arch/powerpc/boot/devtree.c
View file @ dcb571be
......@@ -88,6 +88,20 @@ void dt_fixup_clock(const char *path, u32 freq)
}
}
void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr)
{
void *devp = find_node_by_alias(alias);
if (devp) {
printf("%s: local-mac-address <-"
" %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias,
addr[0], addr[1], addr[2],
addr[3], addr[4], addr[5]);
setprop(devp, "local-mac-address", addr, 6);
}
}
void dt_fixup_mac_address(u32 index, const u8 *addr)
{
void *devp = find_node_by_prop_value(NULL, "linux,network-index",
......
arch/powerpc/boot/dts/adder875-redboot.dts 0 → 100644
View file @ dcb571be
/*
* Device Tree Source for MPC885 ADS running RedBoot
*
* Copyright 2006 MontaVista Software, Inc.
* Copyright 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "Analogue & Micro Adder MPC875";
compatible = "analogue-and-micro,adder875";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &console;
ethernet0 = &eth0;
ethernet1 = &eth1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,875@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <16>;
i-cache-line-size = <16>;
d-cache-size = <8192>;
i-cache-size = <8192>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
reg = <0 0x01000000>;
};
localbus@fa200100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
"simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xfa200100 0x40>;
ranges = <
0 0 0xfe000000 0x00800000
2 0 0xfa100000 0x00008000
>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x800000>;
bank-width = <2>;
device-width = <2>;
};
};
soc@fa200000 {
compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xfa200000 0x00004000>;
// Temporary until code stops depending on it.
device_type = "soc";
// Temporary until get_immrbase() is fixed.
reg = <0xfa200000 0x4000>;
mdio@e00 {
compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY0: ethernet-phy@0 {
reg = <0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
reg = <1>;
device_type = "ethernet-phy";
};
};
eth0: ethernet@e00 {
device_type = "network";
compatible = "fsl,mpc875-fec-enet",
"fsl,pq1-fec-enet";
reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
};
eth1: ethernet@1e00 {
device_type = "network";
compatible = "fsl,mpc875-fec-enet",
"fsl,pq1-fec-enet";
reg = <0x1e00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <7 1>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
};
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x24>;
compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
reg = <0x9c0 0x40>;
ranges;
muram {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 0x1c00>;
};
};
brg@9f0 {
compatible = "fsl,mpc875-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
reg = <0x9f0 0x10>;
};
CPM_PIC: interrupt-controller@930 {
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
reg = <0x930 0x20>;
compatible = "fsl,mpc875-cpm-pic",
"fsl,cpm1-pic";
};
console: serial@a80 {
device_type = "serial";
compatible = "fsl,mpc875-smc-uart",
"fsl,cpm1-smc-uart";
reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x0090>;
current-speed = <115200>;
};
};
};
chosen {
linux,stdout-path = &console;
};
};
arch/powerpc/boot/dts/adder875-uboot.dts 0 → 100644
View file @ dcb571be
/*
* Device Tree Source for MPC885 ADS running U-Boot
*
* Copyright 2006 MontaVista Software, Inc.
* Copyright 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "Analogue & Micro Adder MPC875";
compatible = "analogue-and-micro,adder875";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &console;
ethernet0 = &eth0;
ethernet1 = &eth1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,875@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <16>;
i-cache-line-size = <16>;
d-cache-size = <8192>;
i-cache-size = <8192>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
reg = <0 0x01000000>;
};
localbus@ff000100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
"simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xff000100 0x40>;
ranges = <
0 0 0xfe000000 0x01000000
>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x800000>;
bank-width = <2>;
device-width = <2>;
};
};
soc@ff000000 {
compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xff000000 0x00004000>;
// Temporary until code stops depending on it.
device_type = "soc";
// Temporary until get_immrbase() is fixed.
reg = <0xff000000 0x4000>;
mdio@e00 {
compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY0: ethernet-phy@0 {
reg = <0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
reg = <1>;
device_type = "ethernet-phy";
};
};
eth0: ethernet@e00 {
device_type = "network";
compatible = "fsl,mpc875-fec-enet",
"fsl,pq1-fec-enet";
reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
};
eth1: ethernet@1e00 {
device_type = "network";
compatible = "fsl,mpc875-fec-enet",
"fsl,pq1-fec-enet";
reg = <0x1e00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <7 1>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
};
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x24>;
compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
reg = <0x9c0 0x40>;
ranges;
muram {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 0x1c00>;
};
};
brg@9f0 {
compatible = "fsl,mpc875-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
reg = <0x9f0 0x10>;
};
CPM_PIC: interrupt-controller@930 {
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
reg = <0x930 0x20>;
compatible = "fsl,mpc875-cpm-pic",
"fsl,cpm1-pic";
};
console: serial@a80 {
device_type = "serial";
compatible = "fsl,mpc875-smc-uart",
"fsl,cpm1-smc-uart";
reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x0090>;
current-speed = <115200>;
};
};
};
chosen {
linux,stdout-path = &console;
};
};
arch/powerpc/boot/dts/ep8248e.dts 0 → 100644
View file @ dcb571be
/*
* Device Tree for the Embedded Planet EP8248E board running PlanetCore.
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "EP8248E";
compatible = "fsl,ep8248e";
#address-cells = <1>;
#size-cells = <1>;
aliases {
planetcore-SMC1 = &smc1;
planetcore-SCC1 = &scc1;
ethernet0 = &eth0;
ethernet1 = &eth1;
serial0 = &smc1;
serial1 = &scc1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8248@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <16384>;
i-cache-size = <16384>;
timebase-frequency = <0>;
clock-frequency = <0>;
};
};
localbus@f0010100 {
compatible = "fsl,mpc8248-localbus",
"fsl,pq2-localbus",
"simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xf0010100 0x40>;
ranges = <0 0 0xfc000000 0x04000000
1 0 0xfa000000 0x00008000>;
flash@0,3800000 {
compatible = "cfi-flash";
reg = <0 0x3800000 0x800000>;
bank-width = <4>;
device-width = <2>;
};
bcsr@1,0 {
#address-cells = <2>;
#size-cells = <1>;
reg = <1 0 0x10>;
compatible = "fsl,ep8248e-bcsr";
ranges;
mdio {
device_type = "mdio";
compatible = "fsl,ep8248e-mdio-bitbang";
#address-cells = <1>;
#size-cells = <0>;
reg = <1 8 1>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&PIC>;
reg = <0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
interrupt-parent = <&PIC>;
reg = <1>;
device_type = "ethernet-phy";
};
};
};
};
memory {
device_type = "memory";
reg = <0 0>;
};
soc@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus";
ranges = <0x00000000 0xf0000000 0x00053000>;
// Temporary until code stops depending on it.
device_type = "soc";
// Temporary -- will go away once kernel uses ranges for get_immrbase().
reg = <0xf0000000 0x00053000>;
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8248-cpm", "fsl,cpm2",
"simple-bus";
reg = <0x119c0 0x30>;
ranges;
muram {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
reg = <0 0x1100 0x1140
0xec0 0x9800 0x800>;
};
};
brg@119f0 {
compatible = "fsl,mpc8248-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
reg = <0x119f0 0x10 0x115f0 0x10>;
};
/* Monitor port/SMC1 */
smc1: serial@11a80 {
device_type = "serial";
compatible = "fsl,mpc8248-smc-uart",
"fsl,cpm2-smc-uart";
reg = <0x11a80 0x20 0x1100 0x40>;
interrupts = <4 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <7>;
fsl,cpm-command = <0x1d000000>;
linux,planetcore-label = "SMC1";
};
/* "Serial" port/SCC1 */
scc1: serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8248-scc-uart",
"fsl,cpm2-scc-uart";
reg = <0x11a00 0x20 0x8000 0x100>;
interrupts = <40 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x00800000>;
linux,planetcore-label = "SCC1";
};
eth0: ethernet@11300 {
device_type = "network";
compatible = "fsl,mpc8248-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
fsl,cpm-command = <0x12000300>;
};
eth1: ethernet@11320 {
device_type = "network";
compatible = "fsl,mpc8248-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
fsl,cpm-command = <0x16200300>;
};
usb@11b60 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc8248-usb",
"fsl,cpm2-usb";
reg = <0x11b60 0x18 0x8b00 0x100>;
interrupt-parent = <&PIC>;
interrupts = <11 8>;
fsl,cpm-command = <0x2e600000>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <0x10c00 0x80>;
compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
};
};
};
arch/powerpc/boot/dts/mpc8313erdb.dts
View file @ dcb571be
......@@ -45,10 +45,58 @@ memory {
reg = <00000000 08000000>; // 128MB at 0
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
reg = <e0005000 1000>;
interrupts = <d#77 8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
ranges = <0 0 fe000000 00800000
1 0 e2800000 00008000
2 0 f0000000 00020000
3 0 fa000000 00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0 0 800000>;
bank-width = <2>;
device-width = <1>;
};
nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8313-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <1 0 2000>;
u-boot@0 {
reg = <0 100000>;
read-only;
};
kernel@100000 {
reg = <100000 300000>;
};
fs@400000 {
reg = <400000 1c00000>;
};
};
};
soc8313@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>;
......@@ -92,7 +140,6 @@ spi@7000 {
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
......
arch/powerpc/boot/dts/mpc832x_mds.dts
View file @ dcb571be
......@@ -7,6 +7,18 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
* To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
* this:
*
* 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
* 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board
* next to the serial ports.
* 3) Solder a wire from U61-22 to P19K-22.
*
* Note that there's a typo in the schematic. The board labels the last column
* of pins "P19K", but in the schematic, that column is called "P19J". So if
* you're going by the schematic, the pin is called "P19J-K22".
*/
/ {
......@@ -169,6 +181,23 @@ pio4: ucc_pin@04 {
1 1e 1 0 1 0 /* TX_EN */
1 1f 2 0 1 0>;/* CRS */
};
pio5: ucc_pin@05 {
pio-map = <
/*
* open has
* port pin dir drain sel irq
*/
2 0 1 0 2 0 /* TxD5 */
2 8 2 0 2 0 /* RxD5 */
2 1d 2 0 0 0 /* CTS5 */
2 1f 1 0 2 0 /* RTS5 */
2 18 2 0 0 0 /* CD */
>;
};
};
};
......@@ -176,6 +205,7 @@ qe@e0100000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "qe";
compatible = "fsl,qe";
model = "QE";
ranges = <0 e0100000 00100000>;
reg = <e0100000 480>;
......@@ -210,7 +240,6 @@ spi@500 {
};
usb@6c0 {
device_type = "usb";
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
......@@ -250,6 +279,26 @@ enet1: ucc@3200 {
pio-handle = < &pio4 >;
};
ucc@2400 {
device_type = "serial";
compatible = "ucc_uart";
model = "UCC";
device-id = <5>; /* The UCC number, 1-7*/
port-number = <0>; /* Which ttyQEx device */
soft-uart; /* We need Soft-UART */
reg = <2400 200>;
interrupts = <28>; /* From Table 18-12 */
interrupt-parent = < &qeic >;
/*
* For Soft-UART, we need to set TX to 1X, which
* means specifying separate clock sources.
*/
rx-clock-name = "brg5";
tx-clock-name = "brg6";
pio-handle = < &pio5 >;
};
mdio@2320 {
#address-cells = <1>;
#size-cells = <0>;
......
arch/powerpc/boot/dts/mpc8349emitx.dts
View file @ dcb571be
......@@ -91,7 +91,6 @@ spi@7000 {
};
usb@22000 {
device_type = "usb";
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
#address-cells = <1>;
......@@ -103,7 +102,6 @@ usb@22000 {
};
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
......@@ -127,14 +125,6 @@ phy1c: ethernet-phy@1c {
reg = <1c>;
device_type = "ethernet-phy";
};
/* Vitesse 7385 */
phy1f: ethernet-phy@1f {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1f>;
device_type = "ethernet-phy";
};
};
enet0: ethernet@24000 {
......@@ -159,7 +149,8 @@ enet1: ethernet@25000 {
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1f >;
/* Vitesse 7385 isn't on the MDIO bus */
fixed-link = <1 1 d#1000 0 0>;
linux,network-index = <1>;
};
......@@ -253,6 +244,21 @@ pci1: pci@e0008600 {
device_type = "pci";
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8349e-localbus",
"fsl,pq2pro-localbus";
reg = <e0005000 d8>;
ranges = <3 0 f0000000 210>;
pata@3,0 {
compatible = "fsl,mpc8349emitx-pata", "ata-generic";
reg = <3 0 10 3 20c 4>;
reg-shift = <1>;
pio-mode = <6>;
interrupts = <17 8>;
interrupt-parent = <&ipic>;
};
};
};
arch/powerpc/boot/dts/mpc8349emitxgp.dts
View file @ dcb571be
......@@ -89,7 +89,6 @@ spi@7000 {
};
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
......
arch/powerpc/boot/dts/mpc834x_mds.dts
View file @ dcb571be
......@@ -104,7 +104,6 @@ spi@7000 {
/* phy type (ULPI or SERIAL) are only types supportted for MPH */
/* port = 0 or 1 */
usb@22000 {
device_type = "usb";
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
#address-cells = <1>;
......@@ -116,7 +115,6 @@ usb@22000 {
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
......
arch/powerpc/boot/dts/mpc836x_mds.dts
View file @ dcb571be
......@@ -241,7 +241,6 @@ spi@500 {
};
usb@6c0 {
device_type = "usb";
compatible = "qe_udc";
reg = <6c0 40 8B00 100>;
interrupts = <b>;
......
arch/powerpc/boot/dts/mpc8377_mds.dts 0 → 100644
View file @ dcb571be
/*
* MPC8377E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,mpc8377emds";
compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8377@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>;
i-cache-line-size = <0x20>;
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; // 512MB at 0
};
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
compatible = "mpc83xx_wdt";
reg = <0x200 0x100>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0xe 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <0xf 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
spi@7000 {
compatible = "fsl_spi";
reg = <0x7000 0x1000>;
interrupts = <0x10 0x8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
interrupts = <0x26 0x8>;
phy_type = "utmi_wide";
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
interrupt-parent = < &ipic >;
interrupts = <0x11 0x8>;
reg = <2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = < &ipic >;
interrupts = <0x12 0x8>;
reg = <3>;
device_type = "ethernet-phy";
};
};
enet0: ethernet@24000 {
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy2 >;
};
enet1: ethernet@25000 {
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy3 >;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <0x9 0x8>;
interrupt-parent = < &ipic >;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <0xa 0x8>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
interrupts = <0xb 0x8>;
interrupt-parent = < &ipic >;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <0x18>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
sdhc@2e000 {
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <0x2a 0x8>;
interrupt-parent = < &ipic >;
};
sata@18000 {
compatible = "fsl,mpc8379-sata";
reg = <0x18000 0x1000>;
interrupts = <0x2c 0x8>;
interrupt-parent = < &ipic >;
};
sata@19000 {
compatible = "fsl,mpc8379-sata";
reg = <0x19000 0x1000>;
interrupts = <0x2d 0x8>;
interrupt-parent = < &ipic >;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
ipic: pic@700 {
compatible = "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
};
pci0: pci@e0008500 {
cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x12 */
0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x13 */
0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x15 */
0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x16 */
0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x17 */
0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x18 */
0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
interrupt-parent = < &ipic >;
interrupts = <0x42 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
};
arch/powerpc/boot/dts/mpc8378_mds.dts 0 → 100644
View file @ dcb571be
/*
* MPC8378E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,mpc8378emds";
compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8378@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>;
i-cache-line-size = <0x20>;
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; // 512MB at 0
};
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
compatible = "mpc83xx_wdt";
reg = <0x200 0x100>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0xe 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <0xf 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
spi@7000 {
compatible = "fsl_spi";
reg = <0x7000 0x1000>;
interrupts = <0x10 0x8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
interrupts = <0x26 0x8>;
phy_type = "utmi_wide";
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
interrupt-parent = < &ipic >;
interrupts = <0x11 0x8>;
reg = <2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = < &ipic >;
interrupts = <0x12 0x8>;
reg = <3>;
device_type = "ethernet-phy";
};
};
enet0: ethernet@24000 {
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy2 >;
};
enet1: ethernet@25000 {
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy3 >;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <0x9 0x8>;
interrupt-parent = < &ipic >;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <0xa 0x8>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
interrupts = <0xb 0x8>;
interrupt-parent = < &ipic >;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <0x18>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
sdhc@2e000 {
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <0x2a 0x8>;
interrupt-parent = < &ipic >;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
ipic: pic@700 {
compatible = "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
};
pci0: pci@e0008500 {
cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x12 */
0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x13 */
0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x15 */
0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x16 */
0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x17 */
0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x18 */
0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
interrupt-parent = < &ipic >;
interrupts = <0x42 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
};
arch/powerpc/boot/dts/mpc8379_mds.dts 0 → 100644
View file @ dcb571be
/*
* MPC8379E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,mpc8379emds";
compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8379@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <0x20>;
i-cache-line-size = <0x20>;
d-cache-size = <0x8000>; // L1, 32K
i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; // 512MB at 0
};
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
compatible = "mpc83xx_wdt";
reg = <0x200 0x100>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0xe 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <0xf 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
spi@7000 {
compatible = "fsl_spi";
reg = <0x7000 0x1000>;
interrupts = <0x10 0x8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
interrupts = <0x26 0x8>;
phy_type = "utmi_wide";
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
interrupt-parent = < &ipic >;
interrupts = <0x11 0x8>;
reg = <2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = < &ipic >;
interrupts = <0x12 0x8>;
reg = <3>;
device_type = "ethernet-phy";
};
};
enet0: ethernet@24000 {
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy2 >;
};
enet1: ethernet@25000 {
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
phy-connection-type = "mii";
interrupt-parent = < &ipic >;
phy-handle = < &phy3 >;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <0x9 0x8>;
interrupt-parent = < &ipic >;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <0xa 0x8>;
interrupt-parent = < &ipic >;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
interrupts = <0xb 0x8>;
interrupt-parent = < &ipic >;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <0x18>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
sdhc@2e000 {
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <0x2a 0x8>;
interrupt-parent = < &ipic >;
};
sata@18000 {
compatible = "fsl,mpc8379-sata";
reg = <0x18000 0x1000>;
interrupts = <0x2c 0x8>;
interrupt-parent = < &ipic >;
};
sata@19000 {
compatible = "fsl,mpc8379-sata";
reg = <0x19000 0x1000>;
interrupts = <0x2d 0x8>;
interrupt-parent = < &ipic >;
};
sata@1a000 {
compatible = "fsl,mpc8379-sata";
reg = <0x1a000 0x1000>;
interrupts = <0x2e 0x8>;
interrupt-parent = < &ipic >;
};
sata@1b000 {
compatible = "fsl,mpc8379-sata";
reg = <0x1b000 0x1000>;
interrupts = <0x2f 0x8>;
interrupt-parent = < &ipic >;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
ipic: pic@700 {
compatible = "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
};
pci0: pci@e0008500 {
cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x12 */
0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x13 */
0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x15 */
0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x16 */
0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x17 */
0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x18 */
0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
interrupt-parent = < &ipic >;
interrupts = <0x42 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
};
arch/powerpc/boot/dts/mpc8544ds.dts
View file @ dcb571be
......@@ -304,9 +304,9 @@ pci3: pcie@e000b000 {
interrupt-map = <
// IDSEL 0x1c USB
e000 0 0 1 &i8259 c 2
e100 0 0 1 &i8259 9 2
e200 0 0 1 &i8259 a 2
e300 0 0 1 &i8259 b 2
e100 0 0 2 &i8259 9 2
e200 0 0 3 &i8259 a 2
e300 0 0 4 &i8259 b 2
// IDSEL 0x1d Audio
e800 0 0 1 &i8259 6 2
......
arch/powerpc/boot/dts/mpc8572ds.dts
View file @ dcb571be
......@@ -334,9 +334,9 @@ pci0: pcie@ffe08000 {
// IDSEL 0x1c USB
e000 0 0 1 &i8259 c 2
e100 0 0 1 &i8259 9 2
e200 0 0 1 &i8259 a 2
e300 0 0 1 &i8259 b 2
e100 0 0 2 &i8259 9 2
e200 0 0 3 &i8259 a 2
e300 0 0 4 &i8259 b 2
// IDSEL 0x1d Audio
e800 0 0 1 &i8259 6 2
......@@ -481,6 +481,7 @@ pci2: pcie@ffe0a000 {
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <1b 2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 0 1
......
arch/powerpc/boot/dts/mpc8610_hpcd.dts
View file @ dcb571be
/*
* MPC8610 HPCD Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
* Copyright 2007-2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License Version 2 as published
......@@ -49,6 +49,7 @@ soc@e0000000 {
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
compatible = "fsl,mpc8610-immr", "simple-bus";
ranges = <0 e0000000 00100000>;
reg = <e0000000 1000>;
bus-frequency = <0>;
......@@ -62,6 +63,13 @@ i2c@3000 {
interrupts = <2b 2>;
interrupt-parent = <&mpic>;
dfsrr;
cs4270:codec@4f {
compatible = "cirrus,cs4270";
reg = <4f>;
/* MCLK source is a stand-alone oscillator */
clock-frequency = <bb8000>;
};
};
i2c@3100 {
......@@ -111,6 +119,109 @@ global-utilities@e0000 {
reg = <e0000 1000>;
fsl,has-rstcr;
};
i2s@16000 {
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <16000 100>;
interrupt-parent = <&mpic>;
interrupts = <3e 2>;
fsl,mode = "i2s-slave";
codec-handle = <&cs4270>;
};
ssi@16100 {
compatible = "fsl,mpc8610-ssi";
cell-index = <1>;
reg = <16100 100>;
interrupt-parent = <&mpic>;
interrupts = <3f 2>;
};
dma@21300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
cell-index = <0>;
reg = <21300 4>; /* DMA general status register */
ranges = <0 21100 200>;
dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <0>;
reg = <0 80>;
interrupt-parent = <&mpic>;
interrupts = <14 2>;
};
dma-channel@1 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <1>;
reg = <80 80>;
interrupt-parent = <&mpic>;
interrupts = <15 2>;
};
dma-channel@2 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <2>;
reg = <100 80>;
interrupt-parent = <&mpic>;
interrupts = <16 2>;
};
dma-channel@3 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,eloplus-dma-channel";
cell-index = <3>;
reg = <180 80>;
interrupt-parent = <&mpic>;
interrupts = <17 2>;
};
};
dma@c300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
cell-index = <1>;
reg = <c300 4>; /* DMA general status register */
ranges = <0 c100 200>;
dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,mpc8540-dma-channel";
cell-index = <0>;
reg = <0 80>;
interrupt-parent = <&mpic>;
interrupts = <3c 2>;
};
dma-channel@1 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,mpc8540-dma-channel";
cell-index = <1>;
reg = <80 80>;
interrupt-parent = <&mpic>;
interrupts = <3d 2>;
};
dma-channel@2 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,mpc8540-dma-channel";
cell-index = <2>;
reg = <100 80>;
interrupt-parent = <&mpic>;
interrupts = <3e 2>;
};
dma-channel@3 {
compatible = "fsl,mpc8610-dma-channel",
"fsl,mpc8540-dma-channel";
cell-index = <3>;
reg = <180 80>;
interrupt-parent = <&mpic>;
interrupts = <3f 2>;
};
};
};
pci0: pci@e0008000 {
......
arch/powerpc/boot/dts/mpc8641_hpcn.dts
View file @ dcb571be
......@@ -60,10 +60,52 @@ memory {
reg = <00000000 40000000>; // 1G at 0x0
};
localbus@f8005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8641-localbus", "simple-bus";
reg = <f8005000 1000>;
interrupts = <13 2>;
interrupt-parent = <&mpic>;
ranges = <0 0 ff800000 00800000
1 0 fe000000 01000000
2 0 f8200000 00100000
3 0 f8100000 00100000>;
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 00800000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <00000000 00300000>;
};
partition@300000 {
label = "firmware b";
reg = <00300000 00100000>;
read-only;
};
partition@400000 {
label = "fs";
reg = <00400000 00300000>;
};
partition@700000 {
label = "firmware a";
reg = <00700000 00100000>;
read-only;
};
};
};
soc8641@f8000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <00000000 f8000000 00100000>;
reg = <f8000000 00001000>; // CCSRBAR
bus-frequency = <0>;
......@@ -326,9 +368,9 @@ pci0: pcie@f8008000 {
// IDSEL 0x1c USB
e000 0 0 1 &i8259 c 2
e100 0 0 1 &i8259 9 2
e200 0 0 1 &i8259 a 2
e300 0 0 1 &i8259 b 2
e100 0 0 2 &i8259 9 2
e200 0 0 3 &i8259 a 2
e300 0 0 4 &i8259 b 2
// IDSEL 0x1d Audio
e800 0 0 1 &i8259 6 2
......
arch/powerpc/boot/dts/storcenter.dts 0 → 100644
View file @ dcb571be
/*
* Device Tree Source for IOMEGA StorCenter
*
* Copyright 2007 Oyvind Repvik
* Copyright 2007 Jon Loeliger
*
* Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/ {
model = "StorCenter";
compatible = "storcenter";
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8241@0 {
device_type = "cpu";
reg = <0>;
clock-frequency = <d# 200000000>; /* Hz */
timebase-frequency = <d# 25000000>; /* Hz */
bus-frequency = <0>; /* from bootwrapper */
i-cache-line-size = <d# 32>; /* bytes */
d-cache-line-size = <d# 32>; /* bytes */
i-cache-size = <4000>;
d-cache-size = <4000>;
};
};
memory {
device_type = "memory";
reg = <00000000 04000000>; /* 64MB @ 0x0 */
};
soc@fc000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,mpc8241", "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
ranges = <0 fc000000 100000>;
reg = <fc000000 100000>; /* EUMB */
bus-frequency = <0>; /* fixed by loader */
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <68>;
};
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 20>;
clock-frequency = <d# 97553800>; /* Hz */
current-speed = <d# 115200>;
interrupts = <9 2>;
interrupt-parent = <&mpic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 20>;
clock-frequency = <d# 97553800>; /* Hz */
current-speed = <d# 9600>;
interrupts = <a 2>;
interrupt-parent = <&mpic>;
};
mpic: interrupt-controller@40000 {
#interrupt-cells = <2>;
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
reg = <40000 40000>;
};
};
pci0: pci@fe800000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
reg = <fe800000 1000>;
ranges = <01000000 0 0 fe000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <d# 97553800>; /* Hz */
interrupt-parent = <&mpic>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 13 - IDE */
6800 0 0 1 &mpic 0 1
6800 0 0 2 &mpic 0 1
6800 0 0 3 &mpic 0 1
/* IDSEL 14 - USB */
7000 0 0 1 &mpic 0 1
7000 0 0 2 &mpic 0 1
7000 0 0 3 &mpic 0 1
7000 0 0 4 &mpic 0 1
/* IDSEL 15 - ETH */
7800 0 0 1 &mpic 0 1
7800 0 0 2 &mpic 0 1
7800 0 0 3 &mpic 0 1
7800 0 0 4 &mpic 0 1
>;
};
chosen {
linux,stdout-path = "/soc/serial@4500";
};
};
arch/powerpc/boot/ep8248e.c 0 → 100644
View file @ dcb571be
/*
* Embedded Planet EP8248E with PlanetCore firmware
*
* Author: Scott Wood <scottwood@freescale.com>
*
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "planetcore.h"
#include "pq2.h"
static char *table;
static u64 mem_size;
#include <io.h>
static void platform_fixups(void)
{
u64 val;
dt_fixup_memory(0, mem_size);
planetcore_set_mac_addrs(table);
if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
printf("No PlanetCore crystal frequency key.\r\n");
return;
}
pq2_fixup_clocks(val);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
table = (char *)r3;
planetcore_prepare_table(table);
if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
return;
mem_size *= 1024 * 1024;
simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
fdt_init(_dtb_start);
planetcore_set_stdout_path(table);
serial_console_init();
platform_ops.fixups = platform_fixups;
}
arch/powerpc/boot/ops.h
View file @ dcb571be
......@@ -159,9 +159,23 @@ static inline void *find_node_by_devtype(const void *prev,
return find_node_by_prop_value_str(prev, "device_type", type);
}
static inline void *find_node_by_alias(const char *alias)
{
void *devp = finddevice("/aliases");
if (devp) {
char path[MAX_PATH_LEN];
if (getprop(devp, alias, path, MAX_PATH_LEN) > 0)
return finddevice(path);
}
return NULL;
}
void dt_fixup_memory(u64 start, u64 size);
void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq);
void dt_fixup_clock(const char *path, u32 freq);
void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr);
void dt_fixup_mac_address(u32 index, const u8 *addr);
void __dt_fixup_mac_addresses(u32 startindex, ...);
#define dt_fixup_mac_addresses(...) \
......
arch/powerpc/boot/redboot-8xx.c 0 → 100644
View file @ dcb571be
/*
* RedBoot firmware support
*
* Author: Scott Wood <scottwood@freescale.com>
*
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "redboot.h"
#include "fsl-soc.h"
#include "io.h"
static bd_t bd;
BSS_STACK(4096);
#define MHZ(x) ((x + 500000) / 1000000)
static void platform_fixups(void)
{
void *node;
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
dt_fixup_mac_addresses(bd.bi_enetaddr);
dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
node = finddevice("/soc/cpm/brg");
if (node) {
printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n",
bd.bi_busfreq, MHZ(bd.bi_busfreq));
setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
}
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
memcpy(&bd, (char *)r3, sizeof(bd));
if (bd.bi_tag != 0x42444944)
return;
simple_alloc_init(_end,
bd.bi_memstart + bd.bi_memsize - (unsigned long)_end,
32, 64);
fdt_init(_dtb_start);
serial_console_init();
platform_ops.fixups = platform_fixups;
loader_info.cmdline = (char *)bd.bi_cmdline;
loader_info.cmdline_len = strlen((char *)bd.bi_cmdline);
}
arch/powerpc/boot/redboot.h 0 → 100644
View file @ dcb571be
#ifndef _PPC_REDBOOT_H
#define _PPC_REDBOOT_H
//=========================================================================
// include/asm-ppc/redboot.h
// Copyright (c) 2002, 2003 Gary Thomas (<gary@mlbassoc.com>
// Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
//
// Board specific details, as provided by RedBoot
//
/* A Board Information structure that is given to a program when
* RedBoot starts it up. Note: not all fields make sense for all
* architectures and it's up to the platform specific code to fill
* in the details.
*/
typedef struct bd_info {
unsigned int bi_tag; /* Should be 0x42444944 "BDID" */
unsigned int bi_size; /* Size of this structure */
unsigned int bi_revision; /* revision of this structure */
unsigned int bi_bdate; /* bootstrap date, i.e. 0x19971106 */
unsigned int bi_memstart; /* Memory start address */
unsigned int bi_memsize; /* Memory (end) size in bytes */
unsigned int bi_intfreq; /* Internal Freq, in Hz */
unsigned int bi_busfreq; /* Bus Freq, in Hz */
unsigned int bi_cpmfreq; /* CPM Freq, in Hz */
unsigned int bi_brgfreq; /* BRG Freq, in Hz */
unsigned int bi_vco; /* VCO Out from PLL */
unsigned int bi_pci_freq; /* PCI Freq, in Hz */
unsigned int bi_baudrate; /* Default console baud rate */
unsigned int bi_immr; /* IMMR when called from boot rom */
unsigned char bi_enetaddr[6];
unsigned int bi_flashbase; /* Physical address of FLASH memory */
unsigned int bi_flashsize; /* Length of FLASH memory */
int bi_flashwidth; /* Width (8,16,32,64) */
unsigned char *bi_cmdline; /* Pointer to command line */
unsigned char bi_esa[3][6]; /* Ethernet station addresses */
unsigned int bi_ramdisk_begin, bi_ramdisk_end;
struct { /* Information about [main] video screen */
short x_res; /* Horizontal resolution in pixels */
short y_res; /* Vertical resolution in pixels */
short bpp; /* Bits/pixel */
short mode; /* Type of pixels (packed, indexed) */
unsigned long fb; /* Pointer to frame buffer (pixel) memory */
} bi_video;
void (*bi_cputc)(char); /* Write a character to the RedBoot console */
char (*bi_cgetc)(void); /* Read a character from the RedBoot console */
int (*bi_ctstc)(void); /* Test for input on the RedBoot console */
} bd_t;
#define BI_REV 0x0102 /* Version 1.02 */
#define bi_pci_busfreq bi_pci_freq
#define bi_immr_base bi_immr
#endif
arch/powerpc/boot/wrapper
View file @ dcb571be
......@@ -168,7 +168,7 @@ ps3)
ksection=.kernel:vmlinux.bin
isection=.kernel:initrd
;;
ep88xc|ep405)
ep88xc|ep405|redboot*|ep8248e)
platformo="$object/fixed-head.o $object/$platform.o"
binary=y
;;
......
arch/powerpc/configs/adder875-redboot_defconfig 0 → 100644
View file @ dcb571be
This diff is collapsed.
arch/powerpc/configs/adder875-uboot_defconfig 0 → 100644
View file @ dcb571be
This diff is collapsed.
arch/powerpc/configs/ep8248e_defconfig 0 → 100644
View file @ dcb571be
This diff is collapsed.
arch/powerpc/configs/mpc8313_rdb_defconfig
View file @ dcb571be
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc4
# Thu Dec 6 16:48:31 2007
# Linux kernel version: 2.6.24-rc6
# Thu Jan 17 16:35:55 2008
#
# CONFIG_PPC64 is not set
......@@ -144,6 +144,7 @@ CONFIG_MPC8313_RDB=y
# CONFIG_MPC834x_MDS is not set
# CONFIG_MPC834x_ITX is not set
# CONFIG_MPC836x_MDS is not set
# CONFIG_MPC837x_MDS is not set
CONFIG_PPC_MPC831x=y
# CONFIG_MPIC is not set
# CONFIG_MPIC_WEIRD is not set
......@@ -336,15 +337,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_PARTITIONS is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
# CONFIG_MTD_BLKDEVS is not set
# CONFIG_MTD_BLOCK is not set
# CONFIG_MTD_BLOCK_RO is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
......@@ -381,11 +383,8 @@ CONFIG_MTD_CFI_UTIL=y
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0xfe000000
CONFIG_MTD_PHYSMAP_LEN=0x1000000
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_PHYSMAP_OF is not set
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
......@@ -406,7 +405,16 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_VERIFY_WRITE=y
# CONFIG_MTD_NAND_ECC_SMC is not set
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_CAFE is not set
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_ALAUDA is not set
# CONFIG_MTD_ONENAND is not set
#
......@@ -1178,7 +1186,17 @@ CONFIG_TMPFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
# CONFIG_JFFS2_SUMMARY is not set
# CONFIG_JFFS2_FS_XATTR is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
# CONFIG_JFFS2_LZO is not set
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
......@@ -1242,6 +1260,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
......
arch/powerpc/configs/mpc834x_itx_defconfig
View file @ dcb571be
......@@ -570,7 +570,8 @@ CONFIG_SATA_SIL=y
# CONFIG_PATA_SIS is not set
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
......
arch/powerpc/configs/mpc8610_hpcd_defconfig
View file @ dcb571be
......@@ -696,7 +696,7 @@ CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
......@@ -708,7 +708,60 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_CHARDEV is not set
#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set
#
# I2C Hardware Bus support
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_MPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_M41T00 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
#
# SPI support
......@@ -763,7 +816,119 @@ CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
CONFIG_SOUND=y
#
# Advanced Linux Sound Architecture
#
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
# CONFIG_SND_PCM_OSS_PLUGINS is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
# CONFIG_SND_SUPPORT_OLD_API is not set
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
#
# Generic devices
#
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
#
# PCI devices
#
# CONFIG_SND_AD1889 is not set
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALS4000 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_ATIIXP_MODEM is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_CS5530 is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_GINA20 is not set
# CONFIG_SND_LAYLA20 is not set
# CONFIG_SND_DARLA24 is not set
# CONFIG_SND_GINA24 is not set
# CONFIG_SND_LAYLA24 is not set
# CONFIG_SND_MONA is not set
# CONFIG_SND_MIA is not set
# CONFIG_SND_ECHO3G is not set
# CONFIG_SND_INDIGO is not set
# CONFIG_SND_INDIGOIO is not set
# CONFIG_SND_INDIGODJ is not set
# CONFIG_SND_EMU10K1 is not set
# CONFIG_SND_EMU10K1X is not set
# CONFIG_SND_ENS1370 is not set
# CONFIG_SND_ENS1371 is not set
# CONFIG_SND_ES1938 is not set
# CONFIG_SND_ES1968 is not set
# CONFIG_SND_FM801 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_INTEL8X0M is not set
# CONFIG_SND_KORG1212 is not set
# CONFIG_SND_MAESTRO3 is not set
# CONFIG_SND_MIXART is not set
# CONFIG_SND_NM256 is not set
# CONFIG_SND_PCXHR is not set
# CONFIG_SND_RIPTIDE is not set
# CONFIG_SND_RME32 is not set
# CONFIG_SND_RME96 is not set
# CONFIG_SND_RME9652 is not set
# CONFIG_SND_SONICVIBES is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
#
# ALSA PowerMac devices
#
#
# ALSA PowerPC devices
#
#
# System on Chip audio support
#
CONFIG_SND_SOC=y
#
# SoC Audio support for SuperH
#
#
# ALSA SoC audio for Freescale SOCs
#
CONFIG_SND_SOC_MPC8610=y
CONFIG_SND_SOC_MPC8610_HPCD=y
CONFIG_SND_SOC_CS4270=y
CONFIG_SND_SOC_CS4270_VD33_ERRATA=y
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
......
arch/powerpc/configs/storcenter_defconfig 0 → 100644
View file @ dcb571be
This diff is collapsed.
arch/powerpc/kernel/Makefile
View file @ dcb571be
......@@ -70,6 +70,7 @@ pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
pci-common.o
obj-$(CONFIG_PCI_MSI) += msi.o
obj-$(CONFIG_RAPIDIO) += rio.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o \
machine_kexec_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_AUDIT) += audit.o
......
arch/powerpc/kernel/head_fsl_booke.S
View file @ dcb571be
......@@ -73,8 +73,8 @@ _ENTRY(_start);
/* We try to not make any assumptions about how the boot loader
* setup or used the TLBs. We invalidate all mappings from the
* boot loader and load a single entry in TLB1[0] to map the
* first 16M of kernel memory. Any boot info passed from the
* bootloader needs to live in this first 16M.
* first 64M of kernel memory. Any boot info passed from the
* bootloader needs to live in this first 64M.
*
* Requirement on bootloader:
* - The page we're executing in needs to reside in TLB1 and
......@@ -167,7 +167,7 @@ skpinv: addi r6,r6,1 /* Increment */
mtspr SPRN_MAS0,r7
tlbre
/* Just modify the entry ID and EPN for the temp mapping */
/* Just modify the entry ID, EPN and RPN for the temp mapping */
lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
mtspr SPRN_MAS0,r7
......@@ -177,9 +177,12 @@ skpinv: addi r6,r6,1 /* Increment */
ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
mtspr SPRN_MAS1,r6
mfspr r6,SPRN_MAS2
li r7,0 /* temp EPN = 0 */
lis r7,PHYSICAL_START@h
rlwimi r7,r6,0,20,31
mtspr SPRN_MAS2,r7
mfspr r6,SPRN_MAS3
rlwimi r7,r6,0,20,31
mtspr SPRN_MAS3,r7
tlbwe
xori r6,r4,1
......@@ -222,11 +225,11 @@ skpinv: addi r6,r6,1 /* Increment */
lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
mtspr SPRN_MAS0,r6
lis r6,(MAS1_VALID|MAS1_IPROT)@h
ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
mtspr SPRN_MAS1,r6
li r7,0
lis r6,KERNELBASE@h
ori r6,r6,KERNELBASE@l
lis r6,PAGE_OFFSET@h
ori r6,r6,PAGE_OFFSET@l
rlwimi r6,r7,0,20,31
mtspr SPRN_MAS2,r6
li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
......@@ -234,6 +237,9 @@ skpinv: addi r6,r6,1 /* Increment */
tlbwe
/* 7. Jump to KERNELBASE mapping */
lis r6,KERNELBASE@h
ori r6,r6,KERNELBASE@l
rlwimi r6,r7,0,20,31
lis r7,MSR_KERNEL@h
ori r7,r7,MSR_KERNEL@l
bl 1f /* Find our address */
......
arch/powerpc/kernel/pci-common.c
View file @ dcb571be
......@@ -792,9 +792,10 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
if ((res = bus->resource[i]) == NULL)
continue;
if (!res->flags || bus->self->transparent)
if (!res->flags)
continue;
if (i >= 3 && bus->self->transparent)
continue;
/* On PowerMac, Apple leaves bridge windows open over
* an inaccessible region of memory space (0...fffff)
* which is somewhat bogus, but that's what they think
......@@ -806,7 +807,8 @@ static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
* equal to the pci_mem_offset of the host bridge and
* their size is smaller than 1M.
*/
if (res->start == hose->pci_mem_offset &&
if (res->flags & IORESOURCE_MEM &&
res->start == hose->pci_mem_offset &&
res->end < 0x100000) {
printk(KERN_INFO
"PCI: Closing bogus Apple Firmware"
......
arch/powerpc/kernel/pci_32.c
View file @ dcb571be
......@@ -94,64 +94,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
void __init
update_bridge_resource(struct pci_dev *dev, struct resource *res)
{
u8 io_base_lo, io_limit_lo;
u16 mem_base, mem_limit;
u16 cmd;
resource_size_t start, end, off;
struct pci_controller *hose = dev->sysdata;
if (!hose) {
printk("update_bridge_base: no hose?\n");
return;
}
pci_read_config_word(dev, PCI_COMMAND, &cmd);
pci_write_config_word(dev, PCI_COMMAND,
cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
if (res->flags & IORESOURCE_IO) {
off = (unsigned long) hose->io_base_virt - isa_io_base;
start = res->start - off;
end = res->end - off;
io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
if (end > 0xffff)
io_base_lo |= PCI_IO_RANGE_TYPE_32;
else
io_base_lo |= PCI_IO_RANGE_TYPE_16;
pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
start >> 16);
pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
end >> 16);
pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
} else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
== IORESOURCE_MEM) {
off = hose->pci_mem_offset;
mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
} else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
== (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
off = hose->pci_mem_offset;
mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
} else {
DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n",
pci_name(dev), res->flags);
}
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
#ifdef CONFIG_PPC_OF
/*
* Functions below are used on OpenFirmware machines.
......
arch/powerpc/math-emu/op-4.h
View file @ dcb571be
......@@ -195,18 +195,38 @@
#ifndef __FP_FRAC_ADD_4
#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
(r0 = x0 + y0, \
r1 = x1 + y1 + (r0 < x0), \
r2 = x2 + y2 + (r1 < x1), \
r3 = x3 + y3 + (r2 < x2))
do { \
int _c1, _c2, _c3; \
r0 = x0 + y0; \
_c1 = r0 < x0; \
r1 = x1 + y1; \
_c2 = r1 < x1; \
r1 += _c1; \
_c2 |= r1 < _c1; \
r2 = x2 + y2; \
_c3 = r2 < x2; \
r2 += _c2; \
_c3 |= r2 < _c2; \
r3 = x3 + y3 + _c3; \
} while (0)
#endif
#ifndef __FP_FRAC_SUB_4
#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
(r0 = x0 - y0, \
r1 = x1 - y1 - (r0 > x0), \
r2 = x2 - y2 - (r1 > x1), \
r3 = x3 - y3 - (r2 > x2))
do { \
int _c1, _c2, _c3; \
r0 = x0 - y0; \
_c1 = r0 > x0; \
r1 = x1 - y1; \
_c2 = r1 > x1; \
r1 -= _c1; \
_c2 |= r1 > _c1; \
r2 = x2 - y2; \
_c3 = r2 > x2; \
r2 -= _c2; \
_c3 |= r2 > _c2; \
r3 = x3 - y3 - _c3; \
} while (0)
#endif
#ifndef __FP_FRAC_ADDI_4
......
arch/powerpc/mm/fsl_booke_mmu.c
View file @ dcb571be
......@@ -165,15 +165,15 @@ void invalidate_tlbcam_entry(int index)
void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
unsigned long cam2)
{
settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
settlbcam(0, PAGE_OFFSET, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
tlbcam_index++;
if (cam1) {
tlbcam_index++;
settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
settlbcam(1, PAGE_OFFSET+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
}
if (cam2) {
tlbcam_index++;
settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
settlbcam(2, PAGE_OFFSET+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
}
}
......
arch/powerpc/mm/lmb.c
View file @ dcb571be
......@@ -342,3 +342,16 @@ void __init lmb_enforce_memory_limit(unsigned long memory_limit)
}
}
}
int __init lmb_is_reserved(unsigned long addr)
{
int i;
for (i = 0; i < lmb.reserved.cnt; i++) {
unsigned long upper = lmb.reserved.region[i].base +
lmb.reserved.region[i].size - 1;
if ((addr >= lmb.reserved.region[i].base) && (addr <= upper))
return 1;
}
return 0;
}
arch/powerpc/mm/mem.c
View file @ dcb571be
......@@ -213,15 +213,30 @@ void __init do_init_bootmem(void)
*/
#ifdef CONFIG_HIGHMEM
free_bootmem_with_active_regions(0, total_lowmem >> PAGE_SHIFT);
/* reserve the sections we're already using */
for (i = 0; i < lmb.reserved.cnt; i++) {
unsigned long addr = lmb.reserved.region[i].base +
lmb_size_bytes(&lmb.reserved, i) - 1;
if (addr < total_lowmem)
reserve_bootmem(lmb.reserved.region[i].base,
lmb_size_bytes(&lmb.reserved, i));
else if (lmb.reserved.region[i].base < total_lowmem) {
unsigned long adjusted_size = total_lowmem -
lmb.reserved.region[i].base;
reserve_bootmem(lmb.reserved.region[i].base,
adjusted_size);
}
}
#else
free_bootmem_with_active_regions(0, max_pfn);
#endif
/* reserve the sections we're already using */
for (i = 0; i < lmb.reserved.cnt; i++)
reserve_bootmem(lmb.reserved.region[i].base,
lmb_size_bytes(&lmb.reserved, i));
#endif
/* XXX need to clip this if using highmem? */
sparse_memory_present_with_active_regions(0);
......@@ -334,11 +349,13 @@ void __init mem_init(void)
highmem_mapnr = total_lowmem >> PAGE_SHIFT;
for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
struct page *page = pfn_to_page(pfn);
if (lmb_is_reserved(pfn << PAGE_SHIFT))
continue;
ClearPageReserved(page);
init_page_count(page);
__free_page(page);
totalhigh_pages++;
reservedpages--;
}
totalram_pages += totalhigh_pages;
printk(KERN_DEBUG "High memory: %luk\n",
......
arch/powerpc/platforms/82xx/Kconfig
View file @ dcb571be
......@@ -26,6 +26,19 @@ config PQ2FADS
help
This option enables support for the PQ2FADS board
config EP8248E
bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
select 8272
select 8260
select FSL_SOC
select PPC_CPM_NEW_BINDING
select MDIO_BITBANG
help
This enables support for the Embedded Planet EP8248E board.
This board is also resold by Freescale as the QUICCStart
MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
endchoice
config PQ2ADS
......
arch/powerpc/platforms/82xx/Makefile
View file @ dcb571be
......@@ -5,3 +5,4 @@ obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
obj-$(CONFIG_CPM2) += pq2.o
obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
obj-$(CONFIG_PQ2FADS) += pq2fads.o
obj-$(CONFIG_EP8248E) += ep8248e.o
arch/powerpc/platforms/82xx/ep8248e.c 0 → 100644
View file @ dcb571be
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arch/powerpc/platforms/83xx/mpc8313_rdb.c
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arch/powerpc/platforms/83xx/mpc832x_mds.c
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arch/powerpc/platforms/83xx/mpc832x_rdb.c
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arch/powerpc/platforms/83xx/mpc834x_itx.c
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arch/powerpc/platforms/83xx/mpc834x_mds.c
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arch/powerpc/platforms/83xx/mpc836x_mds.c
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arch/powerpc/platforms/83xx/mpc837x_mds.c
View file @ dcb571be
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arch/powerpc/platforms/83xx/mpc83xx.h
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arch/powerpc/platforms/83xx/usb.c
View file @ dcb571be
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arch/powerpc/platforms/85xx/mpc85xx_ads.c
View file @ dcb571be
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arch/powerpc/platforms/85xx/mpc85xx_cds.c
View file @ dcb571be
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arch/powerpc/platforms/85xx/mpc85xx_mds.c
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arch/powerpc/platforms/86xx/mpc8610_hpcd.c
View file @ dcb571be
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arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
View file @ dcb571be
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arch/powerpc/platforms/8xx/Kconfig
View file @ dcb571be
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arch/powerpc/platforms/8xx/Makefile
View file @ dcb571be
......@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_8xx) += m8xx_setup.o
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o
obj-$(CONFIG_PPC_EP88XC) += ep88xc.o
obj-$(CONFIG_PPC_ADDER875) += adder875.o
arch/powerpc/platforms/8xx/adder875.c 0 → 100644
View file @ dcb571be
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arch/powerpc/platforms/8xx/ep88xc.c
View file @ dcb571be
This diff is collapsed.
arch/powerpc/platforms/Kconfig
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arch/powerpc/platforms/embedded6xx/Kconfig
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arch/powerpc/platforms/embedded6xx/Makefile
View file @ dcb571be
This diff is collapsed.
arch/powerpc/platforms/embedded6xx/storcenter.c 0 → 100644
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arch/powerpc/sysdev/Makefile
View file @ dcb571be
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arch/powerpc/sysdev/fsl_pci.c
View file @ dcb571be
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arch/powerpc/sysdev/fsl_soc.c
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arch/powerpc/sysdev/ipic.c
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arch/powerpc/sysdev/mpic.c
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arch/powerpc/sysdev/qe_lib/Kconfig
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arch/powerpc/sysdev/qe_lib/qe.c
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arch/powerpc/sysdev/qe_lib/ucc_slow.c
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arch/ppc/kernel/Makefile
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arch/ppc/platforms/85xx/stx_gp3.c
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arch/ppc/platforms/85xx/tqm85xx.c
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arch/ppc/syslib/Makefile
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drivers/net/fs_enet/fs_enet-main.c
View file @ dcb571be
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drivers/net/phy/Kconfig
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drivers/net/phy/fixed.c
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drivers/rapidio/rio.c
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drivers/serial/Kconfig
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drivers/serial/Makefile
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drivers/serial/cpm_uart/cpm_uart_cpm2.c
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drivers/serial/ucc_uart.c 0 → 100644
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include/asm-powerpc/immap_qe.h
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include/asm-powerpc/lmb.h
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include/asm-powerpc/mpc8260.h
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include/asm-powerpc/pci-bridge.h
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include/asm-powerpc/qe.h
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include/asm-powerpc/system.h
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include/linux/phy_fixed.h
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