Commit dd4a59a8 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
  [PATCH] sky2: optimize receive restart
  [PATCH] sky2: PHY power on delays
  [PATCH] sky2: NAPI suspend/resume of dual port cards
  [PATCH] sky2: sky2_reset section mismatch
  [PATCH] sk98lin: fix truncated collision threshold mask
  [PATCH] skge: fix truncated collision threshold mask
  [PATCH] sky2: fix truncated collision threshold mask
  [PATCH] myri10ge return value fix
  [PATCH] Update smc91x driver with ARM Versatile board info
  [PATCH] ixgb: fix tx unit hang - properly calculate desciptor count
  [PATCH] smsc-ircc2: fix section reference mismatches
  [PATCH] 8139cp.c printk fix
  [PATCH] s2io driver irq fix
  [PATCH] e1000: irq naming update
  [PATCH] forcedeth: watermark fixup
  [PATCH] forcedeth: deferral fixup
  [PATCH] zd1211rw: usb_clear_halt not allowed in IRQ context
  [PATCH] bcm43xx-softmac: Fix an off-by-one condition in handle_irq_noise
parents 155dbfd8 22e11703
...@@ -1916,7 +1916,7 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -1916,7 +1916,7 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
regs = ioremap(pciaddr, CP_REGS_SIZE); regs = ioremap(pciaddr, CP_REGS_SIZE);
if (!regs) { if (!regs) {
rc = -EIO; rc = -EIO;
dev_err(&pdev->dev, "Cannot map PCI MMIO (%lx@%lx)\n", dev_err(&pdev->dev, "Cannot map PCI MMIO (%Lx@%Lx)\n",
(unsigned long long)pci_resource_len(pdev, 1), (unsigned long long)pci_resource_len(pdev, 1),
(unsigned long long)pciaddr); (unsigned long long)pciaddr);
goto err_out_res; goto err_out_res;
......
...@@ -283,7 +283,7 @@ static int e1000_request_irq(struct e1000_adapter *adapter) ...@@ -283,7 +283,7 @@ static int e1000_request_irq(struct e1000_adapter *adapter)
} }
} }
if (adapter->have_msi) if (adapter->have_msi)
flags &= ~SA_SHIRQ; flags &= ~IRQF_SHARED;
#endif #endif
if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags, if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
netdev->name, netdev))) netdev->name, netdev)))
......
...@@ -240,10 +240,12 @@ enum { ...@@ -240,10 +240,12 @@ enum {
#define NVREG_RNDSEED_FORCE2 0x2d00 #define NVREG_RNDSEED_FORCE2 0x2d00
#define NVREG_RNDSEED_FORCE3 0x7400 #define NVREG_RNDSEED_FORCE3 0x7400
NvRegUnknownSetupReg1 = 0xA0, NvRegTxDeferral = 0xA0,
#define NVREG_UNKSETUP1_VAL 0x16070f #define NVREG_TX_DEFERRAL_DEFAULT 0x15050f
NvRegUnknownSetupReg2 = 0xA4, #define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f
#define NVREG_UNKSETUP2_VAL 0x16 #define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f
NvRegRxDeferral = 0xA4,
#define NVREG_RX_DEFERRAL_DEFAULT 0x16
NvRegMacAddrA = 0xA8, NvRegMacAddrA = 0xA8,
NvRegMacAddrB = 0xAC, NvRegMacAddrB = 0xAC,
NvRegMulticastAddrA = 0xB0, NvRegMulticastAddrA = 0xB0,
...@@ -269,8 +271,10 @@ enum { ...@@ -269,8 +271,10 @@ enum {
#define NVREG_LINKSPEED_MASK (0xFFF) #define NVREG_LINKSPEED_MASK (0xFFF)
NvRegUnknownSetupReg5 = 0x130, NvRegUnknownSetupReg5 = 0x130,
#define NVREG_UNKSETUP5_BIT31 (1<<31) #define NVREG_UNKSETUP5_BIT31 (1<<31)
NvRegUnknownSetupReg3 = 0x13c, NvRegTxWatermark = 0x13c,
#define NVREG_UNKSETUP3_VAL1 0x200010 #define NVREG_TX_WM_DESC1_DEFAULT 0x0200010
#define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000
#define NVREG_TX_WM_DESC2_3_1000 0xfe08000
NvRegTxRxControl = 0x144, NvRegTxRxControl = 0x144,
#define NVREG_TXRXCTL_KICK 0x0001 #define NVREG_TXRXCTL_KICK 0x0001
#define NVREG_TXRXCTL_BIT1 0x0002 #define NVREG_TXRXCTL_BIT1 0x0002
...@@ -658,7 +662,7 @@ static const struct register_test nv_registers_test[] = { ...@@ -658,7 +662,7 @@ static const struct register_test nv_registers_test[] = {
{ NvRegMisc1, 0x03c }, { NvRegMisc1, 0x03c },
{ NvRegOffloadConfig, 0x03ff }, { NvRegOffloadConfig, 0x03ff },
{ NvRegMulticastAddrA, 0xffffffff }, { NvRegMulticastAddrA, 0xffffffff },
{ NvRegUnknownSetupReg3, 0x0ff }, { NvRegTxWatermark, 0x0ff },
{ NvRegWakeUpFlags, 0x07777 }, { NvRegWakeUpFlags, 0x07777 },
{ 0,0 } { 0,0 }
}; };
...@@ -2127,7 +2131,7 @@ static int nv_update_linkspeed(struct net_device *dev) ...@@ -2127,7 +2131,7 @@ static int nv_update_linkspeed(struct net_device *dev)
int newdup = np->duplex; int newdup = np->duplex;
int mii_status; int mii_status;
int retval = 0; int retval = 0;
u32 control_1000, status_1000, phyreg, pause_flags; u32 control_1000, status_1000, phyreg, pause_flags, txreg;
/* BMSR_LSTATUS is latched, read it twice: /* BMSR_LSTATUS is latched, read it twice:
* we want the current value. * we want the current value.
...@@ -2245,6 +2249,26 @@ static int nv_update_linkspeed(struct net_device *dev) ...@@ -2245,6 +2249,26 @@ static int nv_update_linkspeed(struct net_device *dev)
phyreg |= PHY_1000; phyreg |= PHY_1000;
writel(phyreg, base + NvRegPhyInterface); writel(phyreg, base + NvRegPhyInterface);
if (phyreg & PHY_RGMII) {
if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
txreg = NVREG_TX_DEFERRAL_RGMII_1000;
else
txreg = NVREG_TX_DEFERRAL_RGMII_10_100;
} else {
txreg = NVREG_TX_DEFERRAL_DEFAULT;
}
writel(txreg, base + NvRegTxDeferral);
if (np->desc_ver == DESC_VER_1) {
txreg = NVREG_TX_WM_DESC1_DEFAULT;
} else {
if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
txreg = NVREG_TX_WM_DESC2_3_1000;
else
txreg = NVREG_TX_WM_DESC2_3_DEFAULT;
}
writel(txreg, base + NvRegTxWatermark);
writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD), writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
base + NvRegMisc1); base + NvRegMisc1);
pci_push(base); pci_push(base);
...@@ -3910,7 +3934,10 @@ static int nv_open(struct net_device *dev) ...@@ -3910,7 +3934,10 @@ static int nv_open(struct net_device *dev)
/* 5) continue setup */ /* 5) continue setup */
writel(np->linkspeed, base + NvRegLinkSpeed); writel(np->linkspeed, base + NvRegLinkSpeed);
writel(NVREG_UNKSETUP3_VAL1, base + NvRegUnknownSetupReg3); if (np->desc_ver == DESC_VER_1)
writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark);
else
writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark);
writel(np->txrxctl_bits, base + NvRegTxRxControl); writel(np->txrxctl_bits, base + NvRegTxRxControl);
writel(np->vlanctl_bits, base + NvRegVlanControl); writel(np->vlanctl_bits, base + NvRegVlanControl);
pci_push(base); pci_push(base);
...@@ -3932,8 +3959,8 @@ static int nv_open(struct net_device *dev) ...@@ -3932,8 +3959,8 @@ static int nv_open(struct net_device *dev)
writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus); writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
get_random_bytes(&i, sizeof(i)); get_random_bytes(&i, sizeof(i));
writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed); writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);
writel(NVREG_UNKSETUP1_VAL, base + NvRegUnknownSetupReg1); writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
writel(NVREG_UNKSETUP2_VAL, base + NvRegUnknownSetupReg2); writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
if (poll_interval == -1) { if (poll_interval == -1) {
if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval); writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
......
...@@ -2353,7 +2353,7 @@ static int __init smsc_superio_lpc(unsigned short cfg_base) ...@@ -2353,7 +2353,7 @@ static int __init smsc_superio_lpc(unsigned short cfg_base)
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
#define PCIID_VENDOR_INTEL 0x8086 #define PCIID_VENDOR_INTEL 0x8086
#define PCIID_VENDOR_ALI 0x10b9 #define PCIID_VENDOR_ALI 0x10b9
static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __devinitdata = { static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __initdata = {
{ {
.vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */ .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */
.device = 0x24cc, .device = 0x24cc,
......
...@@ -1281,7 +1281,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, ...@@ -1281,7 +1281,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
while(len) { while(len) {
buffer_info = &tx_ring->buffer_info[i]; buffer_info = &tx_ring->buffer_info[i];
size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE); size = min(len, IXGB_MAX_DATA_PER_TXD);
buffer_info->length = size; buffer_info->length = size;
buffer_info->dma = buffer_info->dma =
pci_map_single(adapter->pdev, pci_map_single(adapter->pdev,
...@@ -1306,7 +1306,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb, ...@@ -1306,7 +1306,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
while(len) { while(len) {
buffer_info = &tx_ring->buffer_info[i]; buffer_info = &tx_ring->buffer_info[i];
size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE); size = min(len, IXGB_MAX_DATA_PER_TXD);
buffer_info->length = size; buffer_info->length = size;
buffer_info->dma = buffer_info->dma =
pci_map_page(adapter->pdev, pci_map_page(adapter->pdev,
......
...@@ -2412,14 +2412,20 @@ static int myri10ge_resume(struct pci_dev *pdev) ...@@ -2412,14 +2412,20 @@ static int myri10ge_resume(struct pci_dev *pdev)
return -EIO; return -EIO;
} }
myri10ge_restore_state(mgp); myri10ge_restore_state(mgp);
pci_enable_device(pdev);
status = pci_enable_device(pdev);
if (status < 0) {
dev_err(&pdev->dev, "failed to enable device\n");
return -EIO;
}
pci_set_master(pdev); pci_set_master(pdev);
status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED, status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
netdev->name, mgp); netdev->name, mgp);
if (status != 0) { if (status != 0) {
dev_err(&pdev->dev, "failed to allocate IRQ\n"); dev_err(&pdev->dev, "failed to allocate IRQ\n");
goto abort_with_msi; goto abort_with_enabled;
} }
myri10ge_reset(mgp); myri10ge_reset(mgp);
...@@ -2438,7 +2444,8 @@ static int myri10ge_resume(struct pci_dev *pdev) ...@@ -2438,7 +2444,8 @@ static int myri10ge_resume(struct pci_dev *pdev)
return 0; return 0;
abort_with_msi: abort_with_enabled:
pci_disable_device(pdev);
return -EIO; return -EIO;
} }
......
This diff is collapsed.
...@@ -829,8 +829,7 @@ struct s2io_nic { ...@@ -829,8 +829,7 @@ struct s2io_nic {
#define MSIX_FLG 0xA5 #define MSIX_FLG 0xA5
struct msix_entry *entries; struct msix_entry *entries;
struct s2io_msix_entry *s2io_entries; struct s2io_msix_entry *s2io_entries;
char desc1[35]; char desc[MAX_REQUESTED_MSI_X][25];
char desc2[35];
int avail_msix_vectors; /* No. of MSI-X vectors granted by system */ int avail_msix_vectors; /* No. of MSI-X vectors granted by system */
...@@ -1002,7 +1001,7 @@ static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag); ...@@ -1002,7 +1001,7 @@ static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag);
static struct ethtool_ops netdev_ethtool_ops; static struct ethtool_ops netdev_ethtool_ops;
static void s2io_set_link(unsigned long data); static void s2io_set_link(unsigned long data);
static int s2io_set_swapper(nic_t * sp); static int s2io_set_swapper(nic_t * sp);
static void s2io_card_down(nic_t *nic, int flag); static void s2io_card_down(nic_t *nic);
static int s2io_card_up(nic_t *nic); static int s2io_card_up(nic_t *nic);
static int get_xena_rev_id(struct pci_dev *pdev); static int get_xena_rev_id(struct pci_dev *pdev);
static void restore_xmsi_data(nic_t *nic); static void restore_xmsi_data(nic_t *nic);
......
...@@ -1473,7 +1473,7 @@ extern "C" { ...@@ -1473,7 +1473,7 @@ extern "C" {
#define GM_TXCR_FORCE_JAM (1<<15) /* Bit 15: Force Jam / Flow-Control */ #define GM_TXCR_FORCE_JAM (1<<15) /* Bit 15: Force Jam / Flow-Control */
#define GM_TXCR_CRC_DIS (1<<14) /* Bit 14: Disable insertion of CRC */ #define GM_TXCR_CRC_DIS (1<<14) /* Bit 14: Disable insertion of CRC */
#define GM_TXCR_PAD_DIS (1<<13) /* Bit 13: Disable padding of packets */ #define GM_TXCR_PAD_DIS (1<<13) /* Bit 13: Disable padding of packets */
#define GM_TXCR_COL_THR_MSK (1<<10) /* Bit 12..10: Collision Threshold */ #define GM_TXCR_COL_THR_MSK (7<<10) /* Bit 12..10: Collision Threshold */
#define TX_COL_THR(x) (SHIFT10(x) & GM_TXCR_COL_THR_MSK) #define TX_COL_THR(x) (SHIFT10(x) & GM_TXCR_COL_THR_MSK)
......
...@@ -1734,11 +1734,11 @@ enum { ...@@ -1734,11 +1734,11 @@ enum {
GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */ GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */
GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */ GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */
GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */ GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */
GM_TXCR_COL_THR_MSK = 1<<10, /* Bit 12..10: Collision Threshold */ GM_TXCR_COL_THR_MSK = 7<<10, /* Bit 12..10: Collision Threshold */
}; };
#define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK)
#define TX_COL_DEF 0x04 #define TX_COL_DEF 0x04 /* late collision after 64 byte */
/* GM_RX_CTRL 16 bit r/w Receive Control Register */ /* GM_RX_CTRL 16 bit r/w Receive Control Register */
enum { enum {
......
...@@ -65,6 +65,7 @@ ...@@ -65,6 +65,7 @@
#define RX_MAX_PENDING (RX_LE_SIZE/2 - 2) #define RX_MAX_PENDING (RX_LE_SIZE/2 - 2)
#define RX_DEF_PENDING RX_MAX_PENDING #define RX_DEF_PENDING RX_MAX_PENDING
#define RX_SKB_ALIGN 8 #define RX_SKB_ALIGN 8
#define RX_BUF_WRITE 16
#define TX_RING_SIZE 512 #define TX_RING_SIZE 512
#define TX_DEF_PENDING (TX_RING_SIZE - 1) #define TX_DEF_PENDING (TX_RING_SIZE - 1)
...@@ -234,7 +235,6 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) ...@@ -234,7 +235,6 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
} }
if (hw->chip_id == CHIP_ID_YUKON_EC_U) { if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
sky2_pci_write32(hw, PCI_DEV_REG3, 0); sky2_pci_write32(hw, PCI_DEV_REG3, 0);
reg1 = sky2_pci_read32(hw, PCI_DEV_REG4); reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
reg1 &= P_ASPM_CONTROL_MSK; reg1 &= P_ASPM_CONTROL_MSK;
...@@ -243,6 +243,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) ...@@ -243,6 +243,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
} }
sky2_pci_write32(hw, PCI_DEV_REG1, reg1); sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
udelay(100);
break; break;
...@@ -255,6 +256,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state) ...@@ -255,6 +256,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
else else
reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
sky2_pci_write32(hw, PCI_DEV_REG1, reg1); sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
udelay(100);
if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
sky2_write8(hw, B2_Y2_CLK_GATE, 0); sky2_write8(hw, B2_Y2_CLK_GATE, 0);
...@@ -1389,7 +1391,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done) ...@@ -1389,7 +1391,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
} }
sky2->tx_cons = put; sky2->tx_cons = put;
if (tx_avail(sky2) > MAX_SKB_TX_LE) if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
netif_wake_queue(dev); netif_wake_queue(dev);
} }
...@@ -1888,9 +1890,6 @@ static struct sk_buff *sky2_receive(struct sky2_port *sky2, ...@@ -1888,9 +1890,6 @@ static struct sk_buff *sky2_receive(struct sky2_port *sky2,
re->skb->ip_summed = CHECKSUM_NONE; re->skb->ip_summed = CHECKSUM_NONE;
sky2_rx_add(sky2, re->mapaddr); sky2_rx_add(sky2, re->mapaddr);
/* Tell receiver about new buffers. */
sky2_put_idx(sky2->hw, rxqaddr[sky2->port], sky2->rx_put);
return skb; return skb;
oversize: oversize:
...@@ -1937,7 +1936,9 @@ static inline int sky2_more_work(const struct sky2_hw *hw) ...@@ -1937,7 +1936,9 @@ static inline int sky2_more_work(const struct sky2_hw *hw)
/* Process status response ring */ /* Process status response ring */
static int sky2_status_intr(struct sky2_hw *hw, int to_do) static int sky2_status_intr(struct sky2_hw *hw, int to_do)
{ {
struct sky2_port *sky2;
int work_done = 0; int work_done = 0;
unsigned buf_write[2] = { 0, 0 };
u16 hwidx = sky2_read16(hw, STAT_PUT_IDX); u16 hwidx = sky2_read16(hw, STAT_PUT_IDX);
rmb(); rmb();
...@@ -1945,7 +1946,6 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) ...@@ -1945,7 +1946,6 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do)
while (hw->st_idx != hwidx) { while (hw->st_idx != hwidx) {
struct sky2_status_le *le = hw->st_le + hw->st_idx; struct sky2_status_le *le = hw->st_le + hw->st_idx;
struct net_device *dev; struct net_device *dev;
struct sky2_port *sky2;
struct sk_buff *skb; struct sk_buff *skb;
u32 status; u32 status;
u16 length; u16 length;
...@@ -1978,6 +1978,14 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) ...@@ -1978,6 +1978,14 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do)
#endif #endif
netif_receive_skb(skb); netif_receive_skb(skb);
/* Update receiver after 16 frames */
if (++buf_write[le->link] == RX_BUF_WRITE) {
sky2_put_idx(hw, rxqaddr[le->link],
sky2->rx_put);
buf_write[le->link] = 0;
}
/* Stop after net poll weight */
if (++work_done >= to_do) if (++work_done >= to_do)
goto exit_loop; goto exit_loop;
break; break;
...@@ -2016,6 +2024,16 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) ...@@ -2016,6 +2024,16 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do)
} }
exit_loop: exit_loop:
if (buf_write[0]) {
sky2 = netdev_priv(hw->dev[0]);
sky2_put_idx(hw, Q_R1, sky2->rx_put);
}
if (buf_write[1]) {
sky2 = netdev_priv(hw->dev[1]);
sky2_put_idx(hw, Q_R2, sky2->rx_put);
}
return work_done; return work_done;
} }
...@@ -2286,7 +2304,7 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) ...@@ -2286,7 +2304,7 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
} }
static int __devinit sky2_reset(struct sky2_hw *hw) static int sky2_reset(struct sky2_hw *hw)
{ {
u16 status; u16 status;
u8 t8, pmd_type; u8 t8, pmd_type;
...@@ -3437,17 +3455,14 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) ...@@ -3437,17 +3455,14 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
return -EINVAL; return -EINVAL;
del_timer_sync(&hw->idle_timer); del_timer_sync(&hw->idle_timer);
netif_poll_disable(hw->dev[0]);
for (i = 0; i < hw->ports; i++) { for (i = 0; i < hw->ports; i++) {
struct net_device *dev = hw->dev[i]; struct net_device *dev = hw->dev[i];
if (dev) { if (netif_running(dev)) {
if (!netif_running(dev))
continue;
sky2_down(dev); sky2_down(dev);
netif_device_detach(dev); netif_device_detach(dev);
netif_poll_disable(dev);
} }
} }
...@@ -3474,9 +3489,8 @@ static int sky2_resume(struct pci_dev *pdev) ...@@ -3474,9 +3489,8 @@ static int sky2_resume(struct pci_dev *pdev)
for (i = 0; i < hw->ports; i++) { for (i = 0; i < hw->ports; i++) {
struct net_device *dev = hw->dev[i]; struct net_device *dev = hw->dev[i];
if (dev && netif_running(dev)) { if (netif_running(dev)) {
netif_device_attach(dev); netif_device_attach(dev);
netif_poll_enable(dev);
err = sky2_up(dev); err = sky2_up(dev);
if (err) { if (err) {
...@@ -3488,6 +3502,7 @@ static int sky2_resume(struct pci_dev *pdev) ...@@ -3488,6 +3502,7 @@ static int sky2_resume(struct pci_dev *pdev)
} }
} }
netif_poll_enable(hw->dev[0]);
sky2_idle_start(hw); sky2_idle_start(hw);
out: out:
return err; return err;
......
...@@ -1480,7 +1480,7 @@ enum { ...@@ -1480,7 +1480,7 @@ enum {
GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */ GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */
GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */ GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */
GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */ GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */
GM_TXCR_COL_THR_MSK = 1<<10, /* Bit 12..10: Collision Threshold */ GM_TXCR_COL_THR_MSK = 7<<10, /* Bit 12..10: Collision Threshold */
}; };
#define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK)
......
...@@ -354,6 +354,24 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, ...@@ -354,6 +354,24 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
#define SMC_IRQ_FLAGS (0) #define SMC_IRQ_FLAGS (0)
#elif defined(CONFIG_ARCH_VERSATILE)
#define SMC_CAN_USE_8BIT 1
#define SMC_CAN_USE_16BIT 1
#define SMC_CAN_USE_32BIT 1
#define SMC_NOWAIT 1
#define SMC_inb(a, r) readb((a) + (r))
#define SMC_inw(a, r) readw((a) + (r))
#define SMC_inl(a, r) readl((a) + (r))
#define SMC_outb(v, a, r) writeb(v, (a) + (r))
#define SMC_outw(v, a, r) writew(v, (a) + (r))
#define SMC_outl(v, a, r) writel(v, (a) + (r))
#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
#define SMC_IRQ_FLAGS (0)
#else #else
#define SMC_CAN_USE_8BIT 1 #define SMC_CAN_USE_8BIT 1
......
...@@ -1547,7 +1547,7 @@ static void handle_irq_noise(struct bcm43xx_private *bcm) ...@@ -1547,7 +1547,7 @@ static void handle_irq_noise(struct bcm43xx_private *bcm)
goto generate_new; goto generate_new;
/* Get the noise samples. */ /* Get the noise samples. */
assert(bcm->noisecalc.nr_samples <= 8); assert(bcm->noisecalc.nr_samples < 8);
i = bcm->noisecalc.nr_samples; i = bcm->noisecalc.nr_samples;
noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(radio->nrssi_lt) - 1); noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(radio->nrssi_lt) - 1); noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(radio->nrssi_lt) - 1);
......
...@@ -375,10 +375,8 @@ static void int_urb_complete(struct urb *urb, struct pt_regs *pt_regs) ...@@ -375,10 +375,8 @@ static void int_urb_complete(struct urb *urb, struct pt_regs *pt_regs)
case -ENODEV: case -ENODEV:
case -ENOENT: case -ENOENT:
case -ECONNRESET: case -ECONNRESET:
goto kfree;
case -EPIPE: case -EPIPE:
usb_clear_halt(urb->dev, EP_INT_IN); goto kfree;
/* FALL-THROUGH */
default: default:
goto resubmit; goto resubmit;
} }
...@@ -580,10 +578,8 @@ static void rx_urb_complete(struct urb *urb, struct pt_regs *pt_regs) ...@@ -580,10 +578,8 @@ static void rx_urb_complete(struct urb *urb, struct pt_regs *pt_regs)
case -ENODEV: case -ENODEV:
case -ENOENT: case -ENOENT:
case -ECONNRESET: case -ECONNRESET:
return;
case -EPIPE: case -EPIPE:
usb_clear_halt(urb->dev, EP_DATA_IN); return;
/* FALL-THROUGH */
default: default:
dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status); dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
goto resubmit; goto resubmit;
...@@ -749,11 +745,9 @@ static void tx_urb_complete(struct urb *urb, struct pt_regs *pt_regs) ...@@ -749,11 +745,9 @@ static void tx_urb_complete(struct urb *urb, struct pt_regs *pt_regs)
case -ENODEV: case -ENODEV:
case -ENOENT: case -ENOENT:
case -ECONNRESET: case -ECONNRESET:
case -EPIPE:
dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status); dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
break; break;
case -EPIPE:
usb_clear_halt(urb->dev, EP_DATA_OUT);
/* FALL-THROUGH */
default: default:
dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status); dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
goto resubmit; goto resubmit;
......
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