Commit dd5bdb79 authored by Heiko Stuebner's avatar Heiko Stuebner

clk: rockchip: document hdmi_phy external input for rk3328

The hdmi-phy block inside the soc also loops its pll output back
into the clock controller, so document that already used input clock.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
parent 36ec0361
...@@ -32,6 +32,7 @@ clock-output-names: ...@@ -32,6 +32,7 @@ clock-output-names:
- "clkin_i2s" - external I2S clock - optional, - "clkin_i2s" - external I2S clock - optional,
- "gmac_clkin" - external GMAC clock - optional - "gmac_clkin" - external GMAC clock - optional
- "phy_50m_out" - output clock of the pll in the mac phy - "phy_50m_out" - output clock of the pll in the mac phy
- "hdmi_phy" - output clock of the hdmi phy pll - optional
Example: Clock controller node: Example: Clock controller node:
......
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